From 6c23e1b6d58f4ea34d716a8d419f665c2e20fc8e Mon Sep 17 00:00:00 2001 From: Sacha Date: Sat, 2 Mar 2013 11:34:03 +1000 Subject: [PATCH] Use flags instead of bools for VCVT. Fix up some spacing. Only Android has ArmEmitterTest. --- Common/ArmEmitter.cpp | 8 ++++---- Common/ArmEmitter.h | 10 ++++++++-- Core/MIPS/ARM/ArmCompFPU.cpp | 28 ++++++++++++++-------------- android/jni/NativeApp.cpp | 2 +- 4 files changed, 27 insertions(+), 21 deletions(-) diff --git a/Common/ArmEmitter.cpp b/Common/ArmEmitter.cpp index badfbdb8b..68d66f2d3 100644 --- a/Common/ArmEmitter.cpp +++ b/Common/ArmEmitter.cpp @@ -1085,14 +1085,14 @@ void ARMXEmitter::VMOV(ARMReg Dest, ARMReg Src) } } -void ARMXEmitter::VCVT(ARMReg Sd, ARMReg Sm, bool to_integer, bool is_signed, bool round_to_zero) +void ARMXEmitter::VCVT(ARMReg Sd, ARMReg Sm, int flags) { - bool op = to_integer ? round_to_zero : is_signed; - bool op2 = to_integer ? is_signed : 0; + bool op = (flags & TO_INT) ? (flags & ROUND_TO_ZERO) : (flags & IS_SIGNED); + bool op2 = (flags & TO_INT) ? (flags & IS_SIGNED) : 0; Sd = SubBase(Sd); Sm = SubBase(Sm); - Write32(NO_COND | (0x1D << 23) | ((Sd & 0x1) << 22) | (0x7 << 19) | (to_integer << 18) | (op2 << 16) \ + Write32(NO_COND | (0x1D << 23) | ((Sd & 0x1) << 22) | (0x7 << 19) | ((flags & TO_INT) << 18) | (op2 << 16) \ | ((Sd & 0x1E) << 11) | (op << 7) | (0x29 << 6) | ((Sm & 0x1) << 5) | (Sm >> 1)); } diff --git a/Common/ArmEmitter.h b/Common/ArmEmitter.h index 64e0c744e..7a45c9c8d 100644 --- a/Common/ArmEmitter.h +++ b/Common/ArmEmitter.h @@ -32,6 +32,12 @@ #undef _LR #undef _PC +// VCVT flags +#define TO_FLOAT 0 +#define TO_INT 1 << 0 +#define IS_SIGNED 1 << 1 +#define ROUND_TO_ZERO 1 << 2 + namespace ArmGen { enum ARMReg @@ -466,7 +472,7 @@ public: // Using just MSR here messes with our defines on the PPC side of stuff (when this code was in dolphin...) // Just need to put an underscore here, bit annoying. void _MSR (bool nzcvq, bool g, Operand2 op2); - void _MSR (bool nzcvq, bool g, ARMReg src ); + void _MSR (bool nzcvq, bool g, ARMReg src); void MRS (ARMReg dest); // Memory load/store operations @@ -528,7 +534,7 @@ public: void VMUL(ARMReg Vd, ARMReg Vn, ARMReg Vm); void VMOV(ARMReg Dest, ARMReg Src, bool high); void VMOV(ARMReg Dest, ARMReg Src); - void VCVT(ARMReg Sd, ARMReg Sm, bool to_integer, bool is_signed, bool round_to_zero = false); + void VCVT(ARMReg Sd, ARMReg Sm, int flags); void QuickCallFunction(ARMReg scratchreg, void *func); // Utility functions diff --git a/Core/MIPS/ARM/ArmCompFPU.cpp b/Core/MIPS/ARM/ArmCompFPU.cpp index 040b69518..907be0da1 100644 --- a/Core/MIPS/ARM/ArmCompFPU.cpp +++ b/Core/MIPS/ARM/ArmCompFPU.cpp @@ -19,14 +19,14 @@ #include "ArmJit.h" #include "ArmRegCache.h" -#define _RS ((op>>21) & 0x1F) -#define _RT ((op>>16) & 0x1F) -#define _RD ((op>>11) & 0x1F) -#define _FS ((op>>11) & 0x1F) -#define _FT ((op>>16) & 0x1F) -#define _FD ((op>>6 ) & 0x1F) -#define _POS ((op>>6 ) & 0x1F) -#define _SIZE ((op>>11 ) & 0x1F) +#define _RS ((op>>21) & 0x1F) +#define _RT ((op>>16) & 0x1F) +#define _RD ((op>>11) & 0x1F) +#define _FS ((op>>11) & 0x1F) +#define _FT ((op>>16) & 0x1F) +#define _FD ((op>>6 ) & 0x1F) +#define _POS ((op>>6 ) & 0x1F) +#define _SIZE ((op>>11) & 0x1F) #define DISABLE Comp_Generic(op); return; #define CONDITIONAL_DISABLE ; @@ -189,33 +189,33 @@ void Jit::Comp_FPU2op(u32 op) break; case 12: //FsI(fd) = (int)floorf(F(fs)+0.5f); break; //round.w.s fpr.MapDirtyIn(fd, fs); - VCVT(fpr.R(fd), fpr.R(fs), true, true, false); + VCVT(fpr.R(fd), fpr.R(fs), TO_INT | IS_SIGNED); break; case 13: //FsI(fd) = Rto0(F(fs))); break; //trunc.w.s fpr.MapDirtyIn(fd, fs); - VCVT(fpr.R(fd), fpr.R(fs), true, true, true); + VCVT(fpr.R(fd), fpr.R(fs), TO_INT | IS_SIGNED | ROUND_TO_ZERO); break; case 14: //FsI(fd) = (int)ceilf (F(fs)); break; //ceil.w.s fpr.MapDirtyIn(fd, fs); MOVI2R(R0, 0x3F000000); // 0.5f VMOV(S0, R0); VADD(S0,fpr.R(fs),S0); - VCVT(fpr.R(fd), S0, true, true, false); + VCVT(fpr.R(fd), S0, TO_INT | IS_SIGNED); break; case 15: //FsI(fd) = (int)floorf(F(fs)); break; //floor.w.s fpr.MapDirtyIn(fd, fs); MOVI2R(R0, 0x3F000000); // 0.5f VMOV(S0, R0); VSUB(S0,fpr.R(fs),S0); - VCVT(fpr.R(fd), S0, true, true, false); + VCVT(fpr.R(fd), S0, TO_INT | IS_SIGNED); break; case 32: //F(fd) = (float)FsI(fs); break; //cvt.s.w fpr.MapDirtyIn(fd, fs); - VCVT(fpr.R(fd), fpr.R(fs), false, true); + VCVT(fpr.R(fd), fpr.R(fs), TO_FLOAT | IS_SIGNED); break; case 36: //FsI(fd) = (int) F(fs); break; //cvt.w.s fpr.MapDirtyIn(fd, fs); - VCVT(fpr.R(fd), fpr.R(fs), true, false, true); + VCVT(fpr.R(fd), fpr.R(fs), TO_INT | ROUND_TO_ZERO); break; default: DISABLE; diff --git a/android/jni/NativeApp.cpp b/android/jni/NativeApp.cpp index a1b75a269..8e9e017ba 100644 --- a/android/jni/NativeApp.cpp +++ b/android/jni/NativeApp.cpp @@ -154,7 +154,7 @@ void NativeGetAppInfo(std::string *app_dir_name, std::string *app_nice_name, boo *app_dir_name = "ppsspp"; *landscape = true; -#if defined(ARM) +#if defined(ANDROID) ArmEmitterTest(); #endif }