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Mix add and xor in the texcache for better results.
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@ -756,11 +756,12 @@ static inline u32 QuickTexHash(u32 addr, int bufw, int w, int h, u32 format) {
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#ifdef _M_SSE
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// Make sure both the size and start are aligned, OR will get either.
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if ((((u32)(intptr_t)checkp | sizeInRAM) & 0xf) == 0) {
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if ((((u32)(intptr_t)checkp | sizeInRAM) & 0x1f) == 0) {
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__m128i cursor = _mm_set1_epi32(0);
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const __m128i *p = (const __m128i *)checkp;
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for (u32 i = 0; i < sizeInRAM / 16; ++i) {
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for (u32 i = 0; i < sizeInRAM / 16; i += 2) {
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cursor = _mm_add_epi32(cursor, _mm_load_si128(&p[i]));
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cursor = _mm_xor_si128(cursor, _mm_load_si128(&p[i + 1]));
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}
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// Add the four parts into the low i32.
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cursor = _mm_add_epi32(cursor, _mm_srli_si128(cursor, 8));
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@ -771,8 +772,10 @@ static inline u32 QuickTexHash(u32 addr, int bufw, int w, int h, u32 format) {
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// TODO: ARM NEON implementation (using CPUDetect to be sure it has NEON.)
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{
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#endif
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for (u32 i = 0; i < sizeInRAM / 4; ++i)
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for (u32 i = 0; i < sizeInRAM / 8; ++i) {
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check += *checkp++;
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check ^= *checkp++;
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}
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}
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return check;
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