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Enable the new vreg flushing mechanism on ARM.

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Reduce logspam seen in a couple games.
This commit is contained in:
Henrik Rydgard 2014-03-12 10:15:09 +01:00
parent ea6fb9337c
commit 7ae9c26b6a
2 changed files with 7 additions and 10 deletions
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2
Core/HLE/sceGe.cpp
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@ -152,7 +152,7 @@ public:
//if(dl->status < 0 || dl->status > PSP_GE_LIST_PAUSED)
// ERROR_LOG(SCEGE, "Weird DL status after signal suspend %x", dl->status);
if (newState != PSP_GE_DL_STATE_RUNNING)
INFO_LOG_REPORT(SCEGE, "GE Interrupt: newState might be %d", newState);
DEBUG_LOG_REPORT(SCEGE, "GE Interrupt: newState might be %d", newState);
dl->state = PSP_GE_DL_STATE_RUNNING;
}

15
Core/MIPS/ARM/ArmRegCacheFPU.cpp
View File

@ -333,14 +333,12 @@ void ArmRegCacheFPU::FlushAll() {
DiscardR(i);
}
#if 0
// Loop through the ARM registers, then use GetMipsRegOffset to determine if MIPS registers are
// sequential. This is necessary because we store VFPU registers in a staggered order to get
// columns sequential (most VFPU math in nearly all games is in columns, not rows).
int numArmRegs;
// We rely on the allocation order being sequental.
// We rely on the allocation order being sequential.
const ARMReg baseReg = GetMIPSAllocationOrder(numArmRegs)[0];
for (int i = 0; i < numArmRegs; i++) {
@ -357,6 +355,11 @@ void ArmRegCacheFPU::FlushAll() {
if (c == 1) {
// ILOG("Got single register: %i (%i)", a, m);
emit_->VSTR((ARMReg)(a + S0), CTXREG, GetMipsRegOffset(m));
} else if (c == 2) {
// Probably not worth using VSTMIA for two.
int offset = GetMipsRegOffset(m);
emit_->VSTR((ARMReg)(a + S0), CTXREG, offset);
emit_->VSTR((ARMReg)(a + 1 + S0), CTXREG, offset + 4);
} else {
// ILOG("Got sequence: %i at %i (%i)", c, a, m);
emit_->ADDI2R(R0, CTXREG, GetMipsRegOffset(m), R1);
@ -382,11 +385,6 @@ void ArmRegCacheFPU::FlushAll() {
// already not dirty
}
}
#else
for (int i = 0; i < NUM_MIPSFPUREG; i++) {
FlushR(i);
}
#endif
// Sanity check
for (int i = 0; i < numARMFpuReg_; i++) {
@ -428,7 +426,6 @@ void ArmRegCacheFPU::DiscardR(MIPSReg r) {
mr[r].spillLock = false;
}
bool ArmRegCacheFPU::IsTempX(ARMReg r) const {
return ar[r - S0].mipsReg >= TEMP0;
}