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Initial / simple vmscl for x86 jit.
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@ -722,4 +722,8 @@ namespace MIPSComp
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DISABLE;
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}
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void Jit::Comp_Vmscl(u32 op) {
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DISABLE;
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}
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}
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@ -195,6 +195,7 @@ public:
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void Comp_Vmmov(u32 op);
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void Comp_VScl(u32 op);
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void Comp_Vmmul(u32 op);
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void Comp_Vmscl(u32 op);
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ArmJitBlockCache *GetBlockCache() { return &blocks; }
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@ -646,10 +646,10 @@ const MIPSInstruction tableVFPU6[32] = //111100 xxx
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INSTR("v(h)tfm4",&Jit::Comp_Generic, Dis_Vtfm, Int_Vtfm, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("v(h)tfm4",&Jit::Comp_Generic, Dis_Vtfm, Int_Vtfm, IS_VFPU|OUT_EAT_PREFIX),
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//16
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INSTR("vmscl",&Jit::Comp_Generic, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Generic, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Generic, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Generic, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Vmscl, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Vmscl, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Vmscl, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vmscl",&Jit::Comp_Vmscl, Dis_Generic, Int_Vmscl, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vcrsp.t/vqmul.q",&Jit::Comp_Generic, Dis_CrossQuat, Int_CrossQuat, IS_VFPU|OUT_EAT_PREFIX),
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INSTR("vcrsp.t/vqmul.q",&Jit::Comp_Generic, Dis_CrossQuat, Int_CrossQuat, IS_VFPU|OUT_EAT_PREFIX),
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@ -831,4 +831,49 @@ void Jit::Comp_Vmmul(u32 op) {
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fpr.ReleaseSpillLocks();
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}
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void Jit::Comp_Vmscl(u32 op) {
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CONDITIONAL_DISABLE;
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// TODO: This probably ignores prefixes?
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if (js.MayHavePrefix())
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DISABLE;
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MatrixSize sz = GetMtxSize(op);
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int n = GetMatrixSide(sz);
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u8 sregs[16], dregs[16], scale;
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GetMatrixRegs(sregs, sz, _VS);
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GetVectorRegs(&scale, V_Single, _VT);
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GetMatrixRegs(dregs, sz, _VD);
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// Move to XMM0 early, so we don't have to worry about overlap with scale.
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MOVSS(XMM0, fpr.V(scale));
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// TODO: test overlap, optimize.
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u8 tempregs[16];
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for (int a = 0; a < n; a++)
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{
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for (int b = 0; b < n; b++)
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{
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u8 temp = (u8) fpr.GetTempV();
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fpr.MapRegV(temp, MAP_NOINIT | MAP_DIRTY);
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MOVSS(fpr.VX(temp), fpr.V(sregs[a * 4 + b]));
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MULSS(fpr.VX(temp), R(XMM0));
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fpr.StoreFromRegisterV(temp);
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tempregs[a * 4 + b] = temp;
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}
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}
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for (int a = 0; a < n; a++)
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{
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for (int b = 0; b < n; b++)
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{
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u8 temp = tempregs[a * 4 + b];
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fpr.MapRegV(temp, 0);
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MOVSS(fpr.V(dregs[a * 4 + b]), fpr.VX(temp));
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}
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}
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fpr.ReleaseSpillLocks();
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}
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}
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@ -205,6 +205,7 @@ public:
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void Comp_Vmmov(u32 op);
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void Comp_VScl(u32 op);
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void Comp_Vmmul(u32 op);
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void Comp_Vmscl(u32 op);
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void Comp_DoNothing(u32 op);
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