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Jit x86: optimize "subu r, 0, r" to NEG r.

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This commit is contained in:
Henrik Rydgård 2014-03-03 13:39:53 +01:00
parent 30e58d9848
commit aea272a3ce
1 changed files with 19 additions and 20 deletions
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39
Core/MIPS/x86/CompALU.cpp
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@ -70,7 +70,7 @@ namespace MIPSComp
if (rt == MIPS_REG_ZERO)
return;
switch (op >> 26)
switch (op >> 26)
{
case 8: // same as addiu?
case 9: // R(rt) = R(rs) + simm; break; //addiu
@ -276,9 +276,8 @@ namespace MIPSComp
MIPSGPReg rs = _RS;
MIPSGPReg rd = _RD;
// Yes, this happens. Let's make it fast.
if (doImm && gpr.IsImm(rs) && gpr.IsImm(rt))
{
// Both sides known, we can just evaporate the instruction.
if (doImm && gpr.IsImm(rs) && gpr.IsImm(rt)) {
gpr.SetImm(rd, doImm(gpr.GetImm(rs), gpr.GetImm(rt)));
return;
}
@ -289,33 +288,34 @@ namespace MIPSComp
if (gpr.IsImm(rt) && gpr.GetImm(rt) == 0)
rt = MIPS_REG_ZERO;
// Special cases that translate nicely
if (doImm == &RType3_ImmSub && rs == MIPS_REG_ZERO && rt == rd) {
gpr.MapReg(rd, true, true);
NEG(32, gpr.R(rd));
return;
}
gpr.Lock(rt, rs, rd);
// Optimize out operations against 0... and is the only one that isn't a MOV.
if (rt == MIPS_REG_ZERO || (rs == MIPS_REG_ZERO && doImm != &RType3_ImmSub))
{
if (doImm == &RType3_ImmAnd)
if (rt == MIPS_REG_ZERO || (rs == MIPS_REG_ZERO && doImm != &RType3_ImmSub)) {
if (doImm == &RType3_ImmAnd) {
gpr.SetImm(rd, 0);
else
{
} else {
MIPSGPReg rsource = rt == MIPS_REG_ZERO ? rs : rt;
if (rsource != rd)
{
if (rsource != rd) {
gpr.MapReg(rd, false, true);
MOV(32, gpr.R(rd), gpr.R(rsource));
}
}
}
else if (gpr.IsImm(rt))
{
} else if (gpr.IsImm(rt)) {
// No temporary needed.
u32 rtval = gpr.GetImm(rt);
gpr.MapReg(rd, rs == rd, true);
if (rs != rd)
if (rs != rd) {
MOV(32, gpr.R(rd), gpr.R(rs));
}
(this->*arith)(32, gpr.R(rd), Imm32(rtval));
}
else
{
} else {
// Use EAX as a temporary if we'd overwrite it.
if (rd == rt)
MOV(32, R(EAX), gpr.R(rt));
@ -330,7 +330,7 @@ namespace MIPSComp
void Jit::Comp_RType3(MIPSOpcode op)
{
CONDITIONAL_DISABLE
MIPSGPReg rt = _RT;
MIPSGPReg rs = _RS;
MIPSGPReg rd = _RD;
@ -355,7 +355,6 @@ namespace MIPSComp
}
else if (gpr.GetImm(rt) == 0)
{
// Yes, this actually happens.
if (gpr.IsImm(rs))
gpr.SetImm(rd, gpr.GetImm(rs));
else if (rd != rs)