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R10, not R9, points to the mips state...
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@ -369,7 +369,7 @@ void Jit::Comp_JumpReg(u32 op)
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case 8: //jr
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break;
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case 9: //jalr
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ADD(R1, R9, MIPS_REG_RA * 4); // compute address of RA in ram
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ADD(R1, R10, MIPS_REG_RA * 4); // compute address of RA in ram
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ARMABI_MOVI2R(R2, js.compilerPC + 8);
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STR(R1, R2);
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break;
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@ -143,7 +143,6 @@ const u8 *Jit::DoJit(u32 em_address, ArmJitBlock *b)
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}
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#endif
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NOP();
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AlignCode16();
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b->originalSize = numInstructions;
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return b->normalEntry;
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@ -168,11 +167,11 @@ void Jit::Comp_Generic(u32 op)
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}
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void Jit::MovFromPC(ARMReg r) {
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LDR(r, R9, offsetof(MIPSState, pc));
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LDR(r, R10, offsetof(MIPSState, pc));
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}
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void Jit::MovToPC(ARMReg r) {
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STR(R9, r, offsetof(MIPSState, pc));
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STR(R10, r, offsetof(MIPSState, pc));
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}
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void Jit::DoDownCount()
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@ -21,7 +21,7 @@
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using namespace ArmGen;
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#define CTXREG ((ARMReg)9)
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#define CTXREG (R10)
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ArmRegCache::ArmRegCache(MIPSState *mips) : mips_(mips) {
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}
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