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armjit: fix major typo breaking mult/multu.

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Unknown W. Brackets 2013-11-10 21:54:44 -08:00
parent a1196399ef
commit ca7b2b554b
1 changed files with 2 additions and 2 deletions
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4
Core/MIPS/ARM/ArmCompALU.cpp
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@ -711,7 +711,7 @@ namespace MIPSComp
break; break;
case 24: //mult (the most popular one). lo,hi = signed mul (rs * rt) case 24: //mult (the most popular one). lo,hi = signed mul (rs * rt)
if (gpr.IsImm(rs) && gpr.IsImm(rs)) { if (gpr.IsImm(rs) && gpr.IsImm(rt)) {
s64 result = (s64)(s32)gpr.GetImm(rs) * (s64)(s32)gpr.GetImm(rt); s64 result = (s64)(s32)gpr.GetImm(rs) * (s64)(s32)gpr.GetImm(rt);
u64 resultBits = (u64)result; u64 resultBits = (u64)result;
gpr.SetImm(MIPS_REG_LO, (u32)(resultBits >> 0)); gpr.SetImm(MIPS_REG_LO, (u32)(resultBits >> 0));
@ -723,7 +723,7 @@ namespace MIPSComp
break; break;
case 25: //multu (2nd) lo,hi = unsigned mul (rs * rt) case 25: //multu (2nd) lo,hi = unsigned mul (rs * rt)
if (gpr.IsImm(rs) && gpr.IsImm(rs)) { if (gpr.IsImm(rs) && gpr.IsImm(rt)) {
u64 resultBits = (u64)gpr.GetImm(rs) * (u64)gpr.GetImm(rt); u64 resultBits = (u64)gpr.GetImm(rs) * (u64)gpr.GetImm(rt);
gpr.SetImm(MIPS_REG_LO, (u32)(resultBits >> 0)); gpr.SetImm(MIPS_REG_LO, (u32)(resultBits >> 0));
gpr.SetImm(MIPS_REG_HI, (u32)(resultBits >> 32)); gpr.SetImm(MIPS_REG_HI, (u32)(resultBits >> 32));