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ppc emitter
This commit is contained in:
Ced2911
parent
c24c5c88d9
commit
cc0a8d1321
0
Common/ppcAbi.cpp
Normal file
0
Common/ppcAbi.cpp
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426
Common/ppcEmitter.cpp
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426
Common/ppcEmitter.cpp
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#include <xtl.h>
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#include "ppcEmitter.h"
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namespace PpcGen {
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// Arithmetics ops
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void PPCXEmitter::ADD (PPCReg Rd, PPCReg Ra, PPCReg Rb) {
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u32 instr = (0x7C000214 | (Rd << 21) | (Ra << 16) | (Rb << 11));
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Write32(instr);
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}
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void PPCXEmitter::ADDI (PPCReg Rd, PPCReg Ra, unsigned short imm) {
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u32 instr = (0x38000000 | (Rd << 21) | (Ra << 16) | ((imm) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::ADDIS (PPCReg Rd, PPCReg Ra, unsigned short imm) {
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u32 instr = (0x3C000000 | (Rd << 21) | (Ra << 16) | ((imm) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::AND (PPCReg Rs, PPCReg Ra, PPCReg Rb) {
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u32 instr = (0x7C000038 | (Ra << 21) | (Rs << 16) | (Rb << 11));
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Write32(instr);
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}
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void PPCXEmitter::ANDI (PPCReg Rd, PPCReg Ra, unsigned short imm) {
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u32 instr = (0x70000000 | (Rd << 21) | (Ra << 16) | ((imm) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::ANDIS (PPCReg Rd, PPCReg Ra, unsigned short imm) {
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u32 instr = (0x74000000 | (Rd << 21) | (Ra << 16) | ((imm) & 0xffff));
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Write32(instr);
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}
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// Memory load/store operations
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void PPCXEmitter::LI(PPCReg dest, unsigned short imm) {
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u32 instr = (0x38000000 | (dest << 21) | ((imm) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::LIS(PPCReg dest, unsigned short imm) {
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u32 instr = (0x3C000000 | (dest << 21) | ((imm) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::LBZ (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0x88000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::LHZ (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0xA0000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::LHBRX (PPCReg dest, PPCReg src, PPCReg offset) {
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u32 instr = (0x7C00062C | (dest << 21) | (src << 16) | (offset << 11));
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Write32(instr);
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}
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void PPCXEmitter::LWZ (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0x80000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::LWBRX (PPCReg dest, PPCReg src, PPCReg offset) {
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u32 instr = (0x7C00042C | (dest << 21) | (src << 16) | (offset << 11));
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Write32(instr);
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}
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void PPCXEmitter::STB (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0x98000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::STH (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0xB0000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::STHBRX (PPCReg dest, PPCReg src, PPCReg offset) {
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u32 instr = (0x7C00072C | (dest << 21) | (src << 16) | (offset << 11));
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Write32(instr);
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}
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void PPCXEmitter::STW (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0x90000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::STWU (PPCReg dest, PPCReg src, int offset) {
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u32 instr = (0x94000000 | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::STWBRX (PPCReg dest, PPCReg src, PPCReg offset) {
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u32 instr = (0x7C00052C | (dest << 21) | (src << 16) | (offset << 11));
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Write32(instr);
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}
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// use lwz ... can't find good opcode :s
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void PPCXEmitter::LD (PPCReg dest, PPCReg src, int offset) {
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u32 instr = ((58 << 26) | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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// use stw ... can't find good opcode :s
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void PPCXEmitter::STD (PPCReg dest, PPCReg src, int offset) {
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u32 instr = ((62 << 26) | (dest << 21) | (src << 16) | ((offset) & 0xffff));
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Write32(instr);
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}
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// Branch operations
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void PPCXEmitter::B (const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x48000000 | ((s32)((func) & 0x3fffffc)));
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Write32(instr);
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}
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void PPCXEmitter::BL(const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x48000001 | ((s32)((func) & 0x3fffffc)));
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Write32(instr);
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}
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void PPCXEmitter::BA (const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x48000002 | ((s32)((func) & 0x3fffffc)));
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Write32(instr);
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}
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void PPCXEmitter::BLA (const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x48000003 | ((s32)((func) & 0x3fffffc)));
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Write32(instr);
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}
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void PPCXEmitter::BEQ (const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x41820000 | ( func & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::BGT(const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x41810000 | (((s16)(((func)+1))) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::BLT (const void *fnptr) {
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s32 func = (s32)fnptr - s32(code);
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u32 instr = (0x41800000 | (((s16)(((func)+1))) & 0xffff));
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Write32(instr);
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}
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void PPCXEmitter::BEQ (PPCReg r) {
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//s32 func = (s32)(fnptr);
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//u32 instr = (0x48000003 | ((s32)((func) & 0x3fffffc)));
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//Write32(instr);
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DebugBreak();
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}
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void PPCXEmitter::BCTRL() {
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Write32(0x4E800421);
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}
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void PPCXEmitter::BCTR() {
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Write32(0x4E800420);
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}
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// Link Register
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void PPCXEmitter::MFLR(PPCReg r) {
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Write32(0x7C0802A6 | r << 21);
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}
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void PPCXEmitter::MTLR(PPCReg r) {
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Write32(0x7C0803A6 | r << 21);
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}
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void PPCXEmitter::MTCTR(PPCReg r) {
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Write32(0x7C0903A6 | r << 21);
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}
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void PPCXEmitter::BLR() {
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Write32(0x4E800020);
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}
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void PPCXEmitter::BGTLR() {
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Write32(0x4D810020);
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}
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// Fixup
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FixupBranch PPCXEmitter::B()
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{
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FixupBranch branch;
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branch.type = _B;
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branch.ptr = code;
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branch.condition = condition;
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//We'll write NOP here for now.
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Write32(0x60000000);
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return branch;
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}
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FixupBranch PPCXEmitter::BL()
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{
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FixupBranch branch;
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branch.type = _BL;
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branch.ptr = code;
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branch.condition = condition;
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//We'll write NOP here for now.
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Write32(0x60000000);
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return branch;
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}
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FixupBranch PPCXEmitter::BNE() {
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FixupBranch branch;
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branch.type = _BNE;
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branch.ptr = code;
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branch.condition = condition;
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//We'll write NOP here for now.
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Write32(0x60000000);
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return branch;
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}
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FixupBranch PPCXEmitter::BLT() {
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FixupBranch branch;
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branch.type = _BLT;
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branch.ptr = code;
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branch.condition = condition;
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//We'll write NOP here for now.
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Write32(0x60000000);
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return branch;
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}
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FixupBranch PPCXEmitter::B_Cond(FixupBranchType type) {
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FixupBranch branch;
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branch.type = type;
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branch.ptr = code;
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branch.condition = condition;
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//We'll write NOP here for now.
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Write32(0x60000000);
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return branch;
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}
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void PPCXEmitter::SetJumpTarget(FixupBranch const &branch)
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{
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s32 distance = s32(code) - (s32)branch.ptr;
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_assert_msg_(DYNA_REC, distance > -33554432
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&& distance <= 33554432,
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"SetJumpTarget out of range (%p calls %p)", code,
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branch.ptr);
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switch(branch.type) {
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case _B:
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*(u32*)branch.ptr = (0x48000000 | ((s32)((distance) & 0x3fffffc)));
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break;
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case _BL:
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*(u32*)branch.ptr = (0x48000001 | ((s32)((distance) & 0x3fffffc)));
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break;
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case _BEQ:
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*(u32*)branch.ptr = (0x41820000 | ((s16)(((distance)+1)) & 0xfffc));
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break;
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case _BNE:
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*(u32*)branch.ptr = (0x40820000 | ((s16)(((distance)+1)) & 0xfffc));
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break;
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case _BLT:
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*(u32*)branch.ptr = (0x41800000 | ((s16)(((distance)+1)) & 0xfffc));
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break;
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case _BLE:
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*(u32*)branch.ptr = (0x40810000 | ((s16)(((distance)+1)) & 0xfffc));
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break;
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case _BGT:
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*(u32*)branch.ptr = (0x41810000 | ((s16)(((distance)+1)) & 0xfffc));
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break;
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case _BGE:
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*(u32*)branch.ptr = (0x40800000 | ((s16)(((distance)+1)) & 0xfffc));
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break;
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default:
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// Error !!!
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_assert_msg_(DYNA_REC, 0, "SetJumpTarget unknow branch type: %d", branch.type);
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break;
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}
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}
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// Compare
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void PPCXEmitter::CMPLWI(PPCReg dest, unsigned short imm) {
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Write32((0x28000000 | (dest << 16) | ((imm) & 0xffff)));
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}
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void PPCXEmitter::CMPLI(PPCReg dest, unsigned short imm) {
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Write32((0x2C000000 | (dest << 16) | ((imm) & 0xffff)));
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}
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void PPCXEmitter::CMP(PPCReg a, PPCReg b) {
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Write32((31 << 26) | (a << 16) | (b << 11));
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}
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// Others operation
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void PPCXEmitter::ORI(PPCReg src, PPCReg dest, unsigned short imm) {
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if (!((imm == 0) && ((src^dest) == 0))) {
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u32 instr = (0x60000000 | (src << 21) | (dest << 16) | (imm & 0xffff));
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Write32(instr);
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}
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}
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void PPCXEmitter::OR(PPCReg Rd, PPCReg Ra, PPCReg Rb) {
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u32 instr = (0x7C000378 | (Ra << 21) | (Rd << 16) | (Rb << 11));
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Write32(instr);
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}
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void PPCXEmitter::SUBF(PPCReg Rd, PPCReg Ra, PPCReg Rb) {
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u32 instr = (0x7C000050 | (Rd << 21) | (Ra << 16) | (Rb << 11));
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Write32(instr);
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}
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// Quick Call
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// dest = LIS(imm) + ORI(+imm)
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void PPCXEmitter::MOVI2R(PPCReg dest, unsigned int imm) {
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/*
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if (imm == (unsigned short)imm) {
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// 16bit
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LI(dest, imm & 0xFFFF);
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ANDIS(dest, dest, 0);
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} else
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*/
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{
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// HI 16bit
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LIS(dest, imm>>16);
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if ((imm & 0xFFFF) != 0) {
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// LO 16bit
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ORI(dest, dest, imm & 0xFFFF);
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}
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}
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}
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void PPCXEmitter::QuickCallFunction(void *func) {
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/*
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// Must check if we need to use bctrl or simple branch
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u32 func_addr = (u32) func;
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u32 code_addr = (u32) code;
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if (func_addr - code_addr > 0x1fffffc) {
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// Load func address
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MOVI2R(R0, func_addr);
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// Set it to link register
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MTCTR(R0);
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// Branch
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BCTRL();
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} else {
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// Direct branch
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BL(func);
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}
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*/
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u32 func_addr = (u32) func;
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// Load func address
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MOVI2R(R0, func_addr);
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// Set it to link register
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MTCTR(R0);
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// Branch
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BCTRL();
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}
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// Others ...
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void PPCXEmitter::SetCodePtr(u8 *ptr)
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{
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code = ptr;
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startcode = code;
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lastCacheFlushEnd = ptr;
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}
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const u8 *PPCXEmitter::GetCodePtr() const
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{
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return code;
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}
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u8 *PPCXEmitter::GetWritableCodePtr()
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{
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return code;
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}
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void PPCXEmitter::ReserveCodeSpace(u32 bytes)
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{
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/*
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for (u32 i = 0; i < bytes/4; i++)
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Write32(0xE1200070); //bkpt 0
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*/
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for (u32 i = 0; i < bytes/4; i++)
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Write32(0x60000000); //nop
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}
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const u8 *PPCXEmitter::AlignCode16()
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{
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ReserveCodeSpace((-(s32)code) & 15);
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return code;
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}
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const u8 *PPCXEmitter::AlignCodePage()
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{
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ReserveCodeSpace((-(s32)code) & 4095);
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return code;
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}
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void PPCXEmitter::FlushIcache()
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{
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FlushIcacheSection(lastCacheFlushEnd, code);
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lastCacheFlushEnd = code;
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}
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void PPCXEmitter::FlushIcacheSection(u8 *start, u8 *end)
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{
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u8 * addr = start;
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while(addr < end) {
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__asm dcbst r0, addr
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__asm icbi r0, addr
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addr += 4;
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}
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__emit(0x7c0004ac);//sync
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__emit(0x4C00012C);//isync
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}
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} // namespace
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358
Common/ppcEmitter.h
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358
Common/ppcEmitter.h
Normal file
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// Copyright (C) 2003 Dolphin Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official SVN repository and contact information can be found at
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// http://code.google.com/p/dolphin-emu/
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// WARNING - THIS LIBRARY IS NOT THREAD SAFE!!!
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// http://www.csd.uwo.ca/~mburrel/stuff/ppc-asm.html
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// http://publib.boulder.ibm.com/infocenter/pseries/v5r3/index.jsp?topic=/com.ibm.aix.aixassem/doc/alangref/linkage_convent.htm
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// http://publib.boulder.ibm.com/infocenter/pseries/v5r3/index.jsp?topic=/com.ibm.aix.aixassem/doc/alangref/instruction_set.htm
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#ifndef _DOLPHIN_PPC_CODEGEN_
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#define _DOLPHIN_PPC_CODEGEN_
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||||
|
||||
#include "Common.h"
|
||||
#include "MemoryUtil.h"
|
||||
#include <vector>
|
||||
|
||||
#undef _IP
|
||||
#undef R0
|
||||
#undef _SP
|
||||
#undef _LR
|
||||
#undef _PC
|
||||
#undef CALL
|
||||
|
||||
namespace PpcGen
|
||||
{
|
||||
enum PPCReg
|
||||
{
|
||||
// GPRs (32)
|
||||
// Behaves as zero does in some instructions
|
||||
R0 = 0,
|
||||
// Stack pointer (SP)
|
||||
R1,
|
||||
// Reserved
|
||||
R2,
|
||||
// Used to pass integer function parameters and return values
|
||||
R3, R4,
|
||||
// Used to pass integer function parameters
|
||||
R5, R6, R7, R8, R9, R10,
|
||||
// General purpose
|
||||
R11,
|
||||
// Scratch
|
||||
R12,
|
||||
// Unused by the compiler reserved
|
||||
R13,
|
||||
// General purpose
|
||||
R14, R15, R16, R17, R18, R19,
|
||||
R20, R21, R22, R23, R24, R25,
|
||||
R26, R27, R28, R29, R30, R31,
|
||||
|
||||
// CRs (7)
|
||||
CR0 = 0,
|
||||
|
||||
// FPRs (32)
|
||||
// Scratch
|
||||
FPR0,
|
||||
// Used to pass double word function parameters and return values
|
||||
FPR1, FPR2, FPR3, FPR4,
|
||||
FPR5, FPR6, FPR7, FPR8,
|
||||
FPR9, FPR10, FPR11, FPR12,
|
||||
FPR13,
|
||||
// General purpose
|
||||
FPR14, FPR15, FPR16, FPR17,
|
||||
FPR18, FPR19, FPR20, FPR21,
|
||||
FPR22, FPR23, FPR24, FPR25,
|
||||
FPR26, FPR27, FPR28, FPR29,
|
||||
FPR30, FPR31,
|
||||
|
||||
|
||||
// Vmx (128)
|
||||
VR0,
|
||||
// Used to pass vector function parameters and return values
|
||||
VR1, VR2, VR3, VR4,
|
||||
VR5, VR6, VR7, VR8,
|
||||
VR9, VR10, VR11, VR12,
|
||||
VR13, // ...
|
||||
|
||||
// Others regs
|
||||
LR, CTR, XER, FPSCR,
|
||||
|
||||
// End
|
||||
|
||||
INVALID_REG = 0xFFFFFFFF
|
||||
};
|
||||
enum IntegerSize
|
||||
{
|
||||
I_I8 = 0,
|
||||
I_I16,
|
||||
I_I32,
|
||||
I_I64
|
||||
};
|
||||
|
||||
enum
|
||||
{
|
||||
NUMGPRs = 31,
|
||||
};
|
||||
|
||||
typedef const u8* JumpTarget;
|
||||
|
||||
|
||||
enum FixupBranchType {
|
||||
_B,
|
||||
_BEQ,
|
||||
_BNE,
|
||||
_BLT,
|
||||
_BLE,
|
||||
_BGT,
|
||||
_BGE,
|
||||
// Link register
|
||||
_BL
|
||||
};
|
||||
|
||||
struct FixupBranch
|
||||
{
|
||||
u8 *ptr;
|
||||
u32 condition; // Remembers our codition at the time
|
||||
FixupBranchType type; //0 = B 1 = BL
|
||||
};
|
||||
|
||||
class PPCXEmitter
|
||||
{
|
||||
private:
|
||||
u8 *code, *startcode;
|
||||
u8 *lastCacheFlushEnd;
|
||||
u32 condition;
|
||||
|
||||
protected:
|
||||
// Weite opcode
|
||||
inline void Write32(u32 value) {*(u32*)code = value; code+=4;}
|
||||
|
||||
public:
|
||||
PPCXEmitter() : code(0), startcode(0), lastCacheFlushEnd(0) {
|
||||
}
|
||||
PPCXEmitter(u8 *code_ptr) {
|
||||
code = code_ptr;
|
||||
lastCacheFlushEnd = code_ptr;
|
||||
startcode = code_ptr;
|
||||
}
|
||||
virtual ~PPCXEmitter() {}
|
||||
|
||||
void SetCodePtr(u8 *ptr);
|
||||
void ReserveCodeSpace(u32 bytes);
|
||||
const u8 *AlignCode16();
|
||||
const u8 *AlignCodePage();
|
||||
const u8 *GetCodePtr() const;
|
||||
void FlushIcache();
|
||||
void FlushIcacheSection(u8 *start, u8 *end);
|
||||
u8 *GetWritableCodePtr();
|
||||
|
||||
|
||||
// Special purpose instructions
|
||||
|
||||
// Debug Breakpoint
|
||||
void BKPT(u16 arg);
|
||||
|
||||
// Hint instruction
|
||||
void YIELD();
|
||||
|
||||
// Do nothing
|
||||
void NOP(int count = 1); //nop padding - TODO: fast nop slides, for amd and intel (check their manuals)
|
||||
|
||||
// FixupBranch ops
|
||||
FixupBranch B();
|
||||
FixupBranch BL();
|
||||
FixupBranch BNE();
|
||||
FixupBranch BLT();
|
||||
|
||||
FixupBranch B_Cond(FixupBranchType type);
|
||||
|
||||
void SetJumpTarget(FixupBranch const &branch);
|
||||
|
||||
// Branch ops
|
||||
void B (const void *fnptr);
|
||||
void BL(const void *fnptr);
|
||||
void BA (const void *fnptr);
|
||||
void BLA(const void *fnptr);
|
||||
void BEQ(const void *fnptr);
|
||||
void BLT(const void *fnptr);
|
||||
void BGT(const void *fnptr);
|
||||
void BEQ (PPCReg r);
|
||||
|
||||
void BCTRL ();
|
||||
void BCTR();
|
||||
|
||||
// Link Register
|
||||
void MFLR(PPCReg r);
|
||||
void MTLR(PPCReg r);
|
||||
void MTCTR(PPCReg r);
|
||||
void BLR();
|
||||
void BGTLR();
|
||||
|
||||
|
||||
// Logical Ops
|
||||
void AND (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
void ANDI (PPCReg Rs, PPCReg Ra, unsigned short imm);
|
||||
void ANDIS(PPCReg Rs, PPCReg Ra, unsigned short imm);
|
||||
void NAND (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
void OR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
void ORC (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
void NOR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
void XOR (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
void NEG (PPCReg Rs, PPCReg Ra, PPCReg Rb);
|
||||
|
||||
// Arithmetics ops
|
||||
void ADD (PPCReg Rd, PPCReg Ra, PPCReg Rb);
|
||||
void ADDI (PPCReg Rd, PPCReg Ra, unsigned short imm);
|
||||
void ADDIS (PPCReg Rd, PPCReg Ra, unsigned short imm);
|
||||
void ADDC (PPCReg Rd, PPCReg Ra, PPCReg Rb);
|
||||
void SUBF (PPCReg Rd, PPCReg Ra, PPCReg Rb);
|
||||
void SUBFC (PPCReg Rd, PPCReg Ra, PPCReg Rb);
|
||||
|
||||
// Floating ops
|
||||
void DIVW(PPCReg dest, PPCReg dividend, PPCReg divisor);
|
||||
void DIVWU(PPCReg dest, PPCReg dividend, PPCReg divisor);
|
||||
void MULLW(PPCReg dest, PPCReg src, PPCReg op2);
|
||||
void MULHW (PPCReg dest, PPCReg src, PPCReg op2);
|
||||
void MULHWS(PPCReg dest, PPCReg src, PPCReg op2);
|
||||
|
||||
void ORI (PPCReg src, PPCReg dest, unsigned short imm);
|
||||
|
||||
// Memory load/store operations
|
||||
void LI (PPCReg dest, unsigned short imm);
|
||||
void LIS (PPCReg dest, unsigned short imm);
|
||||
// dest = LIS(imm) + ORI(+imm)
|
||||
void MOVI2R (PPCReg dest, unsigned int imm);
|
||||
|
||||
// 8bit
|
||||
void LBZ (PPCReg dest, PPCReg src, int offset = 0);
|
||||
// 16bit
|
||||
void LHZ (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void LHBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 32 bit
|
||||
void LWZ (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void LWBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 64 bit
|
||||
void LD (PPCReg dest, PPCReg src, int offset = 0);
|
||||
|
||||
// 8 bit
|
||||
void STB (PPCReg dest, PPCReg src, int offset = 0);
|
||||
// 16 bit
|
||||
void STH (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STHBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 32 bit
|
||||
void STW (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STWU (PPCReg dest, PPCReg src, int offset = 0);
|
||||
void STWBRX (PPCReg dest, PPCReg src, PPCReg offset);
|
||||
// 64 bit
|
||||
void STD (PPCReg dest, PPCReg src, int offset = 0);
|
||||
|
||||
// Compare
|
||||
void CMPLWI (PPCReg dest, unsigned short imm);
|
||||
void CMPLI (PPCReg dest, unsigned short imm);
|
||||
void CMP (PPCReg a, PPCReg b);
|
||||
|
||||
// Debug !
|
||||
void Break() {
|
||||
Write32(0x0FE00016);
|
||||
}
|
||||
|
||||
void MR (PPCReg to, PPCReg from) {
|
||||
OR(to, from, from);
|
||||
}
|
||||
|
||||
void QuickCallFunction(void *func);
|
||||
protected:
|
||||
|
||||
}; // class PPCXEmitter
|
||||
|
||||
|
||||
// Everything that needs to generate X86 code should inherit from this.
|
||||
// You get memory management for free, plus, you can use all the MOV etc functions without
|
||||
// having to prefix them with gen-> or something similar.
|
||||
class PPCXCodeBlock : public PPCXEmitter
|
||||
{
|
||||
protected:
|
||||
u8 *region;
|
||||
size_t region_size;
|
||||
|
||||
public:
|
||||
PPCXCodeBlock() : region(NULL), region_size(0) {}
|
||||
virtual ~PPCXCodeBlock() { if (region) FreeCodeSpace(); }
|
||||
|
||||
// Call this before you generate any code.
|
||||
void AllocCodeSpace(int size)
|
||||
{
|
||||
region_size = size;
|
||||
region = (u8*)AllocateExecutableMemory(region_size);
|
||||
SetCodePtr(region);
|
||||
}
|
||||
|
||||
// Always clear code space with breakpoints, so that if someone accidentally executes
|
||||
// uninitialized, it just breaks into the debugger.
|
||||
void ClearCodeSpace()
|
||||
{
|
||||
// x86/64: 0xCC = breakpoint
|
||||
memset(region, 0xCC, region_size);
|
||||
ResetCodePtr();
|
||||
}
|
||||
|
||||
// Call this when shutting down. Don't rely on the destructor, even though it'll do the job.
|
||||
void FreeCodeSpace()
|
||||
{
|
||||
region = NULL;
|
||||
region_size = 0;
|
||||
}
|
||||
|
||||
bool IsInSpace(u8 *ptr)
|
||||
{
|
||||
return ptr >= region && ptr < region + region_size;
|
||||
}
|
||||
|
||||
// Cannot currently be undone. Will write protect the entire code region.
|
||||
// Start over if you need to change the code (call FreeCodeSpace(), AllocCodeSpace()).
|
||||
void WriteProtect()
|
||||
{
|
||||
//WriteProtectMemory(region, region_size, true);
|
||||
}
|
||||
void UnWriteProtect()
|
||||
{
|
||||
//UnWriteProtectMemory(region, region_size, false);
|
||||
}
|
||||
|
||||
void ResetCodePtr()
|
||||
{
|
||||
SetCodePtr(region);
|
||||
}
|
||||
|
||||
size_t GetSpaceLeft() const
|
||||
{
|
||||
return region_size - (GetCodePtr() - region);
|
||||
}
|
||||
|
||||
u8 *GetBasePtr() {
|
||||
return region;
|
||||
}
|
||||
|
||||
size_t GetOffset(u8 *ptr) {
|
||||
return ptr - region;
|
||||
}
|
||||
};
|
||||
|
||||
} // namespace
|
||||
|
||||
#endif // _DOLPHIN_INTEL_CODEGEN_
|
||||
Loading…
Reference in New Issue
Block a user