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armjit: Don't use R1 in the regcache.

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This way it can be used in swl/swr/ins as a temp reg.
Note: those instructions are currently DISABLEd, though.
This commit is contained in:
Unknown W. Brackets 2013-03-07 02:09:13 -08:00
parent 925e4e42bd
commit cea396e901
1 changed files with 1 additions and 1 deletions
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2
Core/MIPS/ARM/ArmRegCache.cpp
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@ -48,7 +48,7 @@ static const ARMReg *GetMIPSAllocationOrder(int &count) {
// R8 is used to preserve flags in nasty branches.
// R9 and upwards are reserved for jit basics.
static const ARMReg allocationOrder[] = {
R12, R1, R2, R3, R4, R5, R6, R7,
R2, R3, R4, R5, R6, R7, R12,
};
count = sizeof(allocationOrder) / sizeof(const int);
return allocationOrder;