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Implement vscl in the x86 jit.

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This commit is contained in:
Unknown W. Brackets 2013-04-19 22:47:49 -07:00
parent d595a5d567
commit cfac7324d6
5 changed files with 58 additions and 1 deletions
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4
Core/MIPS/ARM/ArmCompVFPU.cpp
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@ -714,4 +714,8 @@ namespace MIPSComp
DISABLE; DISABLE;
} }
void Jit::Comp_VScl(u32 op) {
DISABLE;
}
} }

1
Core/MIPS/ARM/ArmJit.h
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@ -193,6 +193,7 @@ public:
void Comp_Mftv(u32 op); void Comp_Mftv(u32 op);
void Comp_Vmtvc(u32 op); void Comp_Vmtvc(u32 op);
void Comp_Vmmov(u32 op); void Comp_Vmmov(u32 op);
void Comp_VScl(u32 op);
ArmJitBlockCache *GetBlockCache() { return &blocks; } ArmJitBlockCache *GetBlockCache() { return &blocks; }

2
Core/MIPS/MIPSTables.cpp
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@ -490,7 +490,7 @@ const MIPSInstruction tableVFPU1[8] =
{ {
INSTR("vmul",&Jit::Comp_VecDo3, Dis_VectorSet3, Int_VecDo3, IS_VFPU|OUT_EAT_PREFIX), INSTR("vmul",&Jit::Comp_VecDo3, Dis_VectorSet3, Int_VecDo3, IS_VFPU|OUT_EAT_PREFIX),
INSTR("vdot",&Jit::Comp_VDot, Dis_VectorDot, Int_VDot, IS_VFPU|OUT_EAT_PREFIX), INSTR("vdot",&Jit::Comp_VDot, Dis_VectorDot, Int_VDot, IS_VFPU|OUT_EAT_PREFIX),
INSTR("vscl",&Jit::Comp_Generic, Dis_VScl, Int_VScl, IS_VFPU|OUT_EAT_PREFIX), INSTR("vscl",&Jit::Comp_VScl, Dis_VScl, Int_VScl, IS_VFPU|OUT_EAT_PREFIX),
{-2}, {-2},
INSTR("vhdp",&Jit::Comp_Generic, Dis_Generic, Int_VHdp, IS_VFPU|OUT_EAT_PREFIX), INSTR("vhdp",&Jit::Comp_Generic, Dis_Generic, Int_VHdp, IS_VFPU|OUT_EAT_PREFIX),
INSTR("vcrs",&Jit::Comp_Generic, Dis_Vcrs, Int_Vcrs, IS_VFPU), INSTR("vcrs",&Jit::Comp_Generic, Dis_Vcrs, Int_Vcrs, IS_VFPU),

51
Core/MIPS/x86/CompVFPU.cpp
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@ -732,4 +732,55 @@ void Jit::Comp_Vmmov(u32 op) {
fpr.ReleaseSpillLocks(); fpr.ReleaseSpillLocks();
} }
void Jit::Comp_VScl(u32 op) {
CONDITIONAL_DISABLE;
if (js.HasUnknownPrefix())
DISABLE;
VectorSize sz = GetVecSize(op);
int n = GetNumVectorElements(sz);
u8 sregs[4], dregs[4], scale;
GetVectorRegsPrefixS(sregs, sz, _VS);
// TODO: Prefixes seem strange...
GetVectorRegsPrefixT(&scale, V_Single, _VT);
GetVectorRegsPrefixD(dregs, sz, _VD);
// Move to XMM0 early, so we don't have to worry about overlap with scale.
MOVSS(XMM0, fpr.V(scale));
X64Reg tempxregs[4];
for (int i = 0; i < n; ++i)
{
if (!IsOverlapSafeAllowS(dregs[i], i, n, sregs))
{
int reg = fpr.GetTempV();
fpr.MapRegV(reg, MAP_NOINIT | MAP_DIRTY);
fpr.SpillLockV(reg);
tempxregs[i] = fpr.VX(reg);
}
else
{
fpr.MapRegV(dregs[i], (dregs[i] == sregs[i] ? 0 : MAP_NOINIT) | MAP_DIRTY);
fpr.SpillLockV(dregs[i]);
tempxregs[i] = fpr.VX(dregs[i]);
}
}
for (int i = 0; i < n; ++i)
{
if (!fpr.V(sregs[i]).IsSimpleReg(tempxregs[i]))
MOVSS(tempxregs[i], fpr.V(sregs[i]));
MULSS(tempxregs[i], R(XMM0));
}
for (int i = 0; i < n; ++i)
{
if (!fpr.V(dregs[i]).IsSimpleReg(tempxregs[i]))
MOVSS(fpr.V(dregs[i]), tempxregs[i]);
}
ApplyPrefixD(dregs, sz);
fpr.ReleaseSpillLocks();
}
} }

1
Core/MIPS/x86/Jit.h
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@ -203,6 +203,7 @@ public:
void Comp_Mftv(u32 op); void Comp_Mftv(u32 op);
void Comp_Vmtvc(u32 op); void Comp_Vmtvc(u32 op);
void Comp_Vmmov(u32 op); void Comp_Vmmov(u32 op);
void Comp_VScl(u32 op);
void Comp_DoNothing(u32 op); void Comp_DoNothing(u32 op);