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jit-ir: Less instructions cause flushing in constant propagation.
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5dbac165f4
commit
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@ -62,7 +62,7 @@ bool PropagateConstants(const IRWriter &in, IRWriter &out) {
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bool symmetric = true;
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if (out.GetConstants().size() > 128) {
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// Avoid causing a constant explosion.
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goto doDefault;
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goto doDefaultAndFlush;
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}
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switch (inst.op) {
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case IROp::SetConst:
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@ -134,6 +134,39 @@ bool PropagateConstants(const IRWriter &in, IRWriter &out) {
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}
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break;
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case IROp::Mult:
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case IROp::MultU:
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gpr.MapInIn(inst.src1, inst.src2);
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goto doDefault;
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case IROp::MovZ:
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case IROp::MovNZ:
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gpr.MapInInIn(inst.dest, inst.src1, inst.src2);
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goto doDefault;
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case IROp::Min:
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case IROp::Max:
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gpr.MapDirtyInIn(inst.dest, inst.src1, inst.src2);
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goto doDefault;
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case IROp::Clz:
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case IROp::BSwap16:
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case IROp::BSwap32:
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case IROp::Ext16to32:
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case IROp::Ext8to32:
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gpr.MapDirtyIn(inst.dest, inst.src1);
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goto doDefault;
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case IROp::MfHi:
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case IROp::MfLo:
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gpr.MapDirty(inst.dest);
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goto doDefault;
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case IROp::MtHi:
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case IROp::MtLo:
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gpr.MapIn(inst.src1);
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goto doDefault;
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case IROp::Store8:
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case IROp::Store16:
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case IROp::Store32:
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@ -175,6 +208,7 @@ bool PropagateConstants(const IRWriter &in, IRWriter &out) {
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case IROp::ExitToConstIfLtZ:
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default:
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{
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doDefaultAndFlush:
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gpr.FlushAll();
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doDefault:
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// Remap constants to the new reality
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@ -45,6 +45,12 @@ void IRRegCache::MapInIn(int rs, int rt) {
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Flush(rt);
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}
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void IRRegCache::MapInInIn(int rd, int rs, int rt) {
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Flush(rd);
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Flush(rs);
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Flush(rt);
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}
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void IRRegCache::MapDirtyIn(int rd, int rs) {
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if (rs != rd) {
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Discard(rd);
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@ -35,6 +35,7 @@ public:
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void MapDirty(int rd);
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void MapIn(int rd);
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void MapInIn(int rs, int rt);
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void MapInInIn(int rd, int rs, int rt);
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void MapDirtyIn(int rd, int rs);
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void MapDirtyInIn(int rd, int rs, int rt);
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