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Add some stubs to remember to implement these VFPU ops...

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This commit is contained in:
Henrik Rydgard 2013-02-02 23:47:00 +01:00
parent b7066a46a0
commit d44c5bff45
3 changed files with 39 additions and 15 deletions
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21
Core/MIPS/MIPSIntVFPU.cpp
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@ -1739,4 +1739,25 @@ bad:
EatPrefixes();
}
void Int_Vlgb(u32 op)
{
// S & D valid
_dbg_assert_msg_(CPU,0,"vlgb not implemented");
}
void Int_Vwbn(u32 op)
{
// S & D valid
_dbg_assert_msg_(CPU,0,"vwbn not implemented");
}
void Int_Vsbn(u32 op)
{
_dbg_assert_msg_(CPU,0,"vsbn not implemented");
}
void Int_Vsbz(u32 op)
{
_dbg_assert_msg_(CPU,0,"vsbz not implemented");
}
}

7
Core/MIPS/MIPSIntVFPU.h
View File

@ -77,5 +77,8 @@ namespace MIPSInt
void Int_Vslt(u32 op);
void Int_Vmfvc(u32 op);
void Int_Vmtvc(u32 op);
}
void Int_Vlgb(u32 op);
void Int_Vwbn(u32 op);
void Int_Vsbn(u32 op);
void Int_Vsbz(u32 op);
}

26
Core/MIPS/MIPSTables.cpp
View File

@ -415,8 +415,7 @@ const MIPSInstruction tableCop0[32] =
{Cop0CO},{Cop0CO},{Cop0CO},{Cop0CO},{Cop0CO},{Cop0CO},{Cop0CO},{Cop0CO},
};
//we won't encounter these since we only do user mode emulation
// we won't encounter these since we only do user mode emulation
const MIPSInstruction tableCop0CO[64] =
{
{-2},
@ -481,7 +480,7 @@ const MIPSInstruction tableVFPU0[8] =
{
INSTR("vadd",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vsub",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
INSTR("vsbn",&Jit::Comp_Generic, Dis_VectorSet3, 0, IS_VFPU),
INSTR("vsbn",&Jit::Comp_Generic, Dis_VectorSet3, Int_Vsbn, IS_VFPU),
{-2}, {-2}, {-2}, {-2},
INSTR("vdiv",&Jit::Comp_Generic, Dis_VectorSet3, Int_VecDo3, IS_VFPU),
@ -535,14 +534,14 @@ const MIPSInstruction tableVFPU4Jump[32] = //110100 xxxxx
{-2},
{-2},
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
INSTR("vwbn.s", &Jit::Comp_Generic, Dis_Generic, Int_Vwbn, IS_VFPU),
};
const MIPSInstruction tableVFPU7[32] =
@ -555,7 +554,8 @@ const MIPSInstruction tableVFPU7[32] =
{-2},{-2},{-2},{-2},
//8
{-2},{-2},{-2},{-2},
{-2},{-2},{-2},{-2},
INSTR("vsbz", &Jit::Comp_Generic, Dis_Generic, Int_Vsbz, IS_VFPU),
{-2},{-2},{-2},
//16
{-2},
{-2},
@ -565,7 +565,7 @@ const MIPSInstruction tableVFPU7[32] =
{-2},
{-2},
{-2},
INSTR("vlgb", &Jit::Comp_Generic, Dis_Generic, 0, IS_VFPU),
INSTR("vlgb", &Jit::Comp_Generic, Dis_Generic, Int_Vlgb, IS_VFPU),
//24
INSTR("vuc2i", &Jit::Comp_Generic, Dis_Vs2i, Int_Vx2i, IS_VFPU), // Seen in BraveStory, initialization 110100 00001110000 000 0001 0000 0000
INSTR("vc2i", &Jit::Comp_Generic, Dis_Vs2i, Int_Vx2i, IS_VFPU),