Unknown W. Brackets
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afe42fa505
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Log an error if ftruncate() fails.
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2015-04-08 12:08:46 -07:00 |
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Henrik Rydgard
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56a596d099
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Fix line endings in some vcproj.filters files. Should prevent future annoying conflicts, althoug this one is ugly.
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2015-04-08 20:58:04 +02:00 |
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Unknown W. Brackets
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08032e4b14
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Fix a leak in an error condition.
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2015-04-08 11:58:00 -07:00 |
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Unknown W. Brackets
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5452129dfe
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Avoid null termination issues on long paths.
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2015-04-08 11:58:00 -07:00 |
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Unknown W. Brackets
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3cb474047b
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Fix potential shift by negative number.
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2015-04-08 11:57:59 -07:00 |
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Unknown W. Brackets
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10626e356d
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Avoid a potential divide by zero.
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2015-04-08 11:57:59 -07:00 |
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Unknown W. Brackets
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8a3a67dc5b
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Avoid evaluating an uninitialized value.
Doesn't matter anyway here.
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2015-04-08 11:57:58 -07:00 |
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Unknown W. Brackets
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c0dde25e5a
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Set the sid on StreamInfo.
It's not used anyway, but if we have it there it might be later.
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2015-04-08 11:57:58 -07:00 |
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Unknown W. Brackets
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fc0788bc95
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Avoid unpredictable behavior in error condition.
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2015-04-08 11:57:57 -07:00 |
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Unknown W. Brackets
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5285f977e4
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Initialize a member that was missed.
Oops, this didn't matter much but it should start at 0.
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2015-04-08 11:29:28 -07:00 |
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Unknown W. Brackets
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53340056fd
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Remove some unreachable code.
This wasn't being used, and the other path should be fine.
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2015-04-08 11:28:52 -07:00 |
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Unknown W. Brackets
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b5bb07b12c
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Fix HLE logging for args > 8.
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2015-04-08 00:55:49 -07:00 |
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Henrik Rydgård
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4ba1113119
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Merge pull request #7665 from unknownbrackets/jit-minor
Avoid some unlikely writes to $0
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2015-04-08 09:33:15 +02:00 |
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Unknown W. Brackets
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ffb583e298
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ARM64: Move files into MSVC project filter.
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2015-04-07 22:27:20 -07:00 |
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Unknown W. Brackets
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b0d291032d
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armjit Avoid cfc1/mfc1 to $0.
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2015-04-07 18:30:36 -07:00 |
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Unknown W. Brackets
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7ce5841f30
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jit: Avoid mfhi/mflo to $0.
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2015-04-07 18:25:28 -07:00 |
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Unknown W. Brackets
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788b9d78f8
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jit: Avoid a super unlikely write to zero.
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2015-04-07 18:20:37 -07:00 |
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Henrik Rydgård
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bc490e60ab
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Merge pull request #7661 from lioncash/false
sceIo: Remove always false condition
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2015-04-06 23:29:52 +02:00 |
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Henrik Rydgård
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8afab3f94f
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Merge pull request #7652 from hrydgard/arm-64
ARM64 Support
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2015-04-06 18:42:21 +02:00 |
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Henrik Rydgard
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50113a446d
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Update native
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2015-04-06 18:31:40 +02:00 |
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Henrik Rydgård
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d0b35e88a2
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No need to generate a zero register..
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2015-04-06 18:13:46 +02:00 |
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Henrik Rydgård
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a7b7fedc9f
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Cleaup. Add a missing vertex dec func.
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2015-04-06 18:13:45 +02:00 |
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Henrik Rydgård
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4bd95b0cb7
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ARM64: Fixup software skinning. Now seems to work, at least in a bunch of games..
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2015-04-06 18:13:45 +02:00 |
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Henrik Rydgård
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39be916d8a
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ARM64: More emitter/disasm
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2015-04-06 18:13:44 +02:00 |
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Henrik Rydgård
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459ba28655
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ARM64: SW skinning runs without crashing but is broken.
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2015-04-06 18:13:44 +02:00 |
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Henrik Rydgård
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f937b4b74b
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ARM64 vtxdec: Basic implementation of the 16-bit color formats
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2015-04-06 18:13:43 +02:00 |
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Henrik Rydgård
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597595f279
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ARM64: Start implementing soft-skinning. Disabled for now, needs work.
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2015-04-06 18:13:43 +02:00 |
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Henrik Rydgård
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f82b613371
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ARM64 emitter/disasm: Implement ASIMD LDP/STP instructions
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2015-04-06 18:13:42 +02:00 |
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Henrik Rydgård
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a8c2d0945a
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ARM64: lwl: Pass INVALID_REG to be sure SCRATCH1 doesn't get overwritten...
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2015-04-06 18:13:41 +02:00 |
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Henrik Rydgård
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a710abb58b
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A bunch more vertex decoder funcs
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2015-04-06 18:13:41 +02:00 |
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Henrik Rydgård
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013bbc71af
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ARM64: Fix DUP disasm, INS disasm
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2015-04-06 18:13:40 +02:00 |
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Henrik Rydgård
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a3db3ed5c1
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ARM64 emitter: Fix UXTL/SXTL and friends. Add disasm.
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2015-04-06 18:13:40 +02:00 |
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Henrik Rydgård
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853d6ea34b
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ARM64 emitter: Add FMLA/FMLS vector versions
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2015-04-06 18:13:39 +02:00 |
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Henrik Rydgård
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065cd97dc2
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ARM64: LLVM buildfix, some more disasm
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2015-04-06 18:13:39 +02:00 |
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Henrik Rydgård
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13c9390c53
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ARM64: Emitter fix, disable swl/swr/lwl/lwr again fully
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2015-04-06 18:13:38 +02:00 |
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Henrik Rydgård
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f6c4e8e784
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Quickfix blackberry build
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2015-04-06 18:13:38 +02:00 |
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Henrik Rydgård
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9f24076b63
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Make the unittests build on mac
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2015-04-06 18:13:37 +02:00 |
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Henrik Rydgård
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95cd1478de
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Restore the x86 build.
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2015-04-06 18:13:37 +02:00 |
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Henrik Rydgård
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fbaffdceab
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Remove some outdated comments, minor stuff
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2015-04-06 18:13:36 +02:00 |
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Henrik Rydgard
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0a70618f87
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ARM64: Accurate floating point rounding. For some reason, FTZ doesn't seem to work though.
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2015-04-06 18:13:36 +02:00 |
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Henrik Rydgard
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7d918c0ad8
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ARM64: Just some disasm improvements
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2015-04-06 18:13:35 +02:00 |
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Henrik Rydgard
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ad3d539451
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ARM64: Attempt at lwl/lwr/swl/swr. The first two don't work
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2015-04-06 18:13:35 +02:00 |
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Henrik Rydgard
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44286a2b37
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ARM64: Accurate float->int conversion with rounding mode.
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2015-04-06 18:13:34 +02:00 |
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Henrik Rydgard
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4618275f99
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ARM64: Add a few aliases to emitter. Disasm fixes.
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2015-04-06 18:13:33 +02:00 |
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Henrik Rydgard
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acf08eefa8
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ARM64: Fix FCVTL, use it in v2hf
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2015-04-06 18:13:33 +02:00 |
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Henrik Rydgard
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8eedcc7fb0
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ARM64: Speedup fpu/vfpu load/stores too using "pointerification". Actually noticeable gain.
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2015-04-06 18:13:32 +02:00 |
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Henrik Rydgard
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ad648baa9c
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ARM64 regcache: Add support to "pointerify" registers. Use in load/store to cut down instructions.
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2015-04-06 18:13:32 +02:00 |
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Henrik Rydgard
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0849e270ee
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ARM64: fmla encoding, more disasm
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2015-04-06 18:13:31 +02:00 |
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Henrik Rydgard
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2780eef595
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ARM64: Another couple of VFPU ops
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2015-04-06 18:13:31 +02:00 |
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Henrik Rydgard
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ca58f322e5
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ARM64: Port over some missing VFPU instructions from ARM. Not much left now.
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2015-04-06 18:13:30 +02:00 |
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