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48 Commits

Author SHA1 Message Date
Unknown W. Brackets
313ffdb495 Add a stub for clz/clo in x86 jit. 2013-02-21 01:25:02 -08:00
Unknown W. Brackets
2db368c29a Add more imm handling for shifts in x86 jit. 
This is actually hit, and propagates more imms through.
 2013-02-21 01:25:00 -08:00
Unknown W. Brackets
a438791e7c Initial (very inefficient) vmmov for x86 jit. 
This makes #464 work (at least LittleBigPlanet), but only in x86 jit.
 2013-02-18 23:21:18 -08:00
Unknown W. Brackets
b8e2177591 Jit vzero/vone, which are easy and common (x86.) 2013-02-18 22:15:47 -08:00
Unknown W. Brackets
2dfdf3ffeb Implement Comp_VV2Op vfpu ops in the x86 jit. 
Also, some cleanup.  No need for this extra boilerplate, simplify...

This makes the Bink video issue slightly better, in jit only.
 2013-02-18 20:43:28 -08:00
Unknown W. Brackets
afb7c0b83c Assume prefixes start default until proven wrong. 
Currently this means nothing since the MIPSTables flags are wrong.
It will blow the cache once, after the first vfpu op.
 2013-02-18 01:14:57 -08:00
Unknown W. Brackets
8ea59990ab Make applying prefixes mostly automatic. 
And implement (hopefully) D prefixes.
 2013-02-18 00:11:57 -08:00
Unknown W. Brackets
27942606ad Use prefixD directly in jit, just like interp now. 2013-02-17 22:46:34 -08:00
Unknown W. Brackets
08a42a1aaf Preserve orig regs when applying vfpu prefixes. 2013-02-17 22:37:56 -08:00
Unknown W. Brackets
f532951331 Automatically eat prefixes in x86 jit. 
Simplifies the code and makes it easier to know they're eaten
even for ops not yet jitted.
 2013-02-17 17:53:53 -08:00
Unknown W. Brackets
2b441f1638 Initial implementation of jit vadd/vsub/vdiv/vmul. 2013-02-15 08:35:34 -08:00
Unknown W. Brackets
b9506c9568 Minor cleanup for vdot in x86 jit. 2013-02-15 08:35:34 -08:00
Unknown W. Brackets
ccad259ae5 Keep track of VFPU prefixes and flush them in jit. 2013-02-15 08:35:33 -08:00
Unknown W. Brackets
4eca76e0cc Check for s/t/d prefix reg changes in jit. 2013-02-14 00:27:09 -08:00
Unknown W. Brackets
19cc652a37 Correct NaN handling in fpu comparisons. 2013-02-13 01:54:07 -08:00
Henrik Rydgard
78923f5538 Jit a little more (vfpu single load/store, transfer instructions) 2013-02-10 12:14:55 +01:00
Unknown W. Brackets
f777c872e6 Jit unaligned reads/writes. 
This mostly just improves perf on debug, not really on the map for release.
 2013-02-02 13:12:34 -08:00
Unknown W. Brackets
44b5adeaac Properly jit the break instruction. 
Otherwise, it just keeps on going past it.
We never want to hit this anyway, but it's good to know if we do.
 2013-02-01 00:49:14 -08:00
Henrik Rydgard
90b11bba37 Implement mult, multu, mflo/hi, mtlo/hi in x86 JIT 2013-01-29 00:48:42 +01:00
Unknown W. Brackets
a7b5433ba7 Make sure fastmem isn't confused by rs changing. 2013-01-26 23:18:50 -08:00
Unknown W. Brackets
a89d61463e Make the VFPU jit use far jumps for memory access. 2013-01-26 23:08:19 -08:00
Unknown W. Brackets
0e8e9697c5 Add lv.q/sv.q support to the x86 jit. 2013-01-26 10:09:18 -08:00
Unknown W. Brackets
b77ce99d01 Oops, no slow read for immediates usually. 2013-01-26 09:27:52 -08:00
Unknown W. Brackets
9cd5836b85 Rename WriteFinish() to Finish() is safe mem. 
It's nothing to do with writing.
 2013-01-26 09:09:47 -08:00
Unknown W. Brackets
3e419f513a Refactor jit safe memory reads without dup code. 
But, maybe too automagical...
 2013-01-26 08:42:34 -08:00
Henrik Rydgard
2738417040 VFPU JIT: start setting up infrastructure. very incomplete. vdot works if undisabled, but isn't complete. 2013-01-26 01:34:19 +01:00
Henrik Rydgard
68991511ee Split out the FPU reg cache into its own file too. 2013-01-26 01:34:19 +01:00
Henrik Rydgard
aabc0aa9ef Quick implementation of LV.Q and SV.Q in x86/x64 JIT 2013-01-25 19:50:30 +01:00
Henrik Rydgård
0f080aeaaa Merge pull request #492 from unknownbrackets/jit-minor 
ALU jit optimizations
 2013-01-25 01:01:34 -08:00
Unknown W. Brackets
ab9bea068c Jit reg+reg compile time, and avoid flushing EDX. 2013-01-25 00:16:55 -08:00
Unknown W. Brackets
2eba209f64 Move around the jit nice delay slot logic. 
Nice delay slots don't not save flags, they run before the CMP.
 2013-01-24 07:31:51 -08:00
Unknown W. Brackets
c324983340 Make the jit support bltzal and friends. 
Fixes problems with jit in games.  Android changes completely untested.
 2013-01-22 08:04:01 -08:00
Unknown W. Brackets
a9d0390426 Adjust downcount before syscalls, not after. 
This makes jit slightly slower for syscalls, but it's minor and makes
sure jit and interpreter timing are determistically the same.
 2013-01-21 22:57:53 -08:00
Unknown W. Brackets
c897e6446a Don't over decr downcount when hitting a jit bp. 2013-01-21 19:41:12 -08:00
Unknown W. Brackets
dd69694302 Add some optional logging to debug jit branching. 2013-01-20 19:48:55 -08:00
Unknown W. Brackets
776eb8ab2e Simplify CompileDelaySlot(). 2013-01-20 19:48:54 -08:00
Unknown W. Brackets
e78223d2c0 Since flipping the op is easy, also do lb/lh. 2013-01-19 16:25:57 -08:00
Unknown W. Brackets
72e547420d Refactor jit slowmem, add lbu to jit since easy. 2013-01-19 11:11:45 -08:00
Unknown W. Brackets
5305017fc3 Properly save registers before the slowmem call. 2013-01-19 11:11:44 -08:00
Unknown W. Brackets
11c5cdfdb0 Refactor out all the CheckJitBreakpoint()s. 
Ah, much cleaner.
 2013-01-18 21:33:23 -08:00
Unknown W. Brackets
40ae3dfe45 Correctly break at branch points in x86 jit. 2013-01-18 21:12:53 -08:00
Unknown W. Brackets
beac991a9e Clear jit cache when changing breakpoints. 
For now, only when paused.  I don't think clearing the cache while
running is an awesome idea.
 2013-01-18 20:12:53 -08:00
Henrik Rydgard
674911ddba Move downcount into MIPSState for efficiency, enable block linking. 
On ARM JIT we can now reach it through the cpu context reg.
 2013-01-12 00:44:18 +01:00
Henrik Rydgård
f9133c1a56 Reset JIT before saving/loading state 2012-12-29 00:10:43 +01:00
Sacha
3c903dda24 Improve portability to future platforms. Make use of new USING_GLES2 define throughout PPSSPP. Also use ARM definition where suitable. Remove some redundancy with includes. 2012-11-26 13:25:14 +10:00
Sacha
41f5abab31 PPSSPP ported to Blackberry10 
Now builds on Playbook and Dev Alpha
Make emulator more compatible with other OS (case sensitivity, defines, includes)
Uses Android's code paths and backend
 2012-11-05 23:09:49 +10:00
Henrik Rydgard
64cc573703 Switch to "GPL 2.0 or later" for various reasons. I wrote most of the code I imported from Dolphin (which is GPL2-but-not-later), so it should be OK. 2012-11-04 23:24:00 +01:00
Henrik Rydgard
4f7ad15758 Add snapshot of the whole source code. 2012-11-01 16:19:01 +01:00