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https://github.com/libretro/ppsspp.git
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109ad17ac6
Also, correctly read delayslots using Read_Instruction on ARM.
190 lines
4.9 KiB
C++
190 lines
4.9 KiB
C++
// Copyright (C) 2003 Dolphin Project / 2012 PPSSPP Project
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "Common.h"
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#include "MemoryUtil.h"
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#include "MemArena.h"
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#include "ChunkFile.h"
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#include "MemMap.h"
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#include "Core.h"
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#include "MIPS/MIPS.h"
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#include "MIPS/JitCommon/JitCommon.h"
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#include "HLE/HLE.h"
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#include "CPU.h"
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#include "Debugger/SymbolMap.h"
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namespace Memory
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{
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// The base pointer to the auto-mirrored arena.
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u8* base = NULL;
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// The MemArena class
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MemArena g_arena;
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// ==============
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// 64-bit: Pointers to low-mem (sub-0x10000000) mirror
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// 32-bit: Same as the corresponding physical/virtual pointers.
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u8 *m_pRAM;
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u8 *m_pScratchPad;
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u8 *m_pVRAM;
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u8 *m_pPhysicalScratchPad;
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u8 *m_pUncachedScratchPad;
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// 64-bit: Pointers to high-mem mirrors
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// 32-bit: Same as above
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u8 *m_pPhysicalRAM;
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u8 *m_pUncachedRAM;
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u8 *m_pKernelRAM; // RAM mirrored up to "kernel space". Fully accessible at all times currently.
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u8 *m_pPhysicalVRAM;
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u8 *m_pUncachedVRAM;
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// Holds the ending address of the PSP's user space.
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// Required for HD Remasters to work properly.
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// These replace RAM_SIZE and RAM_MASK, respectively.
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u32 g_MemoryMask;
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u32 g_MemorySize;
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// We don't declare the IO region in here since its handled by other means.
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static MemoryView views[] =
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{
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{&m_pScratchPad, &m_pPhysicalScratchPad, 0x00010000, SCRATCHPAD_SIZE, 0},
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{NULL, &m_pUncachedScratchPad, 0x40010000, SCRATCHPAD_SIZE, MV_MIRROR_PREVIOUS},
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{&m_pVRAM, &m_pPhysicalVRAM, 0x04000000, 0x00800000, 0},
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{NULL, &m_pUncachedVRAM, 0x44000000, 0x00800000, MV_MIRROR_PREVIOUS},
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{&m_pRAM, &m_pPhysicalRAM, 0x08000000, g_MemorySize, MV_IS_PRIMARY_RAM}, // only from 0x08800000 is it usable (last 24 megs)
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{NULL, &m_pUncachedRAM, 0x48000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM},
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{NULL, &m_pKernelRAM, 0x88000000, g_MemorySize, MV_MIRROR_PREVIOUS | MV_IS_PRIMARY_RAM},
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// TODO: There are a few swizzled mirrors of VRAM, not sure about the best way to
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// implement those.
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};
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static const int num_views = sizeof(views) / sizeof(MemoryView);
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void Init()
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{
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int flags = 0;
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Memory::g_MemoryMask = Memory::g_MemorySize - 1;
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for (size_t i = 0; i < ARRAY_SIZE(views); i++) {
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if (views[i].flags & MV_IS_PRIMARY_RAM)
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views[i].size = g_MemorySize;
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}
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base = MemoryMap_Setup(views, num_views, flags, &g_arena);
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INFO_LOG(MEMMAP, "Memory system initialized. RAM at %p (mirror at 0 @ %p, uncached @ %p)",
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m_pRAM, m_pPhysicalRAM, m_pUncachedRAM);
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}
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void DoState(PointerWrap &p)
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{
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p.DoArray(m_pRAM, g_MemorySize);
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p.DoMarker("RAM");
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p.DoArray(m_pVRAM, VRAM_SIZE);
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p.DoMarker("VRAM");
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p.DoArray(m_pScratchPad, SCRATCHPAD_SIZE);
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p.DoMarker("ScratchPad");
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}
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void Shutdown()
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{
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u32 flags = 0;
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MemoryMap_Shutdown(views, num_views, flags, &g_arena);
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g_arena.ReleaseSpace();
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base = NULL;
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INFO_LOG(MEMMAP, "Memory system shut down.");
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}
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void Clear()
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{
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if (m_pRAM)
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memset(m_pRAM, 0, g_MemorySize);
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if (m_pScratchPad)
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memset(m_pScratchPad, 0, SCRATCHPAD_SIZE);
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if (m_pVRAM)
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memset(m_pVRAM, 0, VRAM_SIZE);
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}
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Opcode Read_Instruction(u32 address)
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{
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Opcode inst = Opcode(Read_U32(address));
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if (MIPS_IS_EMUHACK(inst) && MIPSComp::jit)
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{
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JitBlockCache *bc = MIPSComp::jit->GetBlockCache();
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int block_num = bc->GetBlockNumberFromEmuHackOp(inst);
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if (block_num >= 0) {
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return bc->GetOriginalFirstOp(block_num);
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} else {
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return inst;
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}
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} else {
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return inst;
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}
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}
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Opcode Read_Opcode_JIT(u32 address)
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{
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return Read_Instruction(address);
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}
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// WARNING! No checks!
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// We assume that _Address is cached
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void Write_Opcode_JIT(const u32 _Address, const Opcode _Value)
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{
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Memory::WriteUnchecked_U32(_Value.encoding, _Address);
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}
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void Memset(const u32 _Address, const u8 _iValue, const u32 _iLength)
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{
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u8 *ptr = GetPointer(_Address);
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if (ptr != NULL)
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{
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memset(ptr,_iValue,_iLength);
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}
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else
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{
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for (size_t i = 0; i < _iLength; i++)
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Write_U8(_iValue, (u32)(_Address + i));
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}
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}
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void GetString(std::string& _string, const u32 em_address)
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{
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char stringBuffer[2048];
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char *string = stringBuffer;
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char c;
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u32 addr = em_address;
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while ((c = Read_U8(addr)))
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{
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*string++ = c;
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addr++;
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}
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*string++ = '\0';
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_string = stringBuffer;
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}
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const char *GetAddressName(u32 address)
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{
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// TODO, follow GetPointer
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return "[mem]";
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}
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} // namespace
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