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https://github.com/libretro/ppsspp.git
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109ad17ac6
Also, correctly read delayslots using Read_Instruction on ARM.
140 lines
3.0 KiB
C++
140 lines
3.0 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "MIPS.h"
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#include "MIPSTables.h"
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#include "MIPSCodeUtils.h"
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#include "../Host.h"
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namespace MIPSCodeUtils
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{
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#define FULLOP_JR_RA 0x03e00008
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#define OP_SYSCALL 0x0000000c
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#define OP_SYSCALL_MASK 0xFC00003F
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#define _RS ((op>>21) & 0x1F)
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#define _RT ((op>>16) & 0x1F)
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u32 GetJumpTarget(u32 addr)
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{
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MIPSOpcode op = Memory::Read_Instruction(addr);
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if (op != 0)
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{
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MIPSInfo info = MIPSGetInfo(op);
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if ((info & IS_JUMP) && (info & IN_IMM26))
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{
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u32 target = (addr & 0xF0000000) | ((op&0x03FFFFFF) << 2);
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return target;
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}
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else
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return INVALIDTARGET;
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}
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else
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return INVALIDTARGET;
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}
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u32 GetBranchTarget(u32 addr)
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{
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MIPSOpcode op = Memory::Read_Instruction(addr);
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if (op != 0)
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{
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MIPSInfo info = MIPSGetInfo(op);
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if (info & IS_CONDBRANCH)
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{
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return addr + 4 + ((signed short)(op&0xFFFF)<<2);
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}
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else
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return INVALIDTARGET;
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}
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else
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return INVALIDTARGET;
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}
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u32 GetBranchTargetNoRA(u32 addr)
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{
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MIPSOpcode op = Memory::Read_Instruction(addr);
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if (op != 0)
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{
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MIPSInfo info = MIPSGetInfo(op);
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if ((info & IS_CONDBRANCH) && !(info & OUT_RA))
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{
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return addr + 4 + ((signed short)(op&0xFFFF)<<2);
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}
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else
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return INVALIDTARGET;
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}
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else
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return INVALIDTARGET;
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}
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u32 GetSureBranchTarget(u32 addr)
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{
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MIPSOpcode op = Memory::Read_Instruction(addr);
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if (op != 0)
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{
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MIPSInfo info = MIPSGetInfo(op);
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if (info & IS_CONDBRANCH)
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{
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bool sure;
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bool takeBranch;
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switch (info & CONDTYPE_MASK)
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{
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case CONDTYPE_EQ:
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sure = _RS == _RT;
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takeBranch = true;
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break;
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case CONDTYPE_NE:
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sure = _RS == _RT;
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takeBranch = false;
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break;
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case CONDTYPE_LEZ:
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case CONDTYPE_GEZ:
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sure = _RS == 0;
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takeBranch = true;
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break;
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case CONDTYPE_LTZ:
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case CONDTYPE_GTZ:
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sure = _RS == 0;
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takeBranch = false;
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break;
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default:
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sure = false;
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}
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if (sure && takeBranch)
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return addr + 4 + ((signed short)(op&0xFFFF)<<2);
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else if (sure && !takeBranch)
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return addr + 8;
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else
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return INVALIDTARGET;
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}
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else
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return INVALIDTARGET;
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}
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else
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return INVALIDTARGET;
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}
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bool IsVFPUBranch(MIPSOpcode op) {
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return (MIPSGetInfo(op) & (IS_VFPU | IS_CONDBRANCH)) == (IS_VFPU | IS_CONDBRANCH);
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}
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}
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