mirror of
https://github.com/libretro/ppsspp.git
synced 2025-05-13 15:16:09 +00:00
366 lines
8.4 KiB
C++
366 lines
8.4 KiB
C++
#include "Common/ChunkFile.h"
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#include "../../Core.h"
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#include "../../CoreTiming.h"
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#include "../MIPS.h"
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#include "../MIPSCodeUtils.h"
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#include "../MIPSInt.h"
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#include "../MIPSTables.h"
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#include "PpcRegCache.h"
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#include "ppcEmitter.h"
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#include "PpcJit.h"
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#include <ppcintrinsics.h>
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using namespace PpcGen;
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extern volatile CoreState coreState;
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static void JitAt()
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{
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MIPSComp::jit->Compile(currentMIPS->pc);
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}
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namespace MIPSComp
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{
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//Jit * jit=NULL;
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static int dontLogBlocks = 20;
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static int logBlocks = 40;
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const u8 *Jit::DoJit(u32 em_address, JitBlock *b)
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{
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NOTICE_LOG(CPU, "DoJit %08x - %08x\n", mips_->pc, mips_->downcount);
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js.cancel = false;
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js.blockStart = js.compilerPC = mips_->pc;
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js.downcountAmount = 0;
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js.curBlock = b;
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js.compiling = true;
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js.inDelaySlot = false;
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js.PrefixStart();
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// We add a check before the block, used when entering from a linked block.
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b->checkedEntry = GetCodePtr();
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// Downcount flag check. The last block decremented downcounter, and the flag should still be available.
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//SetCC(CC_LT);
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MOVI2R(SREG, js.blockStart);
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//Break();
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// Cmp ??
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CMPI(DCNTREG, 0);
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BLT((const void *)outerLoopPCInR0);
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// if (currentMIPS->downcount<0)
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//BGT((const void *)outerLoopPCInR0);
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b->normalEntry = GetCodePtr();
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// TODO: this needs work
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MIPSAnalyst::AnalysisResults analysis; // = MIPSAnalyst::Analyze(em_address);
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gpr.Start(analysis);
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//fpr.Start(analysis);
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int numInstructions = 0;
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int cycles = 0;
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int partialFlushOffset = 0;
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if (logBlocks > 0) logBlocks--;
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if (dontLogBlocks > 0) dontLogBlocks--;
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// #define LOGASM
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#ifdef LOGASM
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char temp[256];
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#endif
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while (js.compiling)
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{
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gpr.SetCompilerPC(js.compilerPC); // Let it know for log messages
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//fpr.SetCompilerPC(js.compilerPC);
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u32 inst = Memory::Read_Instruction(js.compilerPC);
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js.downcountAmount += MIPSGetInstructionCycleEstimate(inst);
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MIPSCompileOp(inst);
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js.compilerPC += 4;
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numInstructions++;
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/*
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if (!cpu_info.bArmV7 && (GetCodePtr() - b->checkedEntry - partialFlushOffset) > 4020)
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{
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// We need to prematurely flush as we are out of range
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FixupBranch skip = B_CC(CC_AL);
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FlushLitPool();
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SetJumpTarget(skip);
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partialFlushOffset = GetCodePtr() - b->checkedEntry;
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}
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*/
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}
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//FlushLitPool();
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#ifdef LOGASM
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if (logBlocks > 0 && dontLogBlocks == 0) {
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for (u32 cpc = em_address; cpc != js.compilerPC + 4; cpc += 4) {
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MIPSDisAsm(Memory::Read_Instruction(cpc), cpc, temp, true);
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INFO_LOG(DYNA_REC, "M: %08x %s", cpc, temp);
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}
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}
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#endif
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b->codeSize = GetCodePtr() - b->normalEntry;
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#ifdef LOGASM
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if (logBlocks > 0 && dontLogBlocks == 0) {
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INFO_LOG(DYNA_REC, "=============== ARM ===============");
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DisassembleArm(b->normalEntry, GetCodePtr() - b->normalEntry);
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}
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#endif
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//printf("DoJitend %08x - %08x - %08x\n", mips_->pc, mips_->downcount, js.compilerPC);
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DumpJit();
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AlignCode16();
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// Don't forget to zap the instruction cache!
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FlushIcache();
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b->originalSize = numInstructions;
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return b->normalEntry;
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}
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void Jit::DumpJit() {
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u32 len = (u32)GetCodePtr() - (u32)GetBasePtr();
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FILE * fd;
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fd = fopen("game:\\jit.bin", "wb");
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fwrite(GetBasePtr(), len, 1, fd);
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fclose(fd);
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}
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void Jit::GenerateFixedCode() {
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enterCode = AlignCode16();
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INFO_LOG(HLE, "Base: %08x", (u32)Memory::base);
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INFO_LOG(HLE, "enterCode: 0x%08p", enterCode);
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INFO_LOG(HLE, "GetBasePtr: 0x%08p", GetBasePtr());
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#if 1
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// Write Prologue (setup stack frame etc ...)
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// Save Lr
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MFLR(R12);
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// Save regs
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u32 regSize = 8; // 4 in 32bit system
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u32 stackFrameSize = 32*32;//(35 - 12) * regSize;
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for(int i = 14; i < 32; i ++) {
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STD((PPCReg)i, R1, -((33 - i) * regSize));
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}
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// Save r12
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STW(R12, R1, -0x8);
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// allocate stack
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STWU(R1, R1, -stackFrameSize);
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#endif
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#if 1
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// Map fixed register
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MOVI2R(BASEREG, (u32)Memory::base);
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MOVI2R(CTXREG, (u32)mips_);
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MOVI2R(CODEREG, (u32)GetBasePtr());
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Break();
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// Update downcount reg value from memory
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RestoreDowncount(DCNTREG);
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// SREG = mips->pc
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MovFromPC(SREG);
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// Keep current location, TODO rename it, outerLoopPCInR0 to outerLoopPCInR3 ??
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outerLoopPCInR0 = GetCodePtr();
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// mips->pc = SREG
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MovToPC(SREG);
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// Keep current location
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outerLoop = GetCodePtr();
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// Jit loop
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// {
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// Save downcount reg value to memory
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SaveDowncount(DCNTREG);
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// Call CoreTiming::Advance() => update donwcount
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QuickCallFunction((void *)&CoreTiming::Advance);
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// Update downcount reg value from memory
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RestoreDowncount(DCNTREG);
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// branch to skipToRealDispatch
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FixupBranch skipToRealDispatch = B(); //skip the sync and compare first time
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// Keep current location dispatcherCheckCoreState:
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dispatcherCheckCoreState = GetCodePtr();
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// The result of slice decrementation should be in flags if somebody jumped here
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// IMPORTANT - We jump on negative, not carry!!!
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// branch to bailCoreState: (jump if(what ??) negative )
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//FixupBranch bailCoreState = B_CC(CC_MI); // BLT ???
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FixupBranch bailCoreState = BLT(); // BLT ???
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// SREG = coreState
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MOVI2R(SREG, (u32)&coreState);
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// ??? Compare coreState and CORE_RUNNING
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LWZ(SREG, SREG); // SREG = *SREG
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CMPLI(SREG, 0); // compare 0(CORE_RUNNING) and CR0
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// branch to badCoreState: (jump if coreState != CORE_RUNNING)
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FixupBranch badCoreState = BNE(); // B_CC(CC_NEQ)
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// branch to skipToRealDispatch2:
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FixupBranch skipToRealDispatch2 = B(); //skip the sync and compare first time
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// Keep current location, TODO rename it, outerLoopPCInR0 to outerLoopPCInSREG ??
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dispatcherPCInR0 = GetCodePtr();
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// mips->pc = SREG
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MovToPC(SREG);
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// At this point : flags = EQ. Fine for the next check, no need to jump over it.
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// label dispatcher:
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dispatcher = GetCodePtr();
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// {
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// The result of slice decrementation should be in flags if somebody jumped here
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// IMPORTANT - We jump on negative, not carry!!!
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// label bail:
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// arm B_CC(CC_MI);
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FixupBranch bail = BLT();
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// label skipToRealDispatch:
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SetJumpTarget(skipToRealDispatch);
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// label skipToRealDispatch2:
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SetJumpTarget(skipToRealDispatch2);
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// Keep current location
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dispatcherNoCheck = GetCodePtr();
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// read op
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// R3 = mips->pc & Memory::MEMVIEW32_MASK
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LWZ(R3, CTXREG, offsetof(MIPSState, pc));
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MOVI2R(SREG, Memory::MEMVIEW32_MASK);
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AND(R3, R3, SREG);
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// R3 = memory::base[r3];
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ADD(R3, BASEREG, R3);
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MOVI2R(R0, 0);
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LWBRX(R3, R3, R0); // R3 = op now !
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// R4 = R3 & MIPS_EMUHACK_VALUE_MASK
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MOVI2R(SREG, MIPS_EMUHACK_VALUE_MASK);
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AND(R4, R3, SREG);
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// R3 = R3 & MIPS_EMUHACK_MASK
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ANDIS(R3, R3, (MIPS_EMUHACK_MASK>>16));
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// compare, op == MIPS_EMUHACK_OPCODE
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MOVI2R(SREG, MIPS_EMUHACK_OPCODE);
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CMP(R3, SREG);
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// Branch if func block not found
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FixupBranch notfound = BNE();
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// {
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// R3 = R4 + GetBasePtr()
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ADD(R3, R4, CODEREG);
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MTCTR(R3);
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BCTR();
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// }
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// label notfound:
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SetJumpTarget(notfound);
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//Ok, no block, let's jit
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// Save downcount reg value to memory
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SaveDowncount(DCNTREG);
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// Exec JitAt => Compile block !
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QuickCallFunction((void *)&JitAt);
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// Update downcount reg value from memory
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RestoreDowncount(DCNTREG);
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// branch to dispatcherNoCheck:
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B(dispatcherNoCheck); // no point in special casing this
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// }
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// label bail:
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SetJumpTarget(bail);
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// label bailCoreState:
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SetJumpTarget(bailCoreState);
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#if 0
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// Compare coreState and CORE_RUNNING
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MOVI2R(SREG, (u32)&coreState);
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LWZ(SREG, SREG); // SREG = *SREG => SREG = coreState
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CMPLI(SREG, 0); // compare 0(CORE_RUNNING) and corestate
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// if (coreState == CORE_RUNNING) check for downcount
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FixupBranch badcpustates = BNE();
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//BEQ(outerLoop);
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CMPI(DCNTREG, 0);
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BLT(outerLoop);
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SetJumpTarget(badcpustates);
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#else
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// Compare coreState and CORE_RUNNING
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MOVI2R(SREG, (u32)&coreState);
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LWZ(SREG, SREG); // SREG = *SREG => SREG = coreState
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CMPLI(SREG, 0); // compare 0(CORE_RUNNING) and corestate
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BEQ(outerLoop);
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#endif
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// }
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// badCoreState label:
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SetJumpTarget(badCoreState);
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// Keep current location
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breakpointBailout = GetCodePtr();
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// mips->downcount = DCNTREG
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SaveDowncount(DCNTREG);
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#endif
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#if 1
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// Write Epilogue (restore stack frame, return)
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// free stack
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ADDI(R1, R1, stackFrameSize);
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// Restore regs
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for(int i = 14; i < 32; i ++) {
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LD((PPCReg)i, R1, -((33 - i) * regSize));
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}
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// recover r12 (LR saved register)
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LWZ (R12, R1, -0x8);
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// Restore Lr
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MTLR(R12);
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Break();
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// Go back to caller
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BLR();
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#endif
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// Don't forget to zap the instruction cache!
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FlushIcache();
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}
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} |