mirror of
https://github.com/libretro/ppsspp.git
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180 lines
3.8 KiB
C++
180 lines
3.8 KiB
C++
// Copyright (c) 2012- PPSSPP Project.
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// This program is free software: you can redistribute it and/or modify
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// it under the terms of the GNU General Public License as published by
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// the Free Software Foundation, version 2.0 or later versions.
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// This program is distributed in the hope that it will be useful,
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// but WITHOUT ANY WARRANTY; without even the implied warranty of
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// MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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// GNU General Public License 2.0 for more details.
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// A copy of the GPL 2.0 should have been included with the program.
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// If not, see http://www.gnu.org/licenses/
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// Official git repository and contact information can be found at
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// https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/.
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#include "Common.h"
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#include "MIPS.h"
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#include "MIPSTables.h"
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#include "MIPSDebugInterface.h"
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#include "MIPSVFPUUtils.h"
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#include "../System.h"
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#include "../HLE/sceDisplay.h"
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#if defined(ARM)
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#include "ARM/JitCache.h"
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#include "ARM/Jit.h"
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#else
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#include "x86/JitCache.h"
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#include "x86/Jit.h"
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#endif
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#include "JitCommon/JitCommon.h"
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#include "../../Core/CoreTiming.h"
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MIPSState mipsr4k;
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MIPSState *currentMIPS = &mipsr4k;
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MIPSDebugInterface debugr4k(&mipsr4k);
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MIPSDebugInterface *currentDebugMIPS = &debugr4k;
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MIPSState::MIPSState()
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{
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cpuType = CPUTYPE_ALLEGREX;
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MIPSComp::jit = 0;
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}
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MIPSState::~MIPSState()
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{
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delete MIPSComp::jit;
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MIPSComp::jit = 0;
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}
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void MIPSState::Reset()
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{
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if (MIPSComp::jit)
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{
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delete MIPSComp::jit;
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MIPSComp::jit = 0;
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}
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if (PSP_CoreParameter().cpuCore == CPU_JIT)
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MIPSComp::jit = new MIPSComp::Jit(this);
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memset(r, 0, sizeof(r));
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memset(f, 0, sizeof(f));
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memset(v, 0, sizeof(v));
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memset(vfpuCtrl, 0, sizeof(vfpuCtrl));
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vfpuCtrl[VFPU_CTRL_SPREFIX] = 0xe4; //passthru
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vfpuCtrl[VFPU_CTRL_TPREFIX] = 0xe4; //passthru
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vfpuCtrl[VFPU_CTRL_DPREFIX] = 0;
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vfpuCtrl[VFPU_CTRL_CC] = 0x3f;
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vfpuCtrl[VFPU_CTRL_INF4] = 0;
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vfpuCtrl[VFPU_CTRL_RCX0] = 0x3f800001;
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vfpuCtrl[VFPU_CTRL_RCX1] = 0x3f800002;
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vfpuCtrl[VFPU_CTRL_RCX2] = 0x3f800004;
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vfpuCtrl[VFPU_CTRL_RCX3] = 0x3f800008;
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vfpuCtrl[VFPU_CTRL_RCX4] = 0x3f800000;
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vfpuCtrl[VFPU_CTRL_RCX5] = 0x3f800000;
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vfpuCtrl[VFPU_CTRL_RCX6] = 0x3f800000;
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vfpuCtrl[VFPU_CTRL_RCX7] = 0x3f800000;
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bool b[4] = {false, false, false, false};
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SetWriteMask(b);
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pc = 0;
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hi = 0;
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lo = 0;
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fpcond = 0;
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fcr0 = 0;
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fcr31 = 0;
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debugCount = 0;
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exceptions = 0;
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currentMIPS = this;
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inDelaySlot = false;
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llBit = 0;
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nextPC = 0;
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// Initialize the VFPU random number generator with .. something?
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rng.Init(0x1337);
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}
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void MIPSState::SetWriteMask(const bool wm[4])
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{
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for (int i = 0; i < 4; i++)
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vfpuWriteMask[i] = wm[i];
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}
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void MIPSState::SingleStep()
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{
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int cycles = MIPS_SingleStep();
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CoreTiming::downcount -= cycles;
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CoreTiming::Advance();
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}
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// returns 1 if reached ticks limit
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int MIPSState::RunLoopUntil(u64 globalTicks)
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{
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switch (PSP_CoreParameter().cpuCore)
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{
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case CPU_JIT:
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MIPSComp::jit->RunLoopUntil(globalTicks);
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break;
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case CPU_FASTINTERPRETER: // For jit-less platforms. Crashier than INTERPRETER.
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return MIPSInterpret_RunFastUntil(globalTicks);
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case CPU_INTERPRETER:
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// INFO_LOG(CPU, "Entering run loop for %i ticks, pc=%08x", (int)globalTicks, mipsr4k.pc);
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return MIPSInterpret_RunUntil(globalTicks);
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}
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return 1;
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}
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void MIPSState::WriteFCR(int reg, int value)
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{
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if (reg == 31)
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{
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fcr31 = value;
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fpcond = (value >> 23) & 1;
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}
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else
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{
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// MessageBox(0, "Invalid FCR","...",0);
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}
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DEBUG_LOG(CPU, "FCR%i written to, value %08x", reg, value);
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}
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u32 MIPSState::ReadFCR(int reg)
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{
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DEBUG_LOG(CPU,"FCR%i read",reg);
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if (reg == 31)
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{
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fcr31 = (fcr31 & ~(1<<23)) | ((fpcond & 1)<<23);
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return fcr31;
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}
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else if (reg == 0)
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{
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return fcr0;
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}
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else
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{
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// MessageBox(0, "Invalid FCR","...",0);
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}
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return 0;
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}
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// Interrupts should be served directly on the running thread.
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void MIPSState::Irq()
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{
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// if (IRQEnabled())
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{
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}
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}
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void MIPSState::SWI()
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{
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}
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