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AUDIO: Rename clock() -> updateClock() in SID emulator
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185337f6a5
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@ -109,7 +109,7 @@ void WaveformGenerator::reset() {
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msb_rising = false;
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}
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RESID_INLINE void WaveformGenerator::clock(cycle_count delta_t) {
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RESID_INLINE void WaveformGenerator::updateClock(cycle_count delta_t) {
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// No operation if test bit is set.
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if (test) {
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return;
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@ -164,10 +164,10 @@ RESID_INLINE void WaveformGenerator::clock(cycle_count delta_t) {
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/**
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* Synchronize oscillators.
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* This must be done after all the oscillators have been clock()'ed since the
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* This must be done after all the oscillators have been updateClock()'ed since the
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* oscillators operate in parallel.
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* Note that the oscillators must be clocked exactly on the cycle when the
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* MSB is set high for hard sync to operate correctly. See SID::clock().
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* MSB is set high for hard sync to operate correctly. See SID::updateClock().
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*/
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RESID_INLINE void WaveformGenerator::synchronize() {
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// A special case occurs when a sync source is synced itself on the same
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@ -591,7 +591,7 @@ void Filter::set_Q() {
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_1024_div_Q = static_cast<sound_sample>(1024.0/(0.707 + 1.0*res/0x0f));
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}
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RESID_INLINE void Filter::clock(cycle_count delta_t,
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RESID_INLINE void Filter::updateClock(cycle_count delta_t,
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sound_sample voice1,
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sound_sample voice2,
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sound_sample voice3)
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@ -887,7 +887,7 @@ reg8 EnvelopeGenerator::readENV() {
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return output();
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}
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RESID_INLINE void EnvelopeGenerator::clock(cycle_count delta_t) {
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RESID_INLINE void EnvelopeGenerator::updateClock(cycle_count delta_t) {
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// Check for ADSR delay bug.
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// If the rate counter comparison value is set below the current value of the
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// rate counter, the counter will continue counting up until it wraps around
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@ -1026,7 +1026,7 @@ void ExternalFilter::reset() {
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Vo = 0;
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}
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RESID_INLINE void ExternalFilter::clock(cycle_count delta_t, sound_sample Vi) {
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RESID_INLINE void ExternalFilter::updateClock(cycle_count delta_t, sound_sample Vi) {
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// This is handy for testing.
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if (!enabled) {
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// Remove maximum DC level since there is no filter to do it.
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@ -1316,7 +1316,7 @@ bool SID::set_sampling_parameters(double clock_freq,
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return true;
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}
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void SID::clock(cycle_count delta_t) {
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void SID::updateClock(cycle_count delta_t) {
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int i;
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if (delta_t <= 0) {
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@ -1332,7 +1332,7 @@ void SID::clock(cycle_count delta_t) {
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// Clock amplitude modulators.
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for (i = 0; i < 3; i++) {
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voice[i].envelope.clock(delta_t);
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voice[i].envelope.updateClock(delta_t);
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}
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// Clock and synchronize oscillators.
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@ -1372,7 +1372,7 @@ void SID::clock(cycle_count delta_t) {
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// Clock oscillators.
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for (i = 0; i < 3; i++) {
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voice[i].wave.clock(delta_t_min);
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voice[i].wave.updateClock(delta_t_min);
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}
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// Synchronize oscillators.
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@ -1384,11 +1384,11 @@ void SID::clock(cycle_count delta_t) {
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}
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// Clock filter.
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filter.clock(delta_t,
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filter.updateClock(delta_t,
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voice[0].output(), voice[1].output(), voice[2].output());
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// Clock external filter.
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extfilt.clock(delta_t, filter.output());
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extfilt.updateClock(delta_t, filter.output());
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}
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@ -1396,7 +1396,7 @@ void SID::clock(cycle_count delta_t) {
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* SID clocking with audio sampling.
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* Fixpoint arithmetics is used.
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*/
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int SID::clock(cycle_count& delta_t, short* buf, int n, int interleave) {
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int SID::updateClock(cycle_count& delta_t, short* buf, int n, int interleave) {
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int s = 0;
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for (;;) {
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@ -1408,13 +1408,13 @@ int SID::clock(cycle_count& delta_t, short* buf, int n, int interleave) {
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if (s >= n) {
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return s;
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}
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clock(delta_t_sample);
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updateClock(delta_t_sample);
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delta_t -= delta_t_sample;
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sample_offset = (next_sample_offset & FIXP_MASK) - (1 << (FIXP_SHIFT - 1));
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buf[s++*interleave] = output();
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}
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clock(delta_t);
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updateClock(delta_t);
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sample_offset -= delta_t << FIXP_SHIFT;
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delta_t = 0;
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return s;
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@ -60,7 +60,7 @@ public:
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void set_sync_source(WaveformGenerator*);
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void clock(cycle_count delta_t);
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void updateClock(cycle_count delta_t);
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void synchronize();
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void reset();
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@ -133,7 +133,7 @@ public:
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void enable_filter(bool enable);
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void clock(cycle_count delta_t,
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void updateClock(cycle_count delta_t,
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sound_sample voice1, sound_sample voice2, sound_sample voice3);
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void reset();
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@ -201,7 +201,7 @@ public:
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enum State { ATTACK, DECAY_SUSTAIN, RELEASE };
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void clock(cycle_count delta_t);
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void updateClock(cycle_count delta_t);
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void reset();
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void writeCONTROL_REG(reg8);
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@ -246,7 +246,7 @@ public:
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void enable_filter(bool enable);
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void set_sampling_parameter(double pass_freq);
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void clock(cycle_count delta_t, sound_sample Vi);
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void updateClock(cycle_count delta_t, sound_sample Vi);
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void reset();
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// Audio output (20 bits).
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@ -312,8 +312,8 @@ public:
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double sample_freq, double pass_freq = -1,
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double filter_scale = 0.97);
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void clock(cycle_count delta_t);
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int clock(cycle_count& delta_t, short* buf, int n, int interleave = 1);
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void updateClock(cycle_count delta_t);
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int updateClock(cycle_count& delta_t, short* buf, int n, int interleave = 1);
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void reset();
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// Read/write registers.
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@ -1296,7 +1296,7 @@ int Player_SID::readBuffer(int16 *buffer, const int numSamples) {
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_cpuCyclesLeft = timingProps[_videoSystem].cyclesPerFrame;
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}
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// fetch samples
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int sampleCount = _sid->clock(_cpuCyclesLeft, (short*)buffer, samplesLeft);
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int sampleCount = _sid->updateClock(_cpuCyclesLeft, (short*)buffer, samplesLeft);
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samplesLeft -= sampleCount;
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buffer += sampleCount;
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}
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