mirror of
https://github.com/libretro/snes9x2005.git
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8085880130
SNES Open Bus is a quirk of the memory subsystem that allow reads of invalid addresses to return the last byte read from memory. However, it is seldom needed by a game, and it costs 1 to 3 MIPS instructions per SNES instruction to emulate. If you need SNES Open Bus, you can remove -DNO_OPEN_BUS from the Makefile.
473 lines
12 KiB
C
473 lines
12 KiB
C
/*******************************************************************************
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Snes9x - Portable Super Nintendo Entertainment System (TM) emulator.
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(c) Copyright 1996 - 2002 Gary Henderson (gary.henderson@ntlworld.com) and
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Jerremy Koot (jkoot@snes9x.com)
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(c) Copyright 2001 - 2004 John Weidman (jweidman@slip.net)
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(c) Copyright 2002 - 2004 Brad Jorsch (anomie@users.sourceforge.net),
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funkyass (funkyass@spam.shaw.ca),
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Joel Yliluoma (http://iki.fi/bisqwit/)
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Kris Bleakley (codeviolation@hotmail.com),
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Matthew Kendora,
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Nach (n-a-c-h@users.sourceforge.net),
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Peter Bortas (peter@bortas.org) and
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zones (kasumitokoduck@yahoo.com)
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C4 x86 assembler and some C emulation code
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(c) Copyright 2000 - 2003 zsKnight (zsknight@zsnes.com),
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_Demo_ (_demo_@zsnes.com), and Nach
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C4 C++ code
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(c) Copyright 2003 Brad Jorsch
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DSP-1 emulator code
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(c) Copyright 1998 - 2004 Ivar (ivar@snes9x.com), _Demo_, Gary Henderson,
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John Weidman, neviksti (neviksti@hotmail.com),
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Kris Bleakley, Andreas Naive
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DSP-2 emulator code
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(c) Copyright 2003 Kris Bleakley, John Weidman, neviksti, Matthew Kendora, and
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Lord Nightmare (lord_nightmare@users.sourceforge.net
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OBC1 emulator code
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(c) Copyright 2001 - 2004 zsKnight, pagefault (pagefault@zsnes.com) and
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Kris Bleakley
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Ported from x86 assembler to C by sanmaiwashi
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SPC7110 and RTC C++ emulator code
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(c) Copyright 2002 Matthew Kendora with research by
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zsKnight, John Weidman, and Dark Force
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S-DD1 C emulator code
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(c) Copyright 2003 Brad Jorsch with research by
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Andreas Naive and John Weidman
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S-RTC C emulator code
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(c) Copyright 2001 John Weidman
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ST010 C++ emulator code
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(c) Copyright 2003 Feather, Kris Bleakley, John Weidman and Matthew Kendora
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Super FX x86 assembler emulator code
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(c) Copyright 1998 - 2003 zsKnight, _Demo_, and pagefault
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Super FX C emulator code
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(c) Copyright 1997 - 1999 Ivar, Gary Henderson and John Weidman
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SH assembler code partly based on x86 assembler code
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(c) Copyright 2002 - 2004 Marcus Comstedt (marcus@mc.pp.se)
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Specific ports contains the works of other authors. See headers in
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individual files.
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Snes9x homepage: http://www.snes9x.com
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Permission to use, copy, modify and distribute Snes9x in both binary and
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source form, for non-commercial purposes, is hereby granted without fee,
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providing that this license information and copyright notice appear with
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all copies and any derived work.
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This software is provided 'as-is', without any express or implied
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warranty. In no event shall the authors be held liable for any damages
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arising from the use of this software.
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Snes9x is freeware for PERSONAL USE only. Commercial users should
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seek permission of the copyright holders first. Commercial use includes
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charging money for Snes9x or software derived from Snes9x.
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The copyright holders request that bug fixes and improvements to the code
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should be forwarded to them so everyone can benefit from the modifications
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in future versions.
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Super NES and Super Nintendo Entertainment System are trademarks of
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Nintendo Co., Limited and its subsidiary companies.
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*******************************************************************************/
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#ifndef _CPUADDR_H_
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#define _CPUADDR_H_
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EXTERN_C long OpAddress;
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typedef enum {
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NONE = 0,
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READ = 1,
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WRITE = 2,
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MODIFY = 3,
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JUMP = 4
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} AccessMode;
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void Immediate8 (AccessMode a)
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{
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OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
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CPU.PC++;
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}
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void Immediate16 (AccessMode a)
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{
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OpAddress = ICPU.ShiftedPB + CPU.PC - CPU.PCBase;
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CPU.PC += 2;
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}
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void Relative (AccessMode a)
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{
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Int8 = *CPU.PC++;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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OpAddress = ((int) (CPU.PC - CPU.PCBase) + Int8) & 0xffff;
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}
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void RelativeLong (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = *(uint16 *) CPU.PC;
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#else
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OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8);
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#endif
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2 + ONE_CYCLE;
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#endif
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CPU.PC += 2;
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OpAddress += (CPU.PC - CPU.PCBase);
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OpAddress &= 0xffff;
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}
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void AbsoluteIndexedIndirect (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = (Registers.X.W + *(uint16 *) CPU.PC) & 0xffff;
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#else
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OpAddress = (Registers.X.W + *CPU.PC + (*(CPU.PC + 1) << 8)) & 0xffff;
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#endif
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2;
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#endif
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#ifndef NO_OPEN_BUS
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OpenBus = *(CPU.PC + 1);
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#endif
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CPU.PC += 2;
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OpAddress = S9xGetWord (ICPU.ShiftedPB + OpAddress);
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = (uint8)(OpAddress>>8);
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#endif
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}
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void AbsoluteIndirectLong (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = *(uint16 *) CPU.PC;
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#else
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OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8);
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#endif
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2;
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#endif
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#ifndef NO_OPEN_BUS
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OpenBus = *(CPU.PC + 1);
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#endif
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CPU.PC += 2;
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#ifndef NO_OPEN_BUS
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if(a&READ) {
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OpAddress = S9xGetWord (OpAddress) | ((OpenBus=S9xGetByte (OpAddress + 2)) << 16);
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} else {
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#endif
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OpAddress = S9xGetWord (OpAddress) | (S9xGetByte (OpAddress + 2) << 16);
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#ifndef NO_OPEN_BUS
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}
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#endif
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}
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void AbsoluteIndirect (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = *(uint16 *) CPU.PC;
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#else
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OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8);
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#endif
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2;
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#endif
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#ifndef NO_OPEN_BUS
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OpenBus = *(CPU.PC + 1);
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#endif
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CPU.PC += 2;
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OpAddress = S9xGetWord (OpAddress);
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = (uint8)(OpAddress>>8);
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#endif
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OpAddress += ICPU.ShiftedPB;
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}
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void Absolute (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = *(uint16 *) CPU.PC + ICPU.ShiftedDB;
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#else
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OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8) + ICPU.ShiftedDB;
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *(CPU.PC+1);
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#endif
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CPU.PC += 2;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2;
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#endif
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}
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void AbsoluteLong (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = (*(uint32 *) CPU.PC) & 0xffffff;
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#else
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OpAddress = *CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16);
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *(CPU.PC+2);
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#endif
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CPU.PC += 3;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
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#endif
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}
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void Direct(AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
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}
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void DirectIndirectIndexed (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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OpAddress = S9xGetWord (OpAddress);
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = (uint8)(OpAddress>>8);
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#endif
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OpAddress += ICPU.ShiftedDB + Registers.Y.W;
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// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
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// XXX: always add one if STA
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// XXX: else Add one cycle if crosses page boundary
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}
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void DirectIndirectIndexedLong (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ){
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OpAddress = S9xGetWord (OpAddress) + ((OpenBus = S9xGetByte (OpAddress + 2)) << 16) + Registers.Y.W;
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} else {
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#endif
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OpAddress = S9xGetWord (OpAddress) + (S9xGetByte (OpAddress + 2) << 16) + Registers.Y.W;
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#ifndef NO_OPEN_BUS
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}
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#endif
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// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
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}
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void DirectIndexedIndirect(AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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OpAddress = S9xGetWord (OpAddress);
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = (uint8)(OpAddress>>8);
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#endif
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OpAddress += ICPU.ShiftedDB;
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#ifndef SA1_OPCODES
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// if (Registers.DL != 0)
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// CPU.Cycles += TWO_CYCLES;
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// else
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CPU.Cycles += ONE_CYCLE;
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#endif
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}
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void DirectIndexedX (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W + Registers.X.W);
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OpAddress &= CheckEmulation() ? 0xff : 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
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// if (Registers.DL != 0)
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// CPU.Cycles += TWO_CYCLES;
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// else
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// CPU.Cycles += ONE_CYCLE;
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#endif
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}
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void DirectIndexedY (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W + Registers.Y.W);
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OpAddress &= CheckEmulation() ? 0xff : 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
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// if (Registers.DL != 0)
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// CPU.Cycles += TWO_CYCLES;
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// else
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// CPU.Cycles += ONE_CYCLE;
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#endif
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}
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void AbsoluteIndexedX (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = ICPU.ShiftedDB + *(uint16 *) CPU.PC + Registers.X.W;
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#else
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OpAddress = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
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Registers.X.W;
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *(CPU.PC+1);
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#endif
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CPU.PC += 2;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2;
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#endif
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// XXX: always add one cycle for ROL, LSR, etc
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// XXX: else is cross page boundary add one cycle
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}
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void AbsoluteIndexedY (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = ICPU.ShiftedDB + *(uint16 *) CPU.PC + Registers.Y.W;
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#else
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OpAddress = ICPU.ShiftedDB + *CPU.PC + (*(CPU.PC + 1) << 8) +
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Registers.Y.W;
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *(CPU.PC+1);
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#endif
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CPU.PC += 2;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2;
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#endif
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// XXX: always add cycle for STA
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// XXX: else is cross page boundary add one cycle
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}
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void AbsoluteLongIndexedX (AccessMode a)
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{
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#ifdef FAST_LSB_WORD_ACCESS
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OpAddress = (*(uint32 *) CPU.PC + Registers.X.W) & 0xffffff;
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#else
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OpAddress = (*CPU.PC + (*(CPU.PC + 1) << 8) + (*(CPU.PC + 2) << 16) + Registers.X.W) & 0xffffff;
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *(CPU.PC+2);
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#endif
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CPU.PC += 3;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeedx2 + CPU.MemSpeed;
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#endif
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}
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void DirectIndirect (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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OpAddress = S9xGetWord (OpAddress);
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = (uint8)(OpAddress>>8);
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#endif
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OpAddress += ICPU.ShiftedDB;
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// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
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}
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void DirectIndirectLong (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.D.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed;
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#endif
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#ifndef NO_OPEN_BUS
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if(a&READ){
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OpAddress = S9xGetWord (OpAddress) + ((OpenBus=S9xGetByte (OpAddress + 2)) << 16);
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} else {
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#endif
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OpAddress = S9xGetWord (OpAddress) + (S9xGetByte (OpAddress + 2) << 16);
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#ifndef NO_OPEN_BUS
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}
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#endif
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// if (Registers.DL != 0) CPU.Cycles += ONE_CYCLE;
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}
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void StackRelative (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed + ONE_CYCLE;
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#endif
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}
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void StackRelativeIndirectIndexed (AccessMode a)
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{
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#ifndef NO_OPEN_BUS
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OpenBus = *CPU.PC;
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#endif
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OpAddress = (*CPU.PC++ + Registers.S.W) & 0xffff;
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#ifndef SA1_OPCODES
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CPU.Cycles += CPU.MemSpeed + TWO_CYCLES;
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#endif
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OpAddress = S9xGetWord (OpAddress);
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#ifndef NO_OPEN_BUS
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if(a&READ) OpenBus = (uint8)(OpAddress>>8);
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#endif
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OpAddress = (OpAddress + ICPU.ShiftedDB +
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Registers.Y.W) & 0xffffff;
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}
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#endif
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