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Checks ID_AA64MMFR0_EL1 for at least 36 bits physical address (#967)
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2
.github/workflows/ci-linux.yml
vendored
2
.github/workflows/ci-linux.yml
vendored
@ -12,6 +12,8 @@ jobs:
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run: |
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sudo apt-get update
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sudo apt-get install -y flatpak flatpak-builder
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- name: Update Rust
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run: rustup update stable
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- name: Add additional Rust targets
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run: rustup target add x86_64-unknown-none
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- name: Lint Rust sources
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@ -1,3 +1,4 @@
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// SPDX-License-Identifier: MIT OR Apache-2.0
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use super::hv::{Cpu, CpuStates};
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use super::hw::RamMap;
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use super::MainCpuError;
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@ -8,7 +9,7 @@ pub fn setup_main_cpu(cpu: &mut impl Cpu, entry: usize, map: RamMap) -> Result<(
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.states()
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.map_err(|e| MainCpuError::GetCpuStatesFailed(Box::new(e)))?;
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let mmfr0 = states
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.get_id_aa64_mmfr0()
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.get_id_aa64mmfr0()
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.map_err(|e| MainCpuError::GetIdAa64mmfr0Failed(Box::new(e)))?;
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match map.page_size.get() {
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@ -20,6 +21,13 @@ pub fn setup_main_cpu(cpu: &mut impl Cpu, entry: usize, map: RamMap) -> Result<(
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_ => todo!(),
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}
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// Check if CPU support at least 36 bits physical address.
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let pa_range = mmfr0 & 0xF;
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if pa_range == 0 {
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return Err(MainCpuError::PhysicalAddressTooSmall);
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}
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// Set PSTATE so the PE run in AArch64 mode. Not sure why we need M here since the document said
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// it is ignore. See https://gist.github.com/imbushuo/51b09e61ecd7b7ac063853ad65cedf34 where
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// M = 5 came from.
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@ -14,6 +14,7 @@ type hv_vcpu_t = hv_sys::hv_vcpu_t;
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#[allow(non_camel_case_types)]
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type hv_vcpu_t = hv_sys::hv_vcpuid_t;
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#[cfg(target_arch = "x86_64")]
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macro_rules! wrap_return {
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($ret:expr) => {
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match NonZero::new($ret) {
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@ -129,7 +130,7 @@ impl<'a> Cpu for HfCpu<'a> {
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fn states(&mut self) -> Result<Self::States<'_>, Self::GetStatesErr> {
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Ok(HfStates {
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cpu: self,
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id_aa64_mmfr0: State::None,
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id_aa64mmfr0: State::None,
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pstate: State::None,
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sctlr_el1: State::None,
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mair_el1: State::None,
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@ -190,7 +191,7 @@ impl<'a> Drop for HfCpu<'a> {
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pub struct HfStates<'a, 'b> {
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cpu: &'a mut HfCpu<'b>,
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#[cfg(target_arch = "aarch64")]
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id_aa64_mmfr0: State<u64>,
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id_aa64mmfr0: State<u64>,
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#[cfg(target_arch = "x86_64")]
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rsp: State<usize>,
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#[cfg(target_arch = "x86_64")]
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@ -237,16 +238,16 @@ impl<'a, 'b> CpuStates for HfStates<'a, 'b> {
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type Err = StatesError;
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#[cfg(target_arch = "aarch64")]
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fn get_id_aa64_mmfr0(&mut self) -> Result<u64, Self::Err> {
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fn get_id_aa64mmfr0(&mut self) -> Result<u64, Self::Err> {
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use hv_sys::hv_sys_reg_t_HV_SYS_REG_ID_AA64MMFR0_EL1 as HV_SYS_REG_ID_AA64MMFR0_EL1;
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let v = match self.id_aa64_mmfr0 {
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let v = match self.id_aa64mmfr0 {
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State::None => {
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let v = self
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.cpu
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.read_sys(HV_SYS_REG_ID_AA64MMFR0_EL1)
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.map_err(StatesError::ReadRegisterFailed)?;
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self.id_aa64_mmfr0 = State::Clean(v);
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self.id_aa64mmfr0 = State::Clean(v);
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v
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}
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State::Clean(v) | State::Dirty(v) => v,
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@ -59,7 +59,7 @@ pub trait CpuStates {
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type Err: Error + Send + 'static;
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#[cfg(target_arch = "aarch64")]
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fn get_id_aa64_mmfr0(&mut self) -> Result<u64, Self::Err>;
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fn get_id_aa64mmfr0(&mut self) -> Result<u64, Self::Err>;
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#[cfg(target_arch = "x86_64")]
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fn set_rdi(&mut self, v: usize);
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@ -744,6 +744,10 @@ enum MainCpuError {
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#[error("vCPU does not support {0:#x} page size")]
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PageSizeNotSupported(NonZero<usize>),
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#[cfg(target_arch = "aarch64")]
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#[error("physical address supported by vCPU too small")]
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PhysicalAddressTooSmall,
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#[error("couldn't commit vCPU states")]
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CommitCpuStatesFailed(#[source] Box<dyn Error + Send>),
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}
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@ -5,7 +5,6 @@ use crate::config::set_boot_env;
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use crate::context::Context;
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use crate::malloc::KernelHeap;
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use crate::proc::Thread;
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use alloc::string::String;
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use alloc::sync::Arc;
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use core::arch::asm;
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use core::mem::zeroed;
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@ -82,16 +81,8 @@ fn panic(i: &PanicInfo) -> ! {
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None => ("unknown", 0),
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};
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// Get message.
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let msg = if let Some(&v) = i.payload().downcast_ref::<&str>() {
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v
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} else if let Some(v) = i.payload().downcast_ref::<String>() {
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v
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} else {
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"unknown panic payload"
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};
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crate::console::error(file, line, msg);
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// Print the message.
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crate::console::error(file, line, i.message());
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crate::panic::panic();
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}
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