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https://gitee.com/openharmony/arkcompiler_ets_runtime
synced 2024-10-06 23:54:03 +00:00
Allow i64ptr to create both MIR ref type and MIR ptr type
Signed-off-by: linxin <linxinyq@foxmail.com> Change-Id: Ie25fc51d3dd11444fc510555b141d5a5eecdb0a9
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@ -226,6 +226,7 @@ private:
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LoopDesc *GetOrCreateLoopDesc(BB &headBB);
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void SetLoopParent4BB(const BB &bb, LoopDesc &loopDesc);
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void SetExitBBs(LoopDesc &loop) const;
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void GenerateLoop(BB *bb);
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void ProcessBB(BB &bb);
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};
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@ -725,6 +725,7 @@ public:
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Type *strType;
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Type *i64PtrType;
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Type *i64RefType;
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Type *i64RefRefType;
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private:
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Stmt &CreateSwitchInternal(Type *type, Expr cond, BB &defaultBB, std::vector<std::pair<int64_t, BB *>> &cases);
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@ -788,12 +788,18 @@ void CGCFG::UnreachCodeAnalysis() const
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void CGCFG::FindWillExitBBs(BB *bb, std::set<BB *, BBIdCmp> *visitedBBs)
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{
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if (visitedBBs->count(bb) != 0) {
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return;
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}
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visitedBBs->insert(bb);
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for (BB *predbb : bb->GetPreds()) {
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FindWillExitBBs(predbb, visitedBBs);
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std::queue<BB *> allBBs;
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allBBs.push(bb);
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while (!allBBs.empty()) {
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BB *curBB = allBBs.front();
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allBBs.pop();
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if (visitedBBs->count(curBB) != 0) {
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continue;
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}
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visitedBBs->insert(curBB);
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for (auto *predBB : curBB->GetPreds()) {
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allBBs.push(predBB);
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}
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}
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}
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@ -225,18 +225,29 @@ void DomAnalysis::ComputeIterDomFrontiers()
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uint32 DomAnalysis::ComputeDtPreorder(const BB &bb, uint32 &num)
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{
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DEBUG_ASSERT(num < dtPreOrder.size(), "index out of range in Dominance::ComputeDtPreorder");
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dtPreOrder[num] = bb.GetId();
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dtDfn[bb.GetId()] = num;
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uint32 maxDtDfnOut = num;
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++num;
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// {BB, parent/self BB id}
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using Node = std::pair<const BB *, uint32>;
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std::stack<Node> allNodes;
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allNodes.emplace(Node{&bb, bb.GetId()});
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for (uint32 k : domChildren[bb.GetId()]) {
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maxDtDfnOut = ComputeDtPreorder(*bbVec[k], num);
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while (!allNodes.empty()) {
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DEBUG_ASSERT(num < dtPreOrder.size(), "index out of range in Dominance::ComputeDtPreorder");
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Node curNode = allNodes.top();
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allNodes.pop();
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auto curBBId = curNode.first->GetId();
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dtPreOrder[num] = curBBId;
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dtDfn[curBBId] = num;
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++num;
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dtDfnOut[curNode.second] = num;
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if (domChildren[curBBId].empty()) {
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dtDfnOut[curBBId] = num;
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continue;
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}
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for (size_t idx = domChildren[curBBId].size(); idx > 0; --idx) {
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allNodes.emplace(Node{bbVec[domChildren[curBBId][idx - 1]], curBBId});
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}
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}
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dtDfnOut[bb.GetId()] = maxDtDfnOut;
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return maxDtDfnOut;
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return num;
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}
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// true if b1 dominates b2
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@ -2131,14 +2131,20 @@ void CGFunc::GenerateCfiPrologEpilog()
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void CGFunc::TraverseAndClearCatchMark(BB &bb)
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{
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/* has bb been visited */
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if (bb.GetInternalFlag3()) {
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return;
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}
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bb.SetIsCatch(false);
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bb.SetInternalFlag3(1);
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for (auto succBB : bb.GetSuccs()) {
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TraverseAndClearCatchMark(*succBB);
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std::queue<BB *> allBBs;
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allBBs.emplace(&bb);
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while (!allBBs.empty()) {
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BB *curBB = allBBs.front();
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allBBs.pop();
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/* has bb been visited */
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if (curBB->GetInternalFlag3()) {
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continue;
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}
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curBB->SetIsCatch(false);
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curBB->SetInternalFlag3(1);
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for (auto *succBB : curBB->GetSuccs()) {
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allBBs.emplace(succBB);
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}
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}
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}
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@ -89,18 +89,13 @@ void LoopAnalysis::SetExitBBs(LoopDesc &loop) const
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}
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}
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void LoopAnalysis::ProcessBB(BB &bb)
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void LoopAnalysis::GenerateLoop(BB *bb)
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{
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if (&bb == cgFunc.GetCommonExitBB()) {
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return;
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}
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// generate loop based on the dom information
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for (auto *pred : bb.GetPreds()) {
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if (!dom.Dominate(bb, *pred)) {
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for (auto *pred : bb->GetPreds()) {
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if (!dom.Dominate(*bb, *pred)) {
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continue;
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}
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auto *loop = GetOrCreateLoopDesc(bb);
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auto *loop = GetOrCreateLoopDesc(*bb);
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loop->InsertBackEdges(*pred);
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std::list<BB*> bodyList;
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bodyList.push_back(pred);
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@ -108,7 +103,7 @@ void LoopAnalysis::ProcessBB(BB &bb)
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auto *curBB = bodyList.front();
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bodyList.pop_front();
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// skip bb or if it has already been dealt with
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if (curBB == &bb || loop->Has(*curBB)) {
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if (curBB == bb || loop->Has(*curBB)) {
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continue;
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}
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SetLoopParent4BB(*curBB, *loop);
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@ -116,13 +111,28 @@ void LoopAnalysis::ProcessBB(BB &bb)
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bodyList.push_back(curPred);
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}
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}
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SetLoopParent4BB(bb, *loop);
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SetLoopParent4BB(*bb, *loop);
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SetExitBBs(*loop);
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}
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}
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// process dom tree
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for (auto domChildBBId : dom.GetDomChildren(bb.GetId())) {
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ProcessBB(*cgFunc.GetBBFromID(domChildBBId));
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void LoopAnalysis::ProcessBB(BB &entryBB)
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{
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std::queue<BB *> allBBs;
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allBBs.emplace(&entryBB);
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while (!allBBs.empty()) {
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BB *bb = allBBs.front();
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allBBs.pop();
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if (bb == cgFunc.GetCommonExitBB()) {
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continue;
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}
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// generate loop based on the dom information
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GenerateLoop(bb);
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// process dom tree
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for (auto domChildBBId : dom.GetDomChildren(bb->GetId())) {
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allBBs.emplace(cgFunc.GetBBFromID(domChildBBId));
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}
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}
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}
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@ -76,6 +76,7 @@ LMIRBuilder::LMIRBuilder(Module &module_) : mirBuilder(*module_.GetMIRBuilder())
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strType = CreatePtrType(u8Type); // u8PtrType
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i64PtrType = CreatePtrType(i64Type);
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i64RefType = CreateRefType(i64Type);
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i64RefRefType = CreateRefType(i64RefType);
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}
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void LMIRBuilder::DumpIRToFile(const std::string fileName)
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@ -231,15 +231,23 @@ public:
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size_t UnionFind(size_t idx)
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{
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std::stack<size_t> allIdxs;
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allIdxs.emplace(idx);
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size_t pIdx = parentIdx_[idx];
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if (pIdx == idx) {
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return idx;
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while (pIdx != allIdxs.top()) {
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allIdxs.emplace(pIdx);
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pIdx = parentIdx_[pIdx];
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}
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size_t unionFindSetRoot = UnionFind(pIdx);
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if (semiDom_[minIdx_[idx]] > semiDom_[minIdx_[pIdx]]) {
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minIdx_[idx] = minIdx_[pIdx];
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size_t unionFindSetRoot = pIdx;
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while (!allIdxs.empty()) {
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if (semiDom_[minIdx_[allIdxs.top()]] > semiDom_[minIdx_[pIdx]]) {
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minIdx_[allIdxs.top()] = minIdx_[pIdx];
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}
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parentIdx_[allIdxs.top()] = unionFindSetRoot;
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pIdx = allIdxs.top();
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allIdxs.pop();
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}
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return parentIdx_[idx] = unionFindSetRoot;
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return unionFindSetRoot;
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}
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void Merge(size_t fatherIdx, size_t sonIdx)
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@ -20,6 +20,27 @@
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#include "ecmascript/compiler/verifier.h"
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namespace panda::ecmascript::kungfu {
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size_t UnionFind(std::vector<size_t> &semiDom, std::vector<size_t> &parent, std::vector<size_t> &minIdx, size_t idx)
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{
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std::stack<size_t> allIdxs;
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allIdxs.emplace(idx);
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size_t pIdx = parent[idx];
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while (pIdx != allIdxs.top()) {
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allIdxs.emplace(pIdx);
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pIdx = parent[pIdx];
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}
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size_t unionFindSetRoot = pIdx;
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while (!allIdxs.empty()) {
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if (semiDom[minIdx[allIdxs.top()]] > semiDom[minIdx[pIdx]]) {
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minIdx[allIdxs.top()] = minIdx[pIdx];
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}
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parent[allIdxs.top()] = unionFindSetRoot;
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pIdx = allIdxs.top();
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allIdxs.pop();
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}
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return unionFindSetRoot;
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}
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void Scheduler::CalculateDominatorTree(const Circuit *circuit,
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std::vector<GateRef>& bbGatesList,
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std::unordered_map<GateRef, size_t> &bbGatesAddrToIdx,
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@ -63,20 +84,9 @@ void Scheduler::CalculateDominatorTree(const Circuit *circuit,
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std::vector<size_t> parent(bbGatesList.size());
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std::iota(parent.begin(), parent.end(), 0);
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std::vector<size_t> minIdx(bbGatesList.size());
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std::function<size_t(size_t)> unionFind = [&] (size_t idx) -> size_t {
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size_t pIdx = parent[idx];
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if (pIdx == idx) {
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return idx;
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}
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size_t unionFindSetRoot = unionFind(pIdx);
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if (semiDom[minIdx[idx]] > semiDom[minIdx[pIdx]]) {
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minIdx[idx] = minIdx[pIdx];
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}
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return parent[idx] = unionFindSetRoot;
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};
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auto merge = [&] (size_t fatherIdx, size_t sonIdx) -> void {
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size_t parentFatherIdx = unionFind(fatherIdx);
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size_t parentSonIdx = unionFind(sonIdx);
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size_t parentFatherIdx = UnionFind(semiDom, parent, minIdx, fatherIdx);
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size_t parentSonIdx = UnionFind(semiDom, parent, minIdx, sonIdx);
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parent[parentSonIdx] = parentFatherIdx;
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};
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std::iota(semiDom.begin(), semiDom.end(), 0);
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@ -90,13 +100,13 @@ void Scheduler::CalculateDominatorTree(const Circuit *circuit,
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if (preGateIdx < idx) {
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semiDom[idx] = std::min(semiDom[idx], preGateIdx);
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} else {
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unionFind(preGateIdx);
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UnionFind(semiDom, parent, minIdx, preGateIdx);
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semiDom[idx] = std::min(semiDom[idx], semiDom[minIdx[preGateIdx]]);
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}
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}
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}
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for (const auto &succDomIdx : semiDomTree[idx]) {
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unionFind(succDomIdx);
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UnionFind(semiDom, parent, minIdx, succDomIdx);
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if (idx == semiDom[minIdx[succDomIdx]]) {
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immDom[succDomIdx] = idx;
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} else {
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