mirror of
https://github.com/openharmony/drivers_framework.git
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c978f2f0f4
Signed-off-by: haizhouyang <yanghaizhou1@huawei.com>
274 lines
8.9 KiB
C
274 lines
8.9 KiB
C
/*
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* Copyright (c) 2020-2021 Huawei Device Co., Ltd.
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*
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* HDF is dual licensed: you can use it either under the terms of
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* the GPL, or the BSD license, at your option.
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* See the LICENSE file in the root of this repository for complete details.
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*/
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/**
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* @addtogroup SPI
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* @{
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*
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* @brief Defines standard APIs of the Serial Peripheral Interface (SPI) capabilities.
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*
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* The SPI module abstracts the SPI capabilities of different system platforms to provide stable APIs
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* for driver development.
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* This module can create and destroy SPI device handles, read and write SPI data,
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* and obtain and set configuration parameters.
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*
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* @since 1.0
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*/
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/**
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* @file spi_if.h
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*
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* @brief Defines standard SPI-specific interfaces for driver development.
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*
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* A driver needs to use the SPI-specific interfaces for data writing and reading
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* before performing any operations on an SPI-compliant device.
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*
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* @since 1.0
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*/
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#ifndef SPI_IF_H
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#define SPI_IF_H
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#include "platform_if.h"
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#ifdef __cplusplus
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#if __cplusplus
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extern "C" {
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#endif
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#endif /* __cplusplus */
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/**
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* @brief Indicates the SPI clock phase. The value <b>0</b> indicates that data will be sampled on the first clock edge,
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* and <b>1</b> indicates that data will be sampled on the second clock edge.
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*
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* @since 1.0
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*/
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#define SPI_CLK_PHASE (1 << 0)
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/**
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* @brief Indicates the SPI clock polarity. The value <b>0</b> indicates a low-level clock signal in the idle state,
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* and <b>1</b> indicates a high-level clock signal in the idle state.
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*
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* @since 1.0
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*/
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#define SPI_CLK_POLARITY (1 << 1)
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/**
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* @brief Indicates that a single data line is used for both input and output.
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*
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* @since 1.0
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*/
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#define SPI_MODE_3WIRE (1 << 2)
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/**
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* @brief Indicates the SPI loopback mode.
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*
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* @since 1.0
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*/
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#define SPI_MODE_LOOP (1 << 3)
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/**
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* @brief Indicates the SPI data transfer order. The value <b>0</b> indicates that data is transferred from the most
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* significant bit (MSB) to the least significant bit (LSB), and <b>1</b> indicates the opposite.
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*
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* @since 1.0
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*/
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#define SPI_MODE_LSBFE (1 << 4)
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/**
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* @brief Indicates that there is only one SPI device, and no chip select (CS) is required.
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*
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* @since 1.0
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*/
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#define SPI_MODE_NOCS (1 << 5)
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/**
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* @brief Indicates that the CS level is high when an SPI device is selected.
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*
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* @since 1.0
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*/
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#define SPI_MODE_CS_HIGH (1 << 6)
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/**
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* @brief Indicates that the SPI device is set to low for pausing data transfer.
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*
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* @since 1.0
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*/
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#define SPI_MODE_READY (1 << 7)
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/**
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* @brief Enumerates transfer modes of SPI data.
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*
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* @attention The specific SPI controller determines which variables in this structure are supported.
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*
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* @since 1.0
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*/
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enum SpiTransferMode {
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SPI_INTERRUPT_TRANSFER = 0, /**< Interrupt transfer mode */
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SPI_POLLING_TRANSFER, /**< Polling transfer mode */
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SPI_DMA_TRANSFER, /**< Direct Memory Access (DMA) transfer mode */
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};
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/**
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* @brief Defines the general SPI device descriptor, which can be used as the unique identifier of an SPI device.
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* When operating an SPI device, you need to specify a descriptor of the {@link SpiDevInfo} type, and obtain the
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* handle of the SPI device by calling {@link SpiOpen}.
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*
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* @since 1.0
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*/
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struct SpiDevInfo {
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uint32_t busNum; /**< SPI bus number */
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uint32_t csNum; /**< SPI device chip select (CS) */
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};
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/**
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* @brief Defines the custom SPI transfer message.
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*
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* @attention The specific SPI controller determines whether <b>speed</b>, <b>delayUs</b>,
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* and <b>keepCs</b> are supported.
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*
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* @since 1.0
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*/
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struct SpiMsg {
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uint8_t *wbuf; /**< Address of the write buffer */
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uint8_t *rbuf; /**< Address of the read buffer */
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uint32_t len; /**< Length of the read and write buffers. The read buffer and the write
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* buffer have the same length.
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*/
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uint32_t speed; /**< Current message transfer speed */
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uint16_t delayUs; /**< Delay (in microseconds) before starting the next transfer.
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* The value <b>0</b> indicates there is no delay between transfers.
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*/
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uint8_t keepCs; /**< Whether to keep CS active after current transfer has been
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* completed. <b>1</b> indicates to keeps CS; <b>0</b> indicates to switch off the CS.
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*/
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};
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/**
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* @brief Defines the configuration of an SPI device.
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*
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* @attention The specific SPI controller determines which variables in this structure are supported.
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*
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* @since 1.0
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*/
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struct SpiCfg {
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uint32_t maxSpeedHz; /**< Maximum clock frequency */
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uint16_t mode; /**< Input and output mode of SPI data | Description
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* -----------------| -----------------------
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* SPI_CLK_PHASE | SPI clock phase.
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* SPI_CLK_POLARITY | SPI clock polarity.
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* SPI_MODE_3WIRE | A single data line is used for both input and output.
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* SPI_MODE_LOOP | SPI loopback mode.
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* SPI_MODE_LSBFE | SPI data transfer order
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* SPI_MODE_NOCS | There is only one SPI device, and no CS is required.
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* SPI_MODE_CS_HIGH | The CS level is high when an SPI device is selected.
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* SPI_MODE_READY | The SPI device is set to low for pausing data transfer.
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*/
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uint8_t transferMode; /**< Data transfer mode, as defined in {@link SpiTransferMode}. */
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uint8_t bitsPerWord; /**< Data transfer bit width */
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};
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/**
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* @brief Obtains the handle of an SPI device.
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*
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* @param info Indicates the pointer to the SPI device information.
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*
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* @return Returns the pointer to the handle of the SPI device if the operation is successful;
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* returns <b>NULL</b> otherwise.
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*
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* @since 1.0
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*/
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DevHandle SpiOpen(const struct SpiDevInfo *info);
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/**
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* @brief Releases the handle of an SPI device.
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*
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* @param handle Indicates the pointer to the SPI device handle obtained via {@link SpiOpen}.
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*
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* @since 1.0
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*/
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void SpiClose(DevHandle handle);
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/**
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* @brief Launches a custom transfer to an SPI device.
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*
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* @param handle Indicates the pointer to the SPI device handle obtained via {@link SpiOpen}.
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* @param msgs Indicates the pointer to the data to transfer.
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* @param count Indicates the length of the message structure array.
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*
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* @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
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* @see SpiMsg
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* @since 1.0
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*/
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int32_t SpiTransfer(DevHandle handle, struct SpiMsg *msgs, uint32_t count);
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/**
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* @brief Reads data of a specified length from an SPI device.
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*
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* @param handle Indicates the pointer to the SPI device handle obtained via {@link SpiOpen}.
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* @param buf Indicates the pointer to the buffer for receiving the data.
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* @param len Indicates the length of the data to read.
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*
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* @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
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*
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* @since 1.0
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*/
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int32_t SpiRead(DevHandle handle, uint8_t *buf, uint32_t len);
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/**
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* @brief Writes data of a specified length to an SPI device.
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*
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* @param handle Indicates the pointer to the SPI device handle obtained via {@link SpiOpen}.
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* @param buf Indicates the pointer to the data to write.
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* @param len Indicates the length of the data to write.
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*
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* @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
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*
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* @since 1.0
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*/
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int32_t SpiWrite(DevHandle handle, uint8_t *buf, uint32_t len);
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/**
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* @brief Sets configuration parameters for an SPI device.
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*
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* @param handle Indicates the pointer to the SPI device handle obtained via {@link SpiOpen}.
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* @param cfg Indicates the pointer to the configuration parameters.
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*
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* @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
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*
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* @since 1.0
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*/
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int32_t SpiSetCfg(DevHandle handle, struct SpiCfg *cfg);
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/**
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* @brief Obtains the configuration parameters of an SPI device.
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*
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* @param handle Indicates the pointer to the SPI device handle obtained via {@link SpiOpen}.
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* @param cfg Indicates the pointer to the configuration parameters.
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*
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* @return Returns <b>0</b> if the operation is successful; returns a negative value otherwise.
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*
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* @since 1.0
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*/
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int32_t SpiGetCfg(DevHandle handle, struct SpiCfg *cfg);
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/**
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* @brief Enumerates SPI I/O commands.
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*
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* @since 1.0
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*/
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enum SpiIoCmd {
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SPI_IO_OPEN = 0, /**< Open the SPI device. */
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SPI_IO_CLOSE, /**< Close the SPI device. */
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SPI_IO_TRANSFER, /**< Execute one or more SPI messages. */
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SPI_IO_SET_CONFIG, /**< Set the configurations. */
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SPI_IO_GET_CONFIG, /**< Get the configurations. */
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};
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#ifdef __cplusplus
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#if __cplusplus
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}
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#endif
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#endif /* __cplusplus */
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#endif /* SPI_IF_H */
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/** @} */
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