From 145cfb6921c05aca9c00ed866fc35f782e3be4a7 Mon Sep 17 00:00:00 2001 From: lixuan Date: Fri, 27 Mar 2026 05:12:28 +0000 Subject: [PATCH] add support for rk3588 Signed-off-by: lixuan --- .../rk3588/libhardware_crypto_drv/Makefile | 31 ++++++ .../libhardware_crypto_drv/src/driver.c | 102 ++++++++++++++++++ test/xts/ca/BUILD.gn | 1 + 3 files changed, 134 insertions(+) create mode 100644 drivers/platform/rk3588/libhardware_crypto_drv/Makefile create mode 100644 drivers/platform/rk3588/libhardware_crypto_drv/src/driver.c diff --git a/drivers/platform/rk3588/libhardware_crypto_drv/Makefile b/drivers/platform/rk3588/libhardware_crypto_drv/Makefile new file mode 100644 index 00000000..e2e11924 --- /dev/null +++ b/drivers/platform/rk3588/libhardware_crypto_drv/Makefile @@ -0,0 +1,31 @@ +# Copyright (c) 2023 Institute of Parallel And Distributed Systems (IPADS), Shanghai Jiao Tong University (SJTU) +# Licensed under the Mulan PSL v2. +# You can use this software according to the terms and conditions of the Mulan PSL v2. +# You may obtain a copy of Mulan PSL v2 at: +# http://license.coscl.org.cn/MulanPSL2 +# THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR +# IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR +# PURPOSE. +# See the Mulan PSL v2 for more details. + +DRIVER := libhardware_crypto_drv.so + +include $(BUILD_CONFIG)/var.mk + +libhardware_crypto_drv_c_files += $(wildcard src/*.c) + +inc-flags += -I$(FRAMEWORK_PATH)/drvmgr/src +inc-flags += -I$(DRIVERS_PATH)/include +inc-flags += -I$(DRVLIB)/common/libdrv_frame/include +inc-flags += -I$(DRVLIB)/libdrv_shared/include +inc-flags += -I$(DRIVERS_PATH)/crypto_mgr/src/crypto_ioctl/ +inc-flags += -I$(TEELIB)/libcrypto_hal/include +inc-flags += -I$(TEELIB)/libteeos/include/tee +inc-flags += -I$(TEELIB)/libteeos/include/legacy +inc-flags += -I$(TEELIB)/libtimer/include +inc-flags += -I$(TEELIB)/libteemem/include + +# Libraries + +SVC_PARTITIAL_LINK = y +include $(BUILD_SERVICE)/svc-common.mk diff --git a/drivers/platform/rk3588/libhardware_crypto_drv/src/driver.c b/drivers/platform/rk3588/libhardware_crypto_drv/src/driver.c new file mode 100644 index 00000000..d439a04e --- /dev/null +++ b/drivers/platform/rk3588/libhardware_crypto_drv/src/driver.c @@ -0,0 +1,102 @@ +/* + * Copyright (c) 2023 Institute of Parallel And Distributed Systems (IPADS), Shanghai Jiao Tong University (SJTU) + * Licensed under the Mulan PSL v2. + * You can use this software according to the terms and conditions of the Mulan PSL v2. + * You may obtain a copy of Mulan PSL v2 at: + * http://license.coscl.org.cn/MulanPSL2 + * THIS SOFTWARE IS PROVIDED ON AN "AS IS" BASIS, WITHOUT WARRANTIES OF ANY KIND, EITHER EXPRESS OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO NON-INFRINGEMENT, MERCHANTABILITY OR FIT FOR A PARTICULAR + * PURPOSE. + * See the Mulan PSL v2 for more details. + */ + +#include +#include +#include +#include +#include + +#define MIN(x, y) ((x) < (y) ? (x) : (y)) +#define BIT(x) (1 << (x)) + +#define TRNG_64_BIT_LEN (0 << 4) +#define TRNG_128_BIT_LEN (1 << 4) +#define TRNG_192_BIT_LEN (2 << 4) +#define TRNG_256_BIT_LEN (3 << 4) +#define TRNG_FATESY_SOC_RING (0 << 2) +#define TRNG_SLOWER_SOC_RING_0 (1 << 2) +#define TRNG_SLOWER_SOC_RING_1 (2 << 2) +#define TRNG_SLOWEST_SOC_RING (3 << 2) +#define TRNG_ENABLE BIT(1) +#define TRNG_START BIT(0) +#define TRNG_BASE (0xfe370000) +#define TRNG_SIZE (0x10000) +#define TRNG_RNG_CTL(addr) ((addr) + 0x0400) +#define TRNG_RST_CTL(addr) ((addr) + 0x0004) +#define TRNG_RNG_SAMPLE_CNT(addr) ((addr) + 0x0404) +#define TRNG_RNG_DOUT(addr, x) ((addr) + 0x0410 + 4 * (x)) + +static void put32(unsigned long addr, uint32_t val) +{ + *(volatile uint32_t *)addr = val; +} + +static uint32_t get32(unsigned long addr) +{ + return *(volatile uint32_t *)addr; +} + +static void set32(unsigned long addr, uint32_t set_mask) +{ + put32(addr, get32(addr) | set_mask); +} + +static unsigned long s_trng_vaddr; + +int32_t init(void) +{ + s_trng_vaddr = (unsigned long)ioremap((uintptr_t)TRNG_BASE, TRNG_SIZE, PROT_READ | PROT_WRITE); + if ((void *)s_trng_vaddr == NULL) + return -EFAULT; + return 0; +} + +uint64_t hw_rng(void) +{ + int reg = 0; + uint64_t rnd; + + set32(TRNG_RNG_SAMPLE_CNT(s_trng_vaddr), 100); + + reg |= TRNG_64_BIT_LEN; + reg |= TRNG_SLOWER_SOC_RING_0; + reg |= TRNG_ENABLE; + reg |= TRNG_START; + + put32(TRNG_RNG_CTL(s_trng_vaddr), ((0xffff) | (reg)) << 16 | (reg)); + + set32(TRNG_RNG_CTL(s_trng_vaddr), 0b1); + while (get32(TRNG_RNG_CTL(s_trng_vaddr)) & 1); + + rnd = ((uint64_t)get32(TRNG_RNG_DOUT(s_trng_vaddr, 0)) << 32) | (uint64_t)get32(TRNG_RNG_DOUT(s_trng_vaddr, 1)); + + put32(TRNG_RNG_CTL(s_trng_vaddr), (0xffff) << 16); + + return rnd; +} + +int32_t generate_random(void *buffer, size_t size) +{ + size_t i; + int rnd; + for (i = 0; i < size; i += sizeof(uint64_t)) { + rnd = hw_rng(); + memcpy(buffer + i, &rnd, MIN(sizeof(uint64_t), size - i)); + } + return 0; +} + +__attribute__((visibility("default"))) const struct crypto_drv_ops_t g_crypto_drv_ops = { + .init = init, + .generate_random = generate_random, +}; diff --git a/test/xts/ca/BUILD.gn b/test/xts/ca/BUILD.gn index cd09639d..536834f6 100644 --- a/test/xts/ca/BUILD.gn +++ b/test/xts/ca/BUILD.gn @@ -98,6 +98,7 @@ hcpptest_suite("tee_test_tcf_api") { tee_test_root_dir + "/utils/cmd_id", tee_test_root_dir + "/ca/tcf_api/common", + "//base/tee/tee_os_framework/lib/teelib/libteeos/include/tee", "//test/xts/tools/lite/hctest/include", "//third_party/googletest/googletest/include", "//foundation/systemabilitymgr/samgr_lite/interfaces/kits/samgr",