mirror of
https://github.com/openharmony/third_party_alsa-utils.git
synced 2026-07-01 09:15:56 -04:00
cfd50591d3
Signed-off-by: w30051647 <wangyikai14@h-partners.com>
137 lines
2.8 KiB
C
137 lines
2.8 KiB
C
// SPDX-License-Identifier: BSD-3-Clause
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//
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// Copyright(c) 2021 Intel Corporation. All rights reserved.
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//
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// Author: Liam Girdwood <liam.r.girdwood@linux.intel.com>
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// Keyon Jie <yang.jie@linux.intel.com>
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// Rander Wang <rander.wang@linux.intel.com>
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// Jaska Uimonen <jaska.uimonen@linux.intel.com>
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#ifndef __SSP_INTEL_H
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#define __SSP_INTEL_H
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#include <stdint.h>
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#define SSP_TS_GROUP_SIZE 8
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/* struct for intel ssp nhlt vendor specific blob generation */
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struct ssp_intel_config_data {
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uint32_t gateway_attributes;
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uint32_t ts_group[SSP_TS_GROUP_SIZE];
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uint32_t ssc0;
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uint32_t ssc1;
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uint32_t sscto;
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uint32_t sspsp;
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uint32_t sstsa;
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uint32_t ssrsa;
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uint32_t ssc2;
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uint32_t sspsp2;
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uint32_t ssc3;
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uint32_t ssioc;
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uint32_t mdivc;
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uint32_t mdivr;
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} __attribute__((packed));
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#define SSP_BLOB_VER_1_5 0xEE000105
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#define SSP_BLOB_VER_3_0 0xEE000300
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struct ssp_intel_config_data_1_5 {
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uint32_t gateway_attributes;
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uint32_t version;
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uint32_t size;
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uint32_t ts_group[SSP_TS_GROUP_SIZE];
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uint32_t ssc0;
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uint32_t ssc1;
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uint32_t sscto;
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uint32_t sspsp;
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uint32_t sstsa;
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uint32_t ssrsa;
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uint32_t ssc2;
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uint32_t sspsp2;
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uint32_t ssc3;
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uint32_t ssioc;
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uint32_t mdivctlr;
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uint32_t mdivrcnt;
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uint32_t mdivr[];
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} __attribute__((packed));
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#define I2SIPCMC 8
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#define I2SOPCMC 8
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struct ssp_rx_dir {
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uint64_t ssmidytsa;
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} __attribute__((packed));
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struct ssp_tx_dir {
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uint64_t ssmodytsa;
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} __attribute__((packed));
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struct ssp_intel_config_data_3_0 {
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uint32_t gateway_attributes;
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uint32_t version;
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uint32_t size;
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uint32_t ts_group[SSP_TS_GROUP_SIZE];
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uint32_t ssc0;
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uint32_t ssc1;
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uint32_t sscto;
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uint32_t sspsp;
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uint32_t ssc2;
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uint32_t sspsp2;
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uint32_t rsvd2;
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uint32_t ssioc;
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struct ssp_rx_dir rx_dir[I2SIPCMC];
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struct ssp_tx_dir tx_dir[I2SOPCMC];
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uint32_t mdivctlr;
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uint32_t mdivrcnt;
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uint32_t mdivr[];
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} __attribute__((packed));
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struct ssp_intel_aux_tlv {
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uint32_t type;
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uint32_t size;
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uint32_t val[];
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} __attribute__((packed));
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struct ssp_intel_mn_ctl {
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uint32_t div_m;
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uint32_t div_n;
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} __attribute__((packed));
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struct ssp_intel_clk_ctl {
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uint32_t start;
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uint32_t stop;
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} __attribute__((packed));
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struct ssp_intel_tr_ctl {
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uint32_t sampling_frequency;
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uint32_t bit_depth;
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uint32_t channel_map;
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uint32_t channel_config;
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uint32_t interleaving_style;
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uint32_t format;
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} __attribute__((packed));
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struct ssp_intel_run_ctl {
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uint32_t enabled;
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} __attribute__((packed));
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struct ssp_intel_node_ctl {
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uint32_t node_id;
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uint32_t sampling_rate;
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} __attribute__((packed));
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struct ssp_intel_sync_ctl {
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uint32_t sync_denominator;
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uint32_t count;
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} __attribute__((packed));
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struct ssp_intel_ext_ctl {
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uint32_t ext_data;
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} __attribute__((packed));
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struct ssp_intel_link_ctl {
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uint32_t clock_source;
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} __attribute__((packed));
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#endif /* __SSP_INTEL_H */
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