mirror of
https://gitee.com/openharmony/third_party_ffmpeg
synced 2024-11-27 05:00:37 +00:00
9630b3fc06
The unique user so far is wmalossless 24bits. The few samples tested show an order of 8, so more unrolling or an avx2 version do not make sense. Timings: 68 -> 49 cycles Reviewed-by: Paul B Mahol <onemda@gmail.com> Signed-off-by: Michael Niedermayer <michael@niedermayer.cc>
191 lines
4.7 KiB
NASM
191 lines
4.7 KiB
NASM
;******************************************************************************
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;* Copyright (c) 2008 Loren Merritt
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;*
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;* This file is part of FFmpeg.
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;*
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;* FFmpeg is free software; you can redistribute it and/or
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;* modify it under the terms of the GNU Lesser General Public
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;* License as published by the Free Software Foundation; either
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;* version 2.1 of the License, or (at your option) any later version.
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;*
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;* FFmpeg is distributed in the hope that it will be useful,
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;* but WITHOUT ANY WARRANTY; without even the implied warranty of
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;* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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;* Lesser General Public License for more details.
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;*
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;* You should have received a copy of the GNU Lesser General Public
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;* License along with FFmpeg; if not, write to the Free Software
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;* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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;******************************************************************************
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%include "libavutil/x86/x86util.asm"
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SECTION .text
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%macro SCALARPRODUCT 0
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; int ff_scalarproduct_and_madd_int16(int16_t *v1, int16_t *v2, int16_t *v3,
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; int order, int mul)
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cglobal scalarproduct_and_madd_int16, 4,4,8, v1, v2, v3, order, mul
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shl orderq, 1
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movd m7, mulm
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%if mmsize == 16
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pshuflw m7, m7, 0
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punpcklqdq m7, m7
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%else
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pshufw m7, m7, 0
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%endif
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pxor m6, m6
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add v1q, orderq
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add v2q, orderq
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add v3q, orderq
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neg orderq
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.loop:
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movu m0, [v2q + orderq]
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movu m1, [v2q + orderq + mmsize]
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mova m4, [v1q + orderq]
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mova m5, [v1q + orderq + mmsize]
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movu m2, [v3q + orderq]
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movu m3, [v3q + orderq + mmsize]
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pmaddwd m0, m4
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pmaddwd m1, m5
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pmullw m2, m7
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pmullw m3, m7
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paddd m6, m0
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paddd m6, m1
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paddw m2, m4
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paddw m3, m5
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mova [v1q + orderq], m2
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mova [v1q + orderq + mmsize], m3
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add orderq, mmsize*2
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jl .loop
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HADDD m6, m0
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movd eax, m6
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RET
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%endmacro
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INIT_MMX mmxext
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SCALARPRODUCT
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INIT_XMM sse2
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SCALARPRODUCT
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INIT_XMM sse4
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; int ff_scalarproduct_and_madd_int32(int16_t *v1, int32_t *v2, int16_t *v3,
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; int order, int mul)
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cglobal scalarproduct_and_madd_int32, 4,4,8, v1, v2, v3, order, mul
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shl orderq, 1
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movd m7, mulm
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SPLATW m7, m7
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pxor m6, m6
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add v1q, orderq
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lea v2q, [v2q + 2*orderq]
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add v3q, orderq
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neg orderq
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.loop:
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mova m3, [v1q + orderq]
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movu m0, [v2q + 2*orderq]
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pmovsxwd m4, m3
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movu m1, [v2q + 2*orderq + mmsize]
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movhlps m5, m3
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movu m2, [v3q + orderq]
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pmovsxwd m5, m5
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pmullw m2, m7
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pmulld m0, m4
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pmulld m1, m5
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paddw m2, m3
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paddd m6, m0
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paddd m6, m1
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mova [v1q + orderq], m2
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add orderq, 16
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jl .loop
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HADDD m6, m0
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movd eax, m6
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RET
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%macro SCALARPRODUCT_LOOP 1
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align 16
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.loop%1:
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sub orderq, mmsize*2
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%if %1
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mova m1, m4
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mova m4, [v2q + orderq]
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mova m0, [v2q + orderq + mmsize]
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palignr m1, m0, %1
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palignr m0, m4, %1
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mova m3, m5
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mova m5, [v3q + orderq]
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mova m2, [v3q + orderq + mmsize]
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palignr m3, m2, %1
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palignr m2, m5, %1
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%else
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mova m0, [v2q + orderq]
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mova m1, [v2q + orderq + mmsize]
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mova m2, [v3q + orderq]
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mova m3, [v3q + orderq + mmsize]
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%endif
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%define t0 [v1q + orderq]
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%define t1 [v1q + orderq + mmsize]
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%if ARCH_X86_64
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mova m8, t0
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mova m9, t1
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%define t0 m8
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%define t1 m9
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%endif
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pmaddwd m0, t0
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pmaddwd m1, t1
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pmullw m2, m7
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pmullw m3, m7
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paddw m2, t0
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paddw m3, t1
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paddd m6, m0
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paddd m6, m1
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mova [v1q + orderq], m2
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mova [v1q + orderq + mmsize], m3
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jg .loop%1
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%if %1
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jmp .end
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%endif
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%endmacro
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; int ff_scalarproduct_and_madd_int16(int16_t *v1, int16_t *v2, int16_t *v3,
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; int order, int mul)
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INIT_XMM ssse3
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cglobal scalarproduct_and_madd_int16, 4,5,10, v1, v2, v3, order, mul
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shl orderq, 1
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movd m7, mulm
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pshuflw m7, m7, 0
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punpcklqdq m7, m7
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pxor m6, m6
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mov r4d, v2d
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and r4d, 15
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and v2q, ~15
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and v3q, ~15
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mova m4, [v2q + orderq]
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mova m5, [v3q + orderq]
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; linear is faster than branch tree or jump table, because the branches taken are cyclic (i.e. predictable)
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cmp r4d, 0
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je .loop0
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cmp r4d, 2
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je .loop2
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cmp r4d, 4
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je .loop4
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cmp r4d, 6
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je .loop6
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cmp r4d, 8
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je .loop8
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cmp r4d, 10
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je .loop10
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cmp r4d, 12
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je .loop12
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SCALARPRODUCT_LOOP 14
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SCALARPRODUCT_LOOP 12
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SCALARPRODUCT_LOOP 10
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SCALARPRODUCT_LOOP 8
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SCALARPRODUCT_LOOP 6
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SCALARPRODUCT_LOOP 4
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SCALARPRODUCT_LOOP 2
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SCALARPRODUCT_LOOP 0
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.end:
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HADDD m6, m0
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movd eax, m6
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RET
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