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https://gitee.com/openharmony/third_party_ffmpeg
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172b0e2e88
* commit 'ea7ee4b4e381e0fa731458de0cbf740430eeb013': ppc: Centralize compiler-specific altivec.h #include handling in one place Merged-by: Clément Bœsch <u@pkh.me>
247 lines
8.6 KiB
C
247 lines
8.6 KiB
C
/*
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* Copyright (c) 2004 Romain Dolbeau <romain@dolbeau.org>
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*
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* This file is part of FFmpeg.
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*
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* FFmpeg is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2.1 of the License, or (at your option) any later version.
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*
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* FFmpeg is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with FFmpeg; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include "libavutil/mem.h"
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#include "libavutil/ppc/util_altivec.h"
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/* this code assume that stride % 16 == 0 */
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#define CHROMA_MC8_ALTIVEC_CORE(BIAS1, BIAS2) \
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vsrc2ssH = (vec_s16)VEC_MERGEH(zero_u8v,(vec_u8)vsrc2uc);\
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vsrc3ssH = (vec_s16)VEC_MERGEH(zero_u8v,(vec_u8)vsrc3uc);\
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\
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psum = vec_mladd(vA, vsrc0ssH, BIAS1);\
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psum = vec_mladd(vB, vsrc1ssH, psum);\
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psum = vec_mladd(vC, vsrc2ssH, psum);\
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psum = vec_mladd(vD, vsrc3ssH, psum);\
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psum = BIAS2(psum);\
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psum = vec_sr(psum, v6us);\
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\
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vdst = vec_ld(0, dst);\
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ppsum = (vec_u8)vec_pack(psum, psum);\
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vfdst = vec_perm(vdst, ppsum, fperm);\
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\
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OP_U8_ALTIVEC(fsum, vfdst, vdst);\
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\
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vec_st(fsum, 0, dst);\
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\
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vsrc0ssH = vsrc2ssH;\
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vsrc1ssH = vsrc3ssH;\
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\
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dst += stride;\
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src += stride;
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#define CHROMA_MC8_ALTIVEC_CORE_SIMPLE \
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\
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vsrc0ssH = (vec_s16)VEC_MERGEH(zero_u8v,(vec_u8)vsrc0uc);\
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vsrc1ssH = (vec_s16)VEC_MERGEH(zero_u8v,(vec_u8)vsrc1uc);\
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\
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psum = vec_mladd(vA, vsrc0ssH, v32ss);\
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psum = vec_mladd(vE, vsrc1ssH, psum);\
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psum = vec_sr(psum, v6us);\
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\
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vdst = vec_ld(0, dst);\
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ppsum = (vec_u8)vec_pack(psum, psum);\
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vfdst = vec_perm(vdst, ppsum, fperm);\
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\
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OP_U8_ALTIVEC(fsum, vfdst, vdst);\
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\
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vec_st(fsum, 0, dst);\
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\
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dst += stride;\
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src += stride;
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#define noop(a) a
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#define add28(a) vec_add(v28ss, a)
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#if HAVE_BIGENDIAN
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#define GET_VSRC1(vs0, off, b, perm0, s){ \
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vec_u8 vsrcCuc, vsrcDuc; \
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vsrcCuc = vec_ld(off, s); \
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if (loadSecond){ \
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vsrcDuc = vec_ld(off + b, s); \
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} else \
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vsrcDuc = vsrcCuc; \
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\
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vs0 = vec_perm(vsrcCuc, vsrcDuc, perm0); \
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}
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#define GET_VSRC(vs0, vs1, off, b, perm0, perm1, s){ \
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vec_u8 vsrcCuc, vsrcDuc; \
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vsrcCuc = vec_ld(off, s); \
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if (loadSecond){ \
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vsrcDuc = vec_ld(off + b, s); \
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} else \
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vsrcDuc = vsrcCuc; \
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\
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vs0 = vec_perm(vsrcCuc, vsrcDuc, perm0); \
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if (reallyBadAlign){ \
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vs1 = vsrcDuc; \
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} else \
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vs1 = vec_perm(vsrcCuc, vsrcDuc, perm1); \
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}
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#else
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#define GET_VSRC1(vs0, off, b, perm0, s){ \
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vs0 = vec_vsx_ld(off, s); \
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}
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#define GET_VSRC(vs0, vs1, off, b, perm0, perm1, s){ \
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vs0 = vec_vsx_ld(off, s); \
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vs1 = vec_vsx_ld(off + 1, s); \
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}
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#endif /* HAVE_BIGENDIAN */
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#ifdef PREFIX_h264_chroma_mc8_altivec
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static void PREFIX_h264_chroma_mc8_altivec(uint8_t * dst, uint8_t * src,
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ptrdiff_t stride, int h,
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int x, int y)
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{
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DECLARE_ALIGNED(16, signed int, ABCD)[4] =
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{((8 - x) * (8 - y)),
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(( x) * (8 - y)),
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((8 - x) * ( y)),
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(( x) * ( y))};
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register int i;
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vec_u8 fperm;
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LOAD_ZERO;
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const vec_s32 vABCD = vec_ld(0, ABCD);
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const vec_s16 vA = VEC_SPLAT16(vABCD, 1);
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const vec_s16 vB = VEC_SPLAT16(vABCD, 3);
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const vec_s16 vC = VEC_SPLAT16(vABCD, 5);
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const vec_s16 vD = VEC_SPLAT16(vABCD, 7);
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const vec_s16 v32ss = vec_sl(vec_splat_s16(1),vec_splat_u16(5));
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const vec_u16 v6us = vec_splat_u16(6);
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vec_u8 vsrcperm0, vsrcperm1;
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vec_u8 vsrc0uc, vsrc1uc;
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vec_s16 vsrc0ssH, vsrc1ssH;
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vec_u8 vsrc2uc, vsrc3uc;
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vec_s16 vsrc2ssH, vsrc3ssH, psum;
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vec_u8 vdst, ppsum, vfdst, fsum;
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#if HAVE_BIGENDIAN
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register int loadSecond = (((unsigned long)src) % 16) <= 7 ? 0 : 1;
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register int reallyBadAlign = (((unsigned long)src) % 16) == 15 ? 1 : 0;
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vsrcperm0 = vec_lvsl(0, src);
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vsrcperm1 = vec_lvsl(1, src);
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#endif
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if (((unsigned long)dst) % 16 == 0) {
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fperm = (vec_u8){0x10, 0x11, 0x12, 0x13,
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0x14, 0x15, 0x16, 0x17,
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0x08, 0x09, 0x0A, 0x0B,
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0x0C, 0x0D, 0x0E, 0x0F};
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} else {
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fperm = (vec_u8){0x00, 0x01, 0x02, 0x03,
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0x04, 0x05, 0x06, 0x07,
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0x18, 0x19, 0x1A, 0x1B,
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0x1C, 0x1D, 0x1E, 0x1F};
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}
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GET_VSRC(vsrc0uc, vsrc1uc, 0, 16, vsrcperm0, vsrcperm1, src);
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vsrc0ssH = (vec_s16)VEC_MERGEH(zero_u8v,(vec_u8)vsrc0uc);
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vsrc1ssH = (vec_s16)VEC_MERGEH(zero_u8v,(vec_u8)vsrc1uc);
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if (ABCD[3]) {
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for (i = 0 ; i < h ; i++) {
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GET_VSRC(vsrc2uc, vsrc3uc, stride, 16, vsrcperm0, vsrcperm1, src);
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CHROMA_MC8_ALTIVEC_CORE(v32ss, noop);
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}
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} else {
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const vec_s16 vE = vec_add(vB, vC);
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if (ABCD[2]) { // x == 0 B == 0
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for (i = 0 ; i < h ; i++) {
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GET_VSRC1(vsrc1uc, stride, 15, vsrcperm0, src);
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CHROMA_MC8_ALTIVEC_CORE_SIMPLE;
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vsrc0uc = vsrc1uc;
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}
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} else { // y == 0 C == 0
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for (i = 0 ; i < h ; i++) {
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GET_VSRC(vsrc0uc, vsrc1uc, 0, 15, vsrcperm0, vsrcperm1, src);
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CHROMA_MC8_ALTIVEC_CORE_SIMPLE;
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}
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}
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}
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}
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#endif
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/* this code assume that stride % 16 == 0 */
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#ifdef PREFIX_no_rnd_vc1_chroma_mc8_altivec
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static void PREFIX_no_rnd_vc1_chroma_mc8_altivec(uint8_t *dst, uint8_t *src,
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ptrdiff_t stride, int h,
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int x, int y)
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{
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DECLARE_ALIGNED(16, signed int, ABCD)[4] =
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{((8 - x) * (8 - y)),
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(( x) * (8 - y)),
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((8 - x) * ( y)),
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(( x) * ( y))};
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register int i;
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vec_u8 fperm;
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LOAD_ZERO;
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const vec_s32 vABCD = vec_ld(0, ABCD);
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const vec_s16 vA = VEC_SPLAT16(vABCD, 1);
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const vec_s16 vB = VEC_SPLAT16(vABCD, 3);
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const vec_s16 vC = VEC_SPLAT16(vABCD, 5);
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const vec_s16 vD = VEC_SPLAT16(vABCD, 7);
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const vec_s16 v28ss = vec_sub(vec_sl(vec_splat_s16(1),vec_splat_u16(5)),vec_splat_s16(4));
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const vec_u16 v6us = vec_splat_u16(6);
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vec_u8 vsrcperm0, vsrcperm1;
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vec_u8 vsrc0uc, vsrc1uc;
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vec_s16 vsrc0ssH, vsrc1ssH;
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vec_u8 vsrc2uc, vsrc3uc;
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vec_s16 vsrc2ssH, vsrc3ssH, psum;
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vec_u8 vdst, ppsum, vfdst, fsum;
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#if HAVE_BIGENDIAN
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register int loadSecond = (((unsigned long)src) % 16) <= 7 ? 0 : 1;
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register int reallyBadAlign = (((unsigned long)src) % 16) == 15 ? 1 : 0;
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vsrcperm0 = vec_lvsl(0, src);
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vsrcperm1 = vec_lvsl(1, src);
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#endif
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if (((unsigned long)dst) % 16 == 0) {
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fperm = (vec_u8){0x10, 0x11, 0x12, 0x13,
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0x14, 0x15, 0x16, 0x17,
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0x08, 0x09, 0x0A, 0x0B,
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0x0C, 0x0D, 0x0E, 0x0F};
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} else {
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fperm = (vec_u8){0x00, 0x01, 0x02, 0x03,
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0x04, 0x05, 0x06, 0x07,
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0x18, 0x19, 0x1A, 0x1B,
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0x1C, 0x1D, 0x1E, 0x1F};
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}
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GET_VSRC(vsrc0uc, vsrc1uc, 0, 16, vsrcperm0, vsrcperm1, src);
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vsrc0ssH = (vec_s16)VEC_MERGEH(zero_u8v, (vec_u8)vsrc0uc);
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vsrc1ssH = (vec_s16)VEC_MERGEH(zero_u8v, (vec_u8)vsrc1uc);
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for (i = 0 ; i < h ; i++) {
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GET_VSRC(vsrc2uc, vsrc3uc, stride, 16, vsrcperm0, vsrcperm1, src);
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CHROMA_MC8_ALTIVEC_CORE(vec_splat_s16(0), add28);
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}
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}
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#endif
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#undef noop
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#undef add28
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#undef CHROMA_MC8_ALTIVEC_CORE
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