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https://gitee.com/openharmony/third_party_libbpf
synced 2024-10-07 06:23:25 +00:00
dd3fc8bde1
[ upstream commit 6b7a21140fca461c6d8d5c65a3746e7da50a409e ] Needed a custom backport. I've changed fallbacks so that we can partially pull in barriers step by step. I've fixed x86 ones and added corresponding arm64 barriers. Signed-off-by: Daniel Borkmann <daniel@iogearbox.net>
71 lines
1.4 KiB
C
71 lines
1.4 KiB
C
/* SPDX-License-Identifier: (LGPL-2.1 OR BSD-2-Clause) */
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#ifndef __LINUX_COMPILER_H
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#define __LINUX_COMPILER_H
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#define likely(x) __builtin_expect(!!(x), 1)
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#define unlikely(x) __builtin_expect(!!(x), 0)
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#define READ_ONCE(x) (*(volatile typeof(x) *)&x)
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#define WRITE_ONCE(x, v) (*(volatile typeof(x) *)&x) = (v)
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#define barrier() asm volatile("" ::: "memory")
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#if defined(__x86_64__)
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# define smp_rmb() barrier()
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# define smp_wmb() barrier()
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# define smp_mb() asm volatile("lock; addl $0,-132(%%rsp)" ::: "memory", "cc")
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# define smp_store_release(p, v) \
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do { \
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barrier(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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# define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p = READ_ONCE(*p); \
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barrier(); \
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___p; \
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})
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#elif defined(__aarch64__)
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# define smp_rmb() asm volatile("dmb ishld" ::: "memory")
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# define smp_wmb() asm volatile("dmb ishst" ::: "memory")
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# define smp_mb() asm volatile("dmb ish" ::: "memory")
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#endif
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#ifndef smp_mb
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# define smp_mb() __sync_synchronize()
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#endif
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#ifndef smp_rmb
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# define smp_rmb() smp_mb()
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#endif
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#ifndef smp_wmb
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# define smp_wmb() smp_mb()
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#endif
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#ifndef smp_store_release
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# define smp_store_release(p, v) \
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do { \
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smp_mb(); \
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WRITE_ONCE(*p, v); \
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} while (0)
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#endif
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#ifndef smp_load_acquire
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# define smp_load_acquire(p) \
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({ \
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typeof(*p) ___p = READ_ONCE(*p); \
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smp_mb(); \
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___p; \
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})
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#endif
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#endif /* __LINUX_COMPILER_H */
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