Files
third_party_libunwind/ohos-fix-register-index-overflow.patch
T
maleibing 37a1d742a0 feature:upgrade 1.8.3
Change-Id: I0992e6b58a71b80b740527660e75a20bf43221ac
Signed-off-by: maleibing <maleibing1@h-partners.com>
2026-03-23 16:38:29 +08:00

85 lines
3.1 KiB
Diff

diff --git a/src/aarch64/Gos-linux.c b/src/aarch64/Gos-linux.c
index 7cd8c879..d0f0cb76 100644
--- a/src/aarch64/Gos-linux.c
+++ b/src/aarch64/Gos-linux.c
@@ -77,30 +77,57 @@
/* Since there are no signals involved here we restore EH and non scratch
registers only. */
+ unsigned long regs[24];
+ regs[0] = uc->uc_mcontext.regs[0];
+ regs[1] = uc->uc_mcontext.regs[1];
+ regs[2] = uc->uc_mcontext.regs[2];
+ regs[3] = uc->uc_mcontext.regs[3];
+ regs[4] = uc->uc_mcontext.regs[19];
+ regs[5] = uc->uc_mcontext.regs[20];
+ regs[6] = uc->uc_mcontext.regs[21];
+ regs[7] = uc->uc_mcontext.regs[22];
+ regs[8] = uc->uc_mcontext.regs[23];
+ regs[9] = uc->uc_mcontext.regs[24];
+ regs[10] = uc->uc_mcontext.regs[25];
+ regs[11] = uc->uc_mcontext.regs[26];
+ regs[12] = uc->uc_mcontext.regs[27];
+ regs[13] = uc->uc_mcontext.regs[28];
+ regs[14] = uc->uc_mcontext.regs[29]; /* FP */
+ regs[15] = uc->uc_mcontext.regs[30]; /* LR */
+ regs[16] = GET_FPCTX(uc)->vregs[8];
+ regs[17] = GET_FPCTX(uc)->vregs[9];
+ regs[18] = GET_FPCTX(uc)->vregs[10];
+ regs[19] = GET_FPCTX(uc)->vregs[11];
+ regs[20] = GET_FPCTX(uc)->vregs[12];
+ regs[21] = GET_FPCTX(uc)->vregs[13];
+ regs[22] = GET_FPCTX(uc)->vregs[14];
+ regs[23] = GET_FPCTX(uc)->vregs[15];
+ unsigned long sp = uc->uc_mcontext.sp;
+
+ struct regs_overlay {
+ char x[sizeof(regs)];
+ };
__asm__ __volatile__ (
- "ldp x0, x1, [x5, " SC_R0_OFF "]\n\t"
- "ldp x2, x3, [x5, " SC_R2_OFF "]\n\t"
- "ldp x18, x19, [x5, " SC_R18_OFF "]\n\t"
- "ldp x20, x21, [x5, " SC_R20_OFF "]\n\t"
- "ldp x22, x23, [x5, " SC_R22_OFF "]\n\t"
- "ldp x24, x25, [x5, " SC_R24_OFF "]\n\t"
- "ldp x26, x27, [x5, " SC_R26_OFF "]\n\t"
- "ldp x28, x29, [x5, " SC_R28_OFF "]\n\t"
- "ldr x30, [x5, " SC_R30_OFF "]\n\t"
- "ldr d8, [x4, " FP_R08_OFF "]\n\t"
- "ldr d9, [x4, " FP_R09_OFF "]\n\t"
- "ldr d10, [x4, " FP_R10_OFF "]\n\t"
- "ldr d11, [x4, " FP_R11_OFF "]\n\t"
- "ldr d12, [x4, " FP_R12_OFF "]\n\t"
- "ldr d13, [x4, " FP_R13_OFF "]\n\t"
- "ldr d14, [x4, " FP_R14_OFF "]\n\t"
- "ldr d15, [x4, " FP_R15_OFF "]\n\t"
- "ldr x5, [x5, " SC_SP_OFF "]\n\t"
- "mov sp, x5\n\t"
- "ret\n"
+ "mov x4, %0\n"
+ "mov x5, %1\n"
+ "ldp x0, x1, [x4]\n"
+ "ldp x2, x3, [x4,16]\n"
+ "ldp x19, x20, [x4,32]\n"
+ "ldp x21, x22, [x4,48]\n"
+ "ldp x23, x24, [x4,64]\n"
+ "ldp x25, x26, [x4,80]\n"
+ "ldp x27, x28, [x4,96]\n"
+ "ldp x29, x30, [x4,112]\n"
+ "ldp d8, d9, [x4,128]\n"
+ "ldp d10, d11, [x4,144]\n"
+ "ldp d12, d13, [x4,160]\n"
+ "ldp d14, d15, [x4,176]\n"
+ "mov sp, x5\n"
+ "ret \n"
:
- : [uc_mcontext] "r"(uc_mcontext),
- [fpctx] "r"(fpctx)
+ : "r" (regs),
+ "r" (sp),
+ "m" (*(struct regs_overlay *)regs)
);
}
else