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gallium: add flag PIPE_TRANSFER_MAP_PERMANENTLY
Please see the diff for further info. This paves the way for moving user buffer uploads out of drivers and should allow to clean up the mess in u_upload_mgr in the meantime. For now only allowed for buffers on r300 and r600. Acked-by: Christian König <deathsimple@vodafone.de>
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0950086376
@ -68,8 +68,13 @@ i915_get_transfer(struct pipe_context *pipe,
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const struct pipe_box *box)
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{
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struct i915_context *i915 = i915_context(pipe);
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struct pipe_transfer *transfer = util_slab_alloc(&i915->transfer_pool);
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struct pipe_transfer *transfer;
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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transfer = util_slab_alloc(&i915->transfer_pool);
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if (transfer == NULL)
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return NULL;
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@ -720,9 +720,14 @@ i915_texture_get_transfer(struct pipe_context *pipe,
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{
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struct i915_context *i915 = i915_context(pipe);
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struct i915_texture *tex = i915_texture(resource);
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struct i915_transfer *transfer = util_slab_alloc(&i915->texture_transfer_pool);
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struct i915_transfer *transfer;
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boolean use_staging_texture = FALSE;
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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transfer = util_slab_alloc(&i915->texture_transfer_pool);
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if (transfer == NULL)
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return NULL;
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@ -587,6 +587,10 @@ llvmpipe_get_transfer(struct pipe_context *pipe,
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assert(resource);
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assert(level <= resource->last_level);
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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/*
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* Transfers, like other pipe operations, must happen in order, so flush the
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* context if necessary.
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@ -172,7 +172,13 @@ nouveau_buffer_transfer_get(struct pipe_context *pipe,
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{
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struct nv04_resource *buf = nv04_resource(resource);
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struct nouveau_context *nv = nouveau_context(pipe);
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struct nouveau_transfer *xfr = CALLOC_STRUCT(nouveau_transfer);
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struct nouveau_transfer *xfr;
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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xfr = CALLOC_STRUCT(nouveau_transfer);
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if (!xfr)
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return NULL;
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@ -243,7 +243,7 @@ nv50_miptree_transfer_new(struct pipe_context *pctx,
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uint32_t size;
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int ret;
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if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
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if (usage & (PIPE_TRANSFER_MAP_DIRECTLY | PIPE_TRANSFER_MAP_PERMANENTLY))
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return NULL;
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tx = CALLOC_STRUCT(nv50_transfer);
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@ -243,7 +243,7 @@ nvc0_miptree_transfer_new(struct pipe_context *pctx,
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uint32_t size;
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int ret;
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if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
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if (usage & (PIPE_TRANSFER_MAP_DIRECTLY | PIPE_TRANSFER_MAP_PERMANENTLY))
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return NULL;
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tx = CALLOC_STRUCT(nvc0_transfer);
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@ -26,6 +26,9 @@ nvfx_transfer_new(struct pipe_context *pipe,
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unsigned usage,
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const struct pipe_box *box)
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{
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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if((usage & (PIPE_TRANSFER_UNSYNCHRONIZED | PIPE_TRANSFER_DONTBLOCK)) == PIPE_TRANSFER_DONTBLOCK)
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{
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struct nouveau_bo* bo = ((struct nvfx_resource*)pt)->bo;
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@ -89,6 +89,10 @@ r300_texture_get_transfer(struct pipe_context *ctx,
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struct pipe_resource base;
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boolean referenced_cs, referenced_hw;
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if (usage & (PIPE_TRANSFER_MAP_DIRECTLY | PIPE_TRANSFER_MAP_PERMANENTLY)) {
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return NULL;
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}
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referenced_cs =
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r300->rws->cs_is_buffer_referenced(r300->cs, tex->cs_buf);
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if (referenced_cs) {
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@ -630,6 +630,10 @@ struct pipe_transfer* r600_texture_get_transfer(struct pipe_context *ctx,
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int r;
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boolean use_staging_texture = FALSE;
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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/* We cannot map a tiled texture directly because the data is
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* in a different order, therefore we do detiling using a blit.
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*
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@ -74,6 +74,10 @@ svga_buffer_get_transfer(struct pipe_context *pipe,
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struct svga_buffer *sbuf = svga_buffer(resource);
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struct pipe_transfer *transfer;
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if (usage & PIPE_TRANSFER_MAP_PERMANENTLY) {
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return NULL;
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}
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transfer = CALLOC_STRUCT(pipe_transfer);
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if (transfer == NULL) {
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return NULL;
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@ -259,7 +259,7 @@ svga_texture_get_transfer(struct pipe_context *pipe,
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unsigned nblocksy = util_format_get_nblocksy(texture->format, box->height);
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/* We can't map texture storage directly */
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if (usage & PIPE_TRANSFER_MAP_DIRECTLY)
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if (usage & (PIPE_TRANSFER_MAP_DIRECTLY | PIPE_TRANSFER_MAP_PERMANENTLY))
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return NULL;
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assert(box->depth == 1);
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@ -225,6 +225,22 @@ enum pipe_transfer_usage {
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*/
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PIPE_TRANSFER_MAP_DIRECTLY = (1 << 2),
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/**
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* The transfer should map the resource storage directly and the GPU should
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* be able to see what the CPU has written. Such a storage may stay mapped
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* while issuing draw commands which use it. The only allowed usage is
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* non-overlapping writes which are suballocated out of a big buffer.
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* The minimum allowed alignment of suballocations is 256 bytes (this is
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* a subject to change).
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* The flag is intended to be used to avoid mapping and unmapping
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* resources repeatedly when doing uploads and draws intermixed.
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*
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* The driver may return NULL if that isn't possible, and the state
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* tracker needs to cope with that and use an alternative path
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* without this flag.
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*/
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PIPE_TRANSFER_MAP_PERMANENTLY = (1 << 3),
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/**
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* Discards the memory within the mapped region.
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*
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