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i965: Disable ARB_fragment_shader_interlock for platforms prior to GEN9

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ARB_fragment_shader_interlock depends on memory fences to
ensure fragment ordering and this ordering guarantee is
only supported from GEN9 onwards.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=109980
Fixes: 939312702e "i965: Add ARB_fragment_shader_interlock support."
Signed-off-by: Plamena Manolova <plamena.n.manolova@gmail.com>
Reviewed-by: Jason Ekstrand <jason@jlekstrand.net>
This commit is contained in:
Plamena Manolova 2019-03-12 21:25:36 +02:00
parent 0c3adaad22
commit 19ab082001
2 changed files with 25 additions and 1 deletions
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1
src/intel/compiler/brw_fs_generator.cpp
View File

@ -2100,6 +2100,7 @@ fs_generator::generate_code(const cfg_t *cfg, int dispatch_width)
break;
case SHADER_OPCODE_INTERLOCK:
assert(devinfo->gen >= 9);
/* The interlock is basically a memory fence issued via sendc */
brw_memory_fence(p, dst, BRW_OPCODE_SENDC);
break;

25
src/mesa/drivers/dri/i965/intel_extensions.c
View File

@ -254,7 +254,6 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.EXT_shader_samples_identical = true;
ctx->Extensions.OES_primitive_bounding_box = true;
ctx->Extensions.OES_texture_buffer = true;
ctx->Extensions.ARB_fragment_shader_interlock = true;
if (can_do_pipelined_register_writes(brw->screen)) {
ctx->Extensions.ARB_draw_indirect = true;
@ -327,6 +326,30 @@ intelInitExtensions(struct gl_context *ctx)
ctx->Extensions.KHR_blend_equation_advanced_coherent = true;
ctx->Extensions.KHR_texture_compression_astc_ldr = true;
ctx->Extensions.KHR_texture_compression_astc_sliced_3d = true;
/*
* From the Skylake PRM Vol. 7 (Memory Fence Message, page 221):
* "A memory fence message issued by a thread causes further messages
* issued by the thread to be blocked until all previous data port
* messages have completed, or the results can be globally observed from
* the point of view of other threads in the system."
*
* From the Haswell PRM Vol. 7 (Memory Fence, page 256):
* "A memory fence message issued by a thread causes further messages
* issued by the thread to be blocked until all previous messages issued
* by the thread to that data port (data cache or render cache) have
* been globally observed from the point of view of other threads in the
* system."
*
* Summarized: For ARB_fragment_shader_interlock to work, we need to
* ensure memory access ordering for all messages to the dataport from
* all threads. Memory fence messages prior to SKL only provide memory
* access ordering for messages from the same thread, so we can only
* support the feature from Gen9 onwards.
*
*/
ctx->Extensions.ARB_fragment_shader_interlock = true;
}
if (gen_device_info_is_9lp(devinfo))