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i965/fp: Fix segfault on gen4 TXB instructions.

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The gen4 simd16 workaround looks at ir->type to determine how much
storage to allocate for the simd16 value.  In fragment programs,
texturing only ever returns float vec4s (unlike GLSL, which can also
have scalar floats or vector integers), so this is the right type.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=56962
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
This commit is contained in:
Eric Anholt 2012-11-26 13:39:11 -08:00
parent f126f34c1d
commit 2f7915bdb9
1 changed files with 2 additions and 0 deletions
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src/mesa/drivers/dri/i965/brw_fs_fp.cpp
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@ -441,6 +441,8 @@ fs_visitor::emit_fragment_program_code()
break;
}
ir->type = glsl_type::vec4_type;
const glsl_type *coordinate_type;
switch (fpi->TexSrcTarget) {
case TEXTURE_1D_INDEX: