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nvc0: Add support for NV_fill_rectangle for the GM200+

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This enables support for the GL_NV_fill_rectangle extension on the
GM200+ for Desktop OpenGL.

Signed-off-by: Lyude <lyude@redhat.com>

Changes since v1:
- Fix commit message
- Add note to reldocs
Changes since v2:
- Remove unnessecary parens in nvc0_screen_get_param()
- Fix sorting in release notes
- Don't execute FILL_RECTANGLE method on pre-GM200+ GPUs

Reviewed-by: Ilia Mirkin <imirkin@alum.mit.edu>
This commit is contained in:
Lyude 2017-03-15 17:15:03 -04:00 committed by Ilia Mirkin
parent 82e0c5f484
commit 31970ab9a6
5 changed files with 14 additions and 2 deletions
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1
docs/relnotes/17.1.0.html
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@ -49,6 +49,7 @@ Note: some of the new features are only available with certain drivers.
<li>GL_ARB_shader_group_vote on radeonsi</li>
<li>GL_ARB_transform_feedback2 on i965/gen6</li>
<li>GL_ARB_transform_feedback_overflow_query on i965/gen6+</li>
<li>GL_NV_fill_rectangle on nvc0</li>
<li>Geometry shaders enabled on swr</li>
</ul>

3
src/gallium/drivers/nouveau/nvc0/nvc0_3d.xml.h
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@ -772,6 +772,9 @@ WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
#define NVC0_3D_VTX_ATTR_MASK_UNK0DD0_ALT__ESIZE 0x00000004
#define NVC0_3D_VTX_ATTR_MASK_UNK0DD0_ALT__LEN 0x00000004
#define NVC0_3D_FILL_RECTANGLE 0x0000113c
#define NVC0_3D_FILL_RECTANGLE_ENABLE 0x00000002
#define NVC0_3D_UNK1140 0x00001140
#define NVC0_3D_UNK1144 0x00001144

3
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
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@ -256,6 +256,8 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
return nouveau_screen(pscreen)->vram_domain & NOUVEAU_BO_VRAM ? 1 : 0;
case PIPE_CAP_TGSI_FS_FBFETCH:
return class_3d >= NVE4_3D_CLASS; /* needs testing on fermi */
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
return class_3d >= GM200_3D_CLASS;
/* unsupported caps */
case PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT:
@ -286,7 +288,6 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY:
case PIPE_CAP_INT64_DIVMOD:
case PIPE_CAP_TGSI_CLOCK:
case PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE:
return 0;
case PIPE_CAP_VENDOR_ID:

7
src/gallium/drivers/nouveau/nvc0/nvc0_state.c
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@ -211,6 +211,7 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe,
const struct pipe_rasterizer_state *cso)
{
struct nvc0_rasterizer_stateobj *so;
uint16_t class_3d = nouveau_screen(pipe->screen)->class_3d;
uint32_t reg;
so = CALLOC_STRUCT(nvc0_rasterizer_stateobj);
@ -261,6 +262,12 @@ nvc0_rasterizer_state_create(struct pipe_context *pipe,
SB_IMMED_3D(so, POINT_SPRITE_ENABLE, cso->point_quad_rasterization);
SB_IMMED_3D(so, POINT_SMOOTH_ENABLE, cso->point_smooth);
if (class_3d >= GM200_3D_CLASS) {
SB_IMMED_3D(so, FILL_RECTANGLE,
cso->fill_front == PIPE_POLYGON_MODE_FILL_RECTANGLE ?
NVC0_3D_FILL_RECTANGLE_ENABLE : 0);
}
SB_BEGIN_3D(so, MACRO_POLYGON_MODE_FRONT, 1);
SB_DATA (so, nvgl_polygon_mode(cso->fill_front));
SB_BEGIN_3D(so, MACRO_POLYGON_MODE_BACK, 1);

2
src/gallium/drivers/nouveau/nvc0/nvc0_stateobj.h
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@ -23,7 +23,7 @@ struct nvc0_blend_stateobj {
struct nvc0_rasterizer_stateobj {
struct pipe_rasterizer_state pipe;
int size;
uint32_t state[42];
uint32_t state[43];
};
struct nvc0_zsa_stateobj {