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gallium: rename PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE to *_BUFFER0_*

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UBOs will use a larger limit.

Reviewed-By: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16881>
This commit is contained in:
Marek Olšák 2022-06-05 18:47:09 -04:00
parent 2a151238a0
commit 406cf871b2
29 changed files with 38 additions and 38 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
docs/gallium/screen.rst
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@ -682,7 +682,7 @@ support different features.
* ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
* ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
This is valid for all shaders except the fragment shader.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE``: The maximum size of constant buffer 0 in bytes.
* ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
only permit binding one constant buffer per shader.

2
src/gallium/auxiliary/gallivm/lp_bld_limits.h
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@ -113,7 +113,7 @@ gallivm_get_shader_param(enum pipe_shader_cap param)
return 32;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 32;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return LP_MAX_TGSI_CONST_BUFFER_SIZE;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return LP_MAX_TGSI_CONST_BUFFERS;

2
src/gallium/auxiliary/tgsi/tgsi_exec.h
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@ -446,7 +446,7 @@ tgsi_exec_get_shader_param(enum pipe_shader_cap param)
return TGSI_EXEC_MAX_INPUT_ATTRIBS;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 32;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return PIPE_MAX_CONSTANT_BUFFERS;

2
src/gallium/drivers/asahi/agx_pipe.c
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@ -932,7 +932,7 @@ agx_get_shader_param(struct pipe_screen* pscreen,
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:

2
src/gallium/drivers/crocus/crocus_screen.c
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@ -477,7 +477,7 @@ crocus_get_shader_param(struct pipe_screen *pscreen,
return 32;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 32;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return devinfo->ver >= 6 ? 16 : 1;

2
src/gallium/drivers/d3d12/d3d12_screen.cpp
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@ -423,7 +423,7 @@ d3d12_get_shader_param(struct pipe_screen *pscreen,
return 16;
return PIPE_MAX_SAMPLERS;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 65536;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:

2
src/gallium/drivers/etnaviv/etnaviv_screen.c
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@ -399,7 +399,7 @@ etna_screen_get_shader_param(struct pipe_screen *pscreen,
: screen->specs.vertex_sampler_count;
case PIPE_SHADER_CAP_PREFERRED_IR:
return PIPE_SHADER_IR_NIR;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
if (ubo_enable)
return 16384; /* 16384 so state tracker enables UBOs */
return shader == PIPE_SHADER_FRAGMENT

2
src/gallium/drivers/freedreno/freedreno_screen.c
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@ -621,7 +621,7 @@ fd_screen_get_shader_param(struct pipe_screen *pscreen,
return is_a6xx(screen) ? 32 : 16;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 64; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
/* NOTE: seems to be limit for a3xx is actually 512 but
* split between VS and FS. Use lower limit of 256 to
* avoid getting into impossible situations:

2
src/gallium/drivers/i915/i915_screen.c
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@ -339,7 +339,7 @@ i915_get_shader_param(struct pipe_screen *screen, enum pipe_shader_type shader,
return 10;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 1;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 32 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;

2
src/gallium/drivers/iris/iris_screen.c
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@ -473,7 +473,7 @@ iris_get_shader_param(struct pipe_screen *pscreen,
return stage == MESA_SHADER_VERTEX ? 16 : 32;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 32;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 16;

4
src/gallium/drivers/lima/lima_screen.c
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@ -226,7 +226,7 @@ get_vertex_shader_param(struct lima_screen *screen,
/* Mali-400 GP provides space for 304 vec4 uniforms, globals and
* temporary variables. */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 304 * 4 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
@ -264,7 +264,7 @@ get_fragment_shader_param(struct lima_screen *screen,
* However, indirect access to an uniform only supports indices up
* to 8192 (a 2048 vec4 array). To prevent indices bigger than that,
* limit max const buffer size to 8192 for now. */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 2048 * 4 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:

4
src/gallium/drivers/nouveau/nv30/nv30_screen.c
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@ -338,7 +338,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen,
case PIPE_SHADER_CAP_MAX_INPUTS:
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 16;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return ((eng3d->oclass >= NV40_3D_CLASS) ? (468 - 6): (256 - 6)) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
@ -392,7 +392,7 @@ nv30_screen_get_shader_param(struct pipe_screen *pscreen,
return 8; /* should be possible to do 10 with nv4x */
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 4;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return ((eng3d->oclass >= NV40_3D_CLASS) ? 224 : 32) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;

2
src/gallium/drivers/nouveau/nv50/nv50_screen.c
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@ -478,7 +478,7 @@ nv50_screen_get_shader_param(struct pipe_screen *pscreen,
return 15;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 16;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 65536;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return NV50_MAX_PIPE_CONSTBUFS;

2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
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@ -510,7 +510,7 @@ nvc0_screen_get_shader_param(struct pipe_screen *pscreen,
return 0x200 / 16;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 32;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return NVC0_MAX_CONSTBUF_SIZE;
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return NVC0_MAX_PIPE_CONSTBUFS;

2
src/gallium/drivers/panfrost/pan_screen.c
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@ -384,7 +384,7 @@ panfrost_get_shader_param(struct pipe_screen *screen,
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* arbitrary */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:

4
src/gallium/drivers/r300/r300_screen.c
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@ -284,7 +284,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen,
return 10;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 4;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return (is_r500 ? 256 : 32) * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
@ -373,7 +373,7 @@ static int r300_get_shader_param(struct pipe_screen *pscreen,
return 16;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 10;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 256 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;

2
src/gallium/drivers/r600/r600_pipe.c
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@ -589,7 +589,7 @@ static int r600_get_shader_param(struct pipe_screen* pscreen,
return shader == PIPE_SHADER_FRAGMENT ? 8 : 32;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
if (shader == PIPE_SHADER_COMPUTE) {
uint64_t max_const_buffer_size;
enum pipe_shader_ir ir_type = is_nir_enabled(&rscreen->b) ?

2
src/gallium/drivers/radeonsi/si_get.c
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@ -429,7 +429,7 @@ static int si_get_shader_param(struct pipe_screen *pscreen, enum pipe_shader_typ
return shader == PIPE_SHADER_FRAGMENT ? 8 : 32;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* Max native temporaries. */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 1 << 26; /* 64 MB */
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return SI_NUM_CONST_BUFFERS;

6
src/gallium/drivers/svga/svga_screen.c
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@ -504,7 +504,7 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
return 10;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return svgascreen->max_color_buffers;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 224 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
@ -575,7 +575,7 @@ vgpu9_get_shader_param(struct pipe_screen *screen,
return 16;
case PIPE_SHADER_CAP_MAX_OUTPUTS:
return 10;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 256 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;
@ -690,7 +690,7 @@ vgpu10_get_shader_param(struct pipe_screen *screen,
else
return svgascreen->max_vs_outputs;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return VGPU10_MAX_CONSTANT_BUFFER_ELEMENT_COUNT * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return svgascreen->max_const_buffers;

2
src/gallium/drivers/v3d/v3d_screen.c
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@ -393,7 +393,7 @@ v3d_screen_get_shader_param(struct pipe_screen *pscreen, unsigned shader,
return V3D_MAX_FS_INPUTS / 4;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
/* Note: Limited by the offset size in
* v3d_unit_data_create().
*/

2
src/gallium/drivers/vc4/vc4_screen.c
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@ -275,7 +275,7 @@ vc4_screen_get_shader_param(struct pipe_screen *pscreen,
return shader == PIPE_SHADER_FRAGMENT ? 1 : 8;
case PIPE_SHADER_CAP_MAX_TEMPS:
return 256; /* GL_MAX_PROGRAM_TEMPORARIES_ARB */
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 16 * 1024 * sizeof(float);
case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
return 1;

2
src/gallium/drivers/virgl/virgl_screen.c
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@ -420,7 +420,7 @@ virgl_get_shader_param(struct pipe_screen *screen,
return vscreen->caps.caps.v1.glsl_level >= 130;
case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
return 32;
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
return 4096 * sizeof(float[4]);
case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
if (shader == PIPE_SHADER_FRAGMENT || shader == PIPE_SHADER_COMPUTE)

2
src/gallium/drivers/zink/zink_screen.c
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@ -949,7 +949,7 @@ zink_get_shader_param(struct pipe_screen *pscreen,
return MIN2(max, 64); // prevent overflowing struct shader_info::outputs_read/written
}
case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
case PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE:
/* At least 16384 is guaranteed by VK spec */
assert(screen->info.props.limits.maxUniformBufferRange >= 16384);
/* but Gallium can't handle values that are too big */

2
src/gallium/frontends/clover/core/device.cpp
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@ -272,7 +272,7 @@ device::max_mem_input() const {
cl_ulong
device::max_const_buffer_size() const {
return pipe->get_shader_param(pipe, PIPE_SHADER_COMPUTE,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE);
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE);
}
cl_uint

2
src/gallium/frontends/lavapipe/lvp_device.c
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@ -259,7 +259,7 @@ lvp_physical_device_init(struct lvp_physical_device *device,
.maxImageDimensionCube = (1 << device->pscreen->get_param(device->pscreen, PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS)),
.maxImageArrayLayers = device->pscreen->get_param(device->pscreen, PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS),
.maxTexelBufferElements = device->pscreen->get_param(device->pscreen, PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE),
.maxUniformBufferRange = min_shader_param(device->pscreen, PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE),
.maxUniformBufferRange = min_shader_param(device->pscreen, PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE),
.maxStorageBufferRange = device->pscreen->get_param(device->pscreen, PIPE_CAP_MAX_SHADER_BUFFER_SIZE),
.maxPushConstantsSize = MAX_PUSH_CONSTANTS_SIZE,
.maxMemoryAllocationCount = UINT32_MAX,

6
src/gallium/frontends/nine/adapter9.c
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@ -74,9 +74,9 @@ NineAdapter9_ctor( struct NineAdapter9 *This,
/* checks minimum requirements, most are vs3/ps3 strict requirements */
if (!has_sm3(hal) ||
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) < 256 * sizeof(float[4]) ||
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) < 256 * sizeof(float[4]) ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) < 244 * sizeof(float[4]) ||
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) < 244 * sizeof(float[4]) ||
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEMPS) < 32 ||
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,
@ -93,7 +93,7 @@ NineAdapter9_ctor( struct NineAdapter9 *This,
}
/* for r500 */
if (hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) < 276 * sizeof(float[4]) || /* we put bool and int constants with float constants */
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) < 276 * sizeof(float[4]) || /* we put bool and int constants with float constants */
hal->get_shader_param(hal, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_TEMPS) < 40 || /* we use some more temp registers */
hal->get_shader_param(hal, PIPE_SHADER_FRAGMENT,

4
src/gallium/frontends/nine/device9.c
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@ -241,7 +241,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
if (This->may_swvp &&
(This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE)
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE)
< (NINE_MAX_CONST_F_SWVP/2) * sizeof(float[4]) ||
This->screen->get_shader_param(This->screen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS) < 5)) {
@ -445,7 +445,7 @@ NineDevice9_ctor( struct NineDevice9 *This,
/* vs 3.0: >= 256 float constants, but for cards with exactly 256 slots,
* we have to take in some more slots for int and bool*/
max_const_vs = _min(pScreen->get_shader_param(pScreen, PIPE_SHADER_VERTEX,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) /
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) /
sizeof(float[4]),
NINE_MAX_CONST_ALL);
/* ps 3.0: 224 float constants. All cards supported support at least

2
src/gallium/include/pipe/p_defines.h
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@ -1076,7 +1076,7 @@ enum pipe_shader_cap
PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH,
PIPE_SHADER_CAP_MAX_INPUTS,
PIPE_SHADER_CAP_MAX_OUTPUTS,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE,
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE,
PIPE_SHADER_CAP_MAX_CONST_BUFFERS,
PIPE_SHADER_CAP_MAX_TEMPS,
/* boolean caps */

4
src/mesa/state_tracker/st_extensions.c
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@ -157,7 +157,7 @@ void st_init_limits(struct pipe_screen *screen,
c->MaxUniformBlockSize =
screen->get_shader_param(screen, PIPE_SHADER_FRAGMENT,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE);
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE);
/* GL45-CTS.enhanced_layouts.ssb_member_invalid_offset_alignment fails if
* this is larger than INT_MAX - 100. Use a nicely aligned limit.
*/
@ -229,7 +229,7 @@ void st_init_limits(struct pipe_screen *screen,
pc->MaxUniformComponents =
screen->get_shader_param(screen, sh,
PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE) / 4;
PIPE_SHADER_CAP_MAX_CONST_BUFFER0_SIZE) / 4;
/* reserve space in the default-uniform for lowered state */
if (sh == PIPE_SHADER_VERTEX ||