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https://gitee.com/openharmony/third_party_mesa3d
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radeon: Insist on libdrm being present to build.
There's no sense in building a broken driver. Previously, there was the potential of building a DRI1-only driver that would work for DRI1 and fail on DRI2 because the newer libdrm code wasn't present. Now the radeon build system should be matching intel and nouveau.
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48c9925367
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@ -25,7 +25,7 @@ CXXFLAGS = $(CXXFLAGS_NOVISIBILITY) @VISIBILITY_CXXFLAGS@
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LDFLAGS = @LDFLAGS@
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EXTRA_LIB_PATH = @EXTRA_LIB_PATH@
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RADEON_CFLAGS = @RADEON_CFLAGS@
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RADEON_LDFLAGS = @RADEON_LDFLAGS@
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RADEON_LIBS = @RADEON_LIBS@
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NOUVEAU_CFLAGS = @NOUVEAU_CFLAGS@
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NOUVEAU_LIBS = @NOUVEAU_LIBS@
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INTEL_LIBS = @INTEL_LIBS@
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12
configure.ac
12
configure.ac
@ -1277,19 +1277,9 @@ esac
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case $DRI_DIRS in
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*radeon*|*r200*)
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PKG_CHECK_MODULES([LIBDRM_RADEON],
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[libdrm_radeon >= $LIBDRM_RADEON_REQUIRED],
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HAVE_LIBDRM_RADEON=yes,
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HAVE_LIBDRM_RADEON=no)
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if test "x$HAVE_LIBDRM_RADEON" = xyes; then
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RADEON_CFLAGS="-DHAVE_LIBDRM_RADEON=1 $LIBDRM_RADEON_CFLAGS"
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RADEON_LDFLAGS=$LIBDRM_RADEON_LIBS
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fi
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PKG_CHECK_MODULES([RADEON], [libdrm_radeon >= $LIBDRM_RADEON_REQUIRED])
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;;
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esac
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AC_SUBST([RADEON_CFLAGS])
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AC_SUBST([RADEON_LDFLAGS])
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dnl
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@ -52,7 +52,7 @@ X86_SOURCES =
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DRIVER_DEFINES = -DRADEON_R200
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INCLUDES += $(RADEON_CFLAGS)
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DRI_LIB_DEPS += $(RADEON_LDFLAGS)
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DRI_LIB_DEPS += $(RADEON_LIBS)
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##### TARGETS #####
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@ -8,7 +8,7 @@ LIBNAME = radeon_dri.so
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include ../Makefile.defines
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ifeq ($(RADEON_LDFLAGS),)
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ifeq ($(RADEON_LIBS),)
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CS_SOURCES = radeon_cs_space_drm.c radeon_bo.c radeon_cs.c
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endif
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@ -50,7 +50,7 @@ C_SOURCES = \
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DRIVER_DEFINES = -DRADEON_R100
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INCLUDES += $(RADEON_CFLAGS)
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DRI_LIB_DEPS += $(RADEON_LDFLAGS)
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DRI_LIB_DEPS += $(RADEON_LIBS)
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X86_SOURCES =
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@ -5,104 +5,9 @@
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#include "../radeon/radeon_bo_drm.h"
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#include "../radeon/radeon_cs_drm.h"
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#ifdef HAVE_LIBDRM_RADEON
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#include "radeon_bo.h"
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#include "radeon_bo_gem.h"
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#include "radeon_cs.h"
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#include "radeon_cs_gem.h"
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#else
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#include <stdint.h>
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#define RADEON_GEM_DOMAIN_CPU 0x1 // Cached CPU domain
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#define RADEON_GEM_DOMAIN_GTT 0x2 // GTT or cache flushed
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#define RADEON_GEM_DOMAIN_VRAM 0x4 // VRAM domain
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#define RADEON_TILING_MACRO 0x1
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#define RADEON_TILING_MICRO 0x2
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#define RADEON_TILING_SWAP 0x4
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#ifndef RADEON_TILING_SURFACE
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#define RADEON_TILING_SURFACE 0x8 /* this object requires a surface
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* when mapped - i.e. front buffer */
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#endif
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#ifndef DRM_RADEON_GEM_INFO
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#define DRM_RADEON_GEM_INFO 0x1c
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struct drm_radeon_gem_info {
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uint64_t gart_size;
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uint64_t vram_size;
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uint64_t vram_visible;
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};
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struct drm_radeon_info {
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uint32_t request;
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uint32_t pad;
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uint32_t value;
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};
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#endif
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#ifndef RADEON_PARAM_DEVICE_ID
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#define RADEON_PARAM_DEVICE_ID 16
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#endif
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#ifndef RADEON_PARAM_NUM_Z_PIPES
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#define RADEON_PARAM_NUM_Z_PIPES 17
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#endif
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#ifndef RADEON_INFO_DEVICE_ID
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#define RADEON_INFO_DEVICE_ID 0
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#endif
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#ifndef RADEON_INFO_NUM_GB_PIPES
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#define RADEON_INFO_NUM_GB_PIPES 0
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#endif
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#ifndef RADEON_INFO_NUM_Z_PIPES
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#define RADEON_INFO_NUM_Z_PIPES 0
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#endif
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#ifndef DRM_RADEON_INFO
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#define DRM_RADEON_INFO 0x1
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#endif
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static inline void radeon_gem_get_kernel_name(struct radeon_bo *dummy, uint32_t *value)
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{
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}
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static inline uint32_t radeon_gem_name_bo(struct radeon_bo *dummy)
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{
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return 0;
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}
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static inline void *radeon_bo_manager_gem_ctor(int fd)
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{
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fprintf(stderr, "[%s:%u] Mesa built without Radeon libdrm support.\n",
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__func__, __LINE__);
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return NULL;
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}
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static inline void radeon_bo_manager_gem_dtor(void *dummy)
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{
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}
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static inline void *radeon_cs_manager_gem_ctor(int fd)
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{
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fprintf(stderr, "[%s:%u] Mesa built without Radeon libdrm support.\n",
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__func__, __LINE__);
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return NULL;
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}
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static inline void radeon_cs_manager_gem_dtor(void *dummy)
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{
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}
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static inline void radeon_tracker_print(void *ptr, int io)
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{
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}
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#endif
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#endif
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