openharmony/third_party_mesa3d
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Merge remote-tracking branch 'origin/master' into vulkan

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This commit is contained in:
Kenneth Graunke 2016-03-01 16:26:09 -08:00
commit 89e421369c
140 changed files with 1475 additions and 1903 deletions
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4
Android.common.mk
View File

@ -33,6 +33,7 @@ MESA_VERSION := $(shell cat $(MESA_TOP)/VERSION)
# define ANDROID_VERSION (e.g., 4.0.x => 0x0400)
LOCAL_CFLAGS += \
-Wno-unused-parameter \
-Wno-date-time \
-DPACKAGE_VERSION=\"$(MESA_VERSION)\" \
-DPACKAGE_BUGREPORT=\"https://bugs.freedesktop.org/enter_bug.cgi?product=Mesa\" \
-DANDROID_VERSION=0x0$(MESA_ANDROID_MAJOR_VERSION)0$(MESA_ANDROID_MINOR_VERSION)
@ -88,3 +89,6 @@ LOCAL_CPPFLAGS += \
ifeq ($(strip $(LOCAL_MODULE_TAGS)),)
LOCAL_MODULE_TAGS := optional
endif
# Quiet down the build system and remove any .h files from the sources
LOCAL_SRC_FILES := $(patsubst %.h, , $(LOCAL_SRC_FILES))

6
Android.mk
View File

@ -42,6 +42,10 @@ $(call local-intermediates-dir)
endef
endif
MESA_DRI_MODULE_REL_PATH := dri
MESA_DRI_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/$(MESA_DRI_MODULE_REL_PATH)
MESA_DRI_MODULE_UNSTRIPPED_PATH := $(TARGET_OUT_SHARED_LIBRARIES_UNSTRIPPED)/$(MESA_DRI_MODULE_REL_PATH)
MESA_COMMON_MK := $(MESA_TOP)/Android.common.mk
MESA_PYTHON2 := python
@ -87,7 +91,7 @@ SUBDIRS := \
src/loader \
src/mapi \
src/compiler \
src/glsl \
src/compiler/glsl \
src/mesa \
src/util \
src/egl \

12
Makefile.am
View File

@ -22,20 +22,28 @@
SUBDIRS = src
AM_DISTCHECK_CONFIGURE_FLAGS = \
--enable-dri \
--enable-dri3 \
--enable-egl \
--enable-gallium-tests \
--enable-gallium-osmesa \
--enable-gallium-llvm \
--enable-gbm \
--enable-gles1 \
--enable-gles2 \
--enable-glx \
--enable-glx-tls \
--enable-nine \
--enable-opencl \
--enable-opengl \
--enable-va \
--enable-vdpau \
--enable-xa \
--enable-xvmc \
--disable-llvm-shared-libs \
--with-egl-platforms=x11,wayland,drm \
--with-egl-platforms=x11,wayland,drm,surfaceless \
--with-dri-drivers=i915,i965,nouveau,radeon,r200,swrast \
--with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast
--with-gallium-drivers=i915,ilo,nouveau,r300,r600,radeonsi,freedreno,svga,swrast,vc4,virgl
ACLOCAL_AMFLAGS = -I m4

35
bin/get-extra-pick-list.sh Executable file
View File

@ -0,0 +1,35 @@
#!/bin/sh
# Script for generating a list of candidates which fix commits that have been
# previously cherry-picked to a stable branch.
#
# Usage examples:
#
# $ bin/get-extra-pick-list.sh
# $ bin/get-extra-pick-list.sh > picklist
# $ bin/get-extra-pick-list.sh | tee picklist
# Use the last branchpoint as our limit for the search
# XXX: there should be a better way for this
latest_branchpoint=`git branch | grep \* | cut -c 3-`-branchpoint
# Grep for commits with "cherry picked from commit" in the commit message.
git log --reverse --grep="cherry picked from commit" $latest_branchpoint..HEAD |\
grep "cherry picked from commit" |\
sed -e 's/^[[:space:]]*(cherry picked from commit[[:space:]]*//' -e 's/)//' |\
cut -c -8 |\
while read sha
do
# Check if the original commit is referenced in master
git log -n1 --pretty=oneline --grep=$sha $latest_branchpoint..origin/master |\
cut -c -8 |\
while read candidate
do
# Check if the potential fix, hasn't landed in branch yet.
found=`git log -n1 --pretty=oneline --reverse --grep=$candidate $latest_branchpoint..HEAD |wc -l`
if test $found = 0
then
echo Commit $candidate might need to be picked, as it references $sha
fi
done
done

2
docs/GL3.txt
View File

@ -245,7 +245,7 @@ GLES3.2, GLSL ES 3.2
GL_OES_draw_buffers_indexed not started
GL_OES_draw_elements_base_vertex DONE (all drivers)
GL_OES_geometry_shader started (Marta)
GL_OES_gpu_shader5 not started (based on parts of GL_ARB_gpu_shader5, which is done for some drivers)
GL_OES_gpu_shader5 DONE (all drivers that support GL_ARB_gpu_shader5)
GL_OES_primitive_bounding box not started
GL_OES_sample_shading not started (based on parts of GL_ARB_sample_shading, which is done for some drivers)
GL_OES_sample_variables not started (based on parts of GL_ARB_sample_shading, which is done for some drivers)

45
docs/shading.html
View File

@ -209,51 +209,6 @@ The final vertex and fragment programs may be interpreted in software
(see drivers/dri/i915/i915_fragprog.c for example).
</p>
<h3>Code Generation Options</h3>
<p>
Internally, there are several options that control the compiler's code
generation and instruction selection.
These options are seen in the gl_shader_state struct and may be set
by the device driver to indicate its preferences:
<pre>
struct gl_shader_state
{
...
/** Driver-selectable options: */
GLboolean EmitHighLevelInstructions;
GLboolean EmitCondCodes;
GLboolean EmitComments;
};
</pre>
<dl>
<dt>EmitHighLevelInstructions</dt>
<dd>
This option controls instruction selection for loops and conditionals.
If the option is set high-level IF/ELSE/ENDIF, LOOP/ENDLOOP, CONT/BRK
instructions will be emitted.
Otherwise, those constructs will be implemented with BRA instructions.
</dd>
<dt>EmitCondCodes</dt>
<dd>
If set, condition codes (ala GL_NV_fragment_program) will be used for
branching and looping.
Otherwise, ordinary registers will be used (the IF instruction will
examine the first operand's X component and do the if-part if non-zero).
This option is only relevant if EmitHighLevelInstructions is set.
</dd>
<dt>EmitComments</dt>
<dd>
If set, instructions will be annotated with comments to help with debugging.
Extra NOP instructions will also be inserted.
</dd>
</dl>
<h2 id="validation">Compiler Validation</h2>
<p>

1
include/pci_ids/virtio_gpu_pci_ids.h
View File

@ -1 +1,2 @@
CHIPSET(0x0010, VIRTGL, VIRTGL)
CHIPSET(0x1050, VIRTGL, VIRTGL)

15
install-gallium-links.mk
View File

@ -3,9 +3,9 @@
if BUILD_SHARED
if HAVE_COMPAT_SYMLINKS
all-local : .libs/install-gallium-links
all-local : .install-gallium-links
.libs/install-gallium-links : $(dri_LTLIBRARIES) $(egl_LTLIBRARIES) $(lib_LTLIBRARIES)
.install-gallium-links : $(dri_LTLIBRARIES) $(egl_LTLIBRARIES) $(lib_LTLIBRARIES)
$(AM_V_GEN)$(MKDIR_P) $(top_builddir)/$(LIB_DIR); \
link_dir=$(top_builddir)/$(LIB_DIR)/gallium; \
if test x$(egl_LTLIBRARIES) != x; then \
@ -23,4 +23,15 @@ all-local : .libs/install-gallium-links
fi; \
done && touch $@
endif
clean-local:
for f in $(notdir $(dri_LTLIBRARIES:%.la=.libs/%.$(LIB_EXT)*)) \
$(notdir $(egl_LTLIBRARIES:%.la=.libs/%.$(LIB_EXT)*)) \
$(notdir $(lib_LTLIBRARIES:%.la=.libs/%.$(LIB_EXT)*)); do \
echo $$f; \
$(RM) $(top_builddir)/$(LIB_DIR)/gallium/$$f; \
done;
rmdir $(top_builddir)/$(LIB_DIR)/gallium || true
$(RM) .install-gallium-links
endif

4
src/compiler/Android.gen.mk
View File

@ -42,6 +42,10 @@ LOCAL_EXPORT_C_INCLUDE_DIRS += \
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
$(NIR_GENERATED_FILES))
# Modules using libmesa_nir must set LOCAL_GENERATED_SOURCES to this
MESA_GEN_NIR_H := $(addprefix $(call local-generated-sources-dir)/, \
nir/nir_opcodes.h \
nir/nir_builder_opcodes.h)
nir_builder_opcodes_gen := $(LOCAL_PATH)/nir/nir_builder_opcodes_h.py
nir_builder_opcodes_deps := \

4
src/compiler/glsl/Android.gen.mk
View File

@ -33,7 +33,7 @@ LOCAL_SRC_FILES := $(LOCAL_SRC_FILES)
LOCAL_C_INCLUDES += \
$(intermediates)/glcpp \
$(MESA_TOP)/src/glsl/glcpp \
$(LOCAL_PATH)/glcpp \
LOCAL_GENERATED_SOURCES += $(addprefix $(intermediates)/, \
$(LIBGLCPP_GENERATED_FILES) \
@ -51,6 +51,8 @@ define glsl_local-y-to-c-and-h
$(hide) $(YACC) -o $@ -p "glcpp_parser_" $<
endef
YACC_HEADER_SUFFIX := .hpp
define local-yy-to-cpp-and-h
@mkdir -p $(dir $@)
@echo "Mesa Yacc: $(PRIVATE_MODULE) <= $<"

3
src/compiler/glsl/Android.mk
View File

@ -36,7 +36,6 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := \
$(LIBGLCPP_FILES) \
$(LIBGLSL_FILES) \
$(NIR_FILES)
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
@ -67,7 +66,7 @@ LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/gallium/include \
$(MESA_TOP)/src/gallium/auxiliary
LOCAL_STATIC_LIBRARIES := libmesa_glsl libmesa_glsl_utils libmesa_util
LOCAL_STATIC_LIBRARIES := libmesa_glsl libmesa_glsl_utils libmesa_util libmesa_compiler
LOCAL_MODULE_TAGS := eng
LOCAL_MODULE := glsl_compiler

30
src/compiler/glsl/ast_array_index.cpp
View File

@ -236,14 +236,23 @@ _mesa_ast_array_index_to_hir(void *mem_ctx,
_mesa_glsl_error(&loc, state, "unsized array index must be constant");
}
} else if (array->type->without_array()->is_interface()
&& (array->variable_referenced()->data.mode == ir_var_uniform ||
array->variable_referenced()->data.mode == ir_var_shader_storage)
&& !state->is_version(400, 0) && !state->ARB_gpu_shader5_enable) {
/* Page 50 in section 4.3.9 of the OpenGL ES 3.10 spec says:
*
* "All indices used to index a uniform or shader storage block
* array must be constant integral expressions."
*/
&& ((array->variable_referenced()->data.mode == ir_var_uniform
&& !state->is_version(400, 320)
&& !state->ARB_gpu_shader5_enable
&& !state->EXT_gpu_shader5_enable
&& !state->OES_gpu_shader5_enable) ||
(array->variable_referenced()->data.mode == ir_var_shader_storage
&& !state->is_version(400, 0)
&& !state->ARB_gpu_shader5_enable))) {
/* Page 50 in section 4.3.9 of the OpenGL ES 3.10 spec says:
*
* "All indices used to index a uniform or shader storage block
* array must be constant integral expressions."
*
* But OES_gpu_shader5 (and ESSL 3.20) relax this to allow indexing
* on uniform blocks but not shader storage blocks.
*
*/
_mesa_glsl_error(&loc, state, "%s block array index must be constant",
array->variable_referenced()->data.mode
== ir_var_uniform ? "uniform" : "shader storage");
@ -279,7 +288,10 @@ _mesa_ast_array_index_to_hir(void *mem_ctx,
* dynamically uniform expression is undefined.
*/
if (array->type->without_array()->is_sampler()) {
if (!state->is_version(400, 0) && !state->ARB_gpu_shader5_enable) {
if (!state->is_version(400, 320) &&
!state->ARB_gpu_shader5_enable &&
!state->EXT_gpu_shader5_enable &&
!state->OES_gpu_shader5_enable) {
if (state->is_version(130, 300))
_mesa_glsl_error(&loc, state,
"sampler arrays indexed with non-constant "

7
src/compiler/glsl/ast_to_hir.cpp
View File

@ -231,15 +231,14 @@ _mesa_ast_to_hir(exec_list *instructions, struct _mesa_glsl_parse_state *state)
static ir_expression_operation
get_conversion_operation(const glsl_type *to, const glsl_type *from,
struct _mesa_glsl_parse_state *state)
get_implicit_conversion_operation(const glsl_type *to, const glsl_type *from,
struct _mesa_glsl_parse_state *state)
{
switch (to->base_type) {
case GLSL_TYPE_FLOAT:
switch (from->base_type) {
case GLSL_TYPE_INT: return ir_unop_i2f;
case GLSL_TYPE_UINT: return ir_unop_u2f;
case GLSL_TYPE_DOUBLE: return ir_unop_d2f;
default: return (ir_expression_operation)0;
}
@ -311,7 +310,7 @@ apply_implicit_conversion(const glsl_type *to, ir_rvalue * &from,
to = glsl_type::get_instance(to->base_type, from->type->vector_elements,
from->type->matrix_columns);
ir_expression_operation op = get_conversion_operation(to, from->type, state);
ir_expression_operation op = get_implicit_conversion_operation(to, from->type, state);
if (op) {
from = new(ctx) ir_expression(op, to, from, NULL);
return true;

105
src/compiler/glsl/builtin_functions.cpp
View File

@ -148,12 +148,6 @@ v400_fs_only(const _mesa_glsl_parse_state *state)
state->stage == MESA_SHADER_FRAGMENT;
}
static bool
es31(const _mesa_glsl_parse_state *state)
{
return state->is_version(0, 310);
}
static bool
texture_rectangle(const _mesa_glsl_parse_state *state)
{
@ -238,6 +232,21 @@ gpu_shader5(const _mesa_glsl_parse_state *state)
return state->is_version(400, 0) || state->ARB_gpu_shader5_enable;
}
static bool
gpu_shader5_es(const _mesa_glsl_parse_state *state)
{
return state->is_version(400, 320) ||
state->ARB_gpu_shader5_enable ||
state->EXT_gpu_shader5_enable ||
state->OES_gpu_shader5_enable;
}
static bool
es31_not_gs5(const _mesa_glsl_parse_state *state)
{
return state->is_version(0, 310) && !gpu_shader5_es(state);
}
static bool
gpu_shader5_or_es31(const _mesa_glsl_parse_state *state)
{
@ -360,8 +369,10 @@ texture_gather_or_es31(const _mesa_glsl_parse_state *state)
static bool
texture_gather_only_or_es31(const _mesa_glsl_parse_state *state)
{
return !state->is_version(400, 0) &&
return !state->is_version(400, 320) &&
!state->ARB_gpu_shader5_enable &&
!state->EXT_gpu_shader5_enable &&
!state->OES_gpu_shader5_enable &&
(state->ARB_texture_gather_enable ||
state->is_version(0, 310));
}
@ -1070,10 +1081,10 @@ builtin_builder::create_builtins()
#define FDGS5(NAME) \
add_function(#NAME, \
_##NAME(gpu_shader5, glsl_type::float_type), \
_##NAME(gpu_shader5, glsl_type::vec2_type), \
_##NAME(gpu_shader5, glsl_type::vec3_type), \
_##NAME(gpu_shader5, glsl_type::vec4_type), \
_##NAME(gpu_shader5_es, glsl_type::float_type), \
_##NAME(gpu_shader5_es, glsl_type::vec2_type), \
_##NAME(gpu_shader5_es, glsl_type::vec3_type), \
_##NAME(gpu_shader5_es, glsl_type::vec4_type), \
_##NAME(fp64, glsl_type::double_type), \
_##NAME(fp64, glsl_type::dvec2_type), \
_##NAME(fp64, glsl_type::dvec3_type), \
@ -2534,62 +2545,62 @@ builtin_builder::create_builtins()
_texture(ir_tg4, texture_gather_only_or_es31, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET),
_texture(ir_tg4, texture_gather_only_or_es31, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET),
_texture(ir_tg4, es31, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31_not_gs5, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31_not_gs5, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31_not_gs5, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31_not_gs5, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31_not_gs5, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, es31_not_gs5, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DRectShadow_type, glsl_type::vec2_type, TEX_OFFSET_NONCONST),
_texture(ir_tg4, es31, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type, TEX_OFFSET),
_texture(ir_tg4, es31, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type, TEX_OFFSET),
_texture(ir_tg4, es31_not_gs5, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type, TEX_OFFSET),
_texture(ir_tg4, es31_not_gs5, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type, TEX_OFFSET),
NULL);
add_function("textureGatherOffsets",
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2D_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::ivec4_type, glsl_type::isampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5_es, glsl_type::uvec4_type, glsl_type::usampler2DArray_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
@ -2599,8 +2610,8 @@ builtin_builder::create_builtins()
_texture(ir_tg4, gpu_shader5, glsl_type::ivec4_type, glsl_type::isampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::uvec4_type, glsl_type::usampler2DRect_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY | TEX_COMPONENT),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DShadow_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5_es, glsl_type::vec4_type, glsl_type::sampler2DArrayShadow_type, glsl_type::vec3_type, TEX_OFFSET_ARRAY),
_texture(ir_tg4, gpu_shader5, glsl_type::vec4_type, glsl_type::sampler2DRectShadow_type, glsl_type::vec2_type, TEX_OFFSET_ARRAY),
NULL);

4
src/compiler/glsl/glcpp/glcpp-parse.y
View File

@ -2398,6 +2398,10 @@ _glcpp_parser_handle_version_declaration(glcpp_parser_t *parser, intmax_t versio
add_builtin_define(parser, "GL_OES_geometry_point_size", 1);
add_builtin_define(parser, "GL_OES_geometry_shader", 1);
}
if (extensions->ARB_gpu_shader5) {
add_builtin_define(parser, "GL_EXT_gpu_shader5", 1);
add_builtin_define(parser, "GL_OES_gpu_shader5", 1);
}
}
}
} else {

2
src/compiler/glsl/glsl_lexer.ll
View File

@ -361,7 +361,7 @@ samplerExternalOES {
}
/* keywords available with ARB_gpu_shader5 */
precise KEYWORD_WITH_ALT(400, 0, 400, 0, yyextra->ARB_gpu_shader5_enable, PRECISE);
precise KEYWORD_WITH_ALT(400, 310, 400, 320, yyextra->ARB_gpu_shader5_enable || yyextra->EXT_gpu_shader5_enable || yyextra->OES_gpu_shader5_enable, PRECISE);
/* keywords available with ARB_shader_image_load_store */
image1D KEYWORD_WITH_ALT(130, 300, 420, 0, yyextra->ARB_shader_image_load_store_enable, IMAGE1D);

2
src/compiler/glsl/glsl_parser_extras.cpp
View File

@ -608,6 +608,7 @@ static const _mesa_glsl_extension _mesa_glsl_supported_extensions[] = {
EXT(OES_EGL_image_external, false, true, OES_EGL_image_external),
EXT(OES_geometry_point_size, false, true, OES_geometry_shader),
EXT(OES_geometry_shader, false, true, OES_geometry_shader),
EXT(OES_gpu_shader5, false, true, ARB_gpu_shader5),
EXT(OES_shader_image_atomic, false, true, ARB_shader_image_load_store),
EXT(OES_standard_derivatives, false, true, OES_standard_derivatives),
EXT(OES_texture_3D, false, true, dummy_true),
@ -622,6 +623,7 @@ static const _mesa_glsl_extension _mesa_glsl_supported_extensions[] = {
EXT(AMD_vertex_shader_viewport_index, true, false, AMD_vertex_shader_viewport_index),
EXT(EXT_blend_func_extended, false, true, ARB_blend_func_extended),
EXT(EXT_draw_buffers, false, true, dummy_true),
EXT(EXT_gpu_shader5, false, true, ARB_gpu_shader5),
EXT(EXT_separate_shader_objects, false, true, dummy_true),
EXT(EXT_shader_integer_mix, true, true, EXT_shader_integer_mix),
EXT(EXT_shader_samples_identical, true, true, EXT_shader_samples_identical),

4
src/compiler/glsl/glsl_parser_extras.h
View File

@ -593,6 +593,8 @@ struct _mesa_glsl_parse_state {
bool OES_geometry_point_size_warn;
bool OES_geometry_shader_enable;
bool OES_geometry_shader_warn;
bool OES_gpu_shader5_enable;
bool OES_gpu_shader5_warn;
bool OES_shader_image_atomic_enable;
bool OES_shader_image_atomic_warn;
bool OES_standard_derivatives_enable;
@ -618,6 +620,8 @@ struct _mesa_glsl_parse_state {
bool EXT_blend_func_extended_warn;
bool EXT_draw_buffers_enable;
bool EXT_draw_buffers_warn;
bool EXT_gpu_shader5_enable;
bool EXT_gpu_shader5_warn;
bool EXT_separate_shader_objects_enable;
bool EXT_separate_shader_objects_warn;
bool EXT_shader_integer_mix_enable;

1
src/compiler/glsl/ir.h
View File

@ -1686,6 +1686,7 @@ public:
operation == ir_binop_dot ||
operation == ir_binop_vector_extract ||
operation == ir_triop_vector_insert ||
operation == ir_binop_ubo_load ||
operation == ir_quadop_vector;
}

1
src/compiler/glsl/linker.cpp
View File

@ -3180,7 +3180,6 @@ check_explicit_uniform_locations(struct gl_context *ctx,
}
}
exec_list_make_empty(&prog->EmptyUniformLocations);
struct empty_uniform_block *current_block = NULL;
for (unsigned i = 0; i < prog->NumUniformRemapTable; i++) {

30
src/compiler/glsl/loop_unroll.cpp
View File

@ -315,11 +315,33 @@ loop_unroll_visitor::visit_leave(ir_loop *ir)
return visit_continue;
}
/* Don't try to unroll loops where the number of iterations is not known
* at compile-time.
*/
if (ls->limiting_terminator == NULL)
if (ls->limiting_terminator == NULL) {
ir_instruction *last_ir =
(ir_instruction *) ir->body_instructions.get_tail();
/* If a loop has no induction variable and the last instruction is
* a break, unroll the loop with a count of 1. This is the classic
*
* do {
* // ...
* } while (false)
*
* that is used to wrap multi-line macros.
*
* If num_loop_jumps is not zero, last_ir cannot be NULL... there has to
* be at least num_loop_jumps instructions in the loop.
*/
if (ls->num_loop_jumps == 1 && is_break(last_ir)) {
last_ir->remove();
simple_unroll(ir, 1);
}
/* Don't try to unroll loops where the number of iterations is not known
* at compile-time.
*/
return visit_continue;
}
iterations = ls->limiting_terminator->iterations;

6
src/egl/Android.mk
View File

@ -44,10 +44,10 @@ LOCAL_CFLAGS := \
-DHAVE_ANDROID_PLATFORM
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_CFLAGS_32 := -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\"
LOCAL_CFLAGS_64 := -DDEFAULT_DRIVER_DIR=\"/system/lib64/dri\"
LOCAL_CFLAGS_32 := -DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\"
LOCAL_CFLAGS_64 := -DDEFAULT_DRIVER_DIR=\"/system/lib64/$(MESA_DRI_MODULE_REL_PATH)\"
else
LOCAL_CFLAGS += -DDEFAULT_DRIVER_DIR=\"/system/lib/dri\"
LOCAL_CFLAGS += -DDEFAULT_DRIVER_DIR=\"/system/lib/$(MESA_DRI_MODULE_REL_PATH)\"
endif
LOCAL_C_INCLUDES := \

39
src/egl/drivers/dri2/platform_wayland.c
View File

@ -653,6 +653,37 @@ create_wl_buffer(struct dri2_egl_surface *dri2_surf)
&wl_buffer_listener, dri2_surf);
}
static EGLBoolean
try_damage_buffer(struct dri2_egl_surface *dri2_surf,
const EGLint *rects,
EGLint n_rects)
{
/* The WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION macro and
* wl_proxy_get_version() were both introduced in wayland 1.10.
* Instead of bumping our wayland dependency we just make this
* function conditional on the required 1.10 features, falling
* back to old (correct but suboptimal) behaviour for older
* wayland.
*/
#ifdef WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION
int i;
if (wl_proxy_get_version((struct wl_proxy *) dri2_surf->wl_win->surface)
< WL_SURFACE_DAMAGE_BUFFER_SINCE_VERSION)
return EGL_FALSE;
for (i = 0; i < n_rects; i++) {
const int *rect = &rects[i * 4];
wl_surface_damage_buffer(dri2_surf->wl_win->surface,
rect[0],
dri2_surf->base.Height - rect[1] - rect[3],
rect[2], rect[3]);
}
return EGL_TRUE;
#endif
return EGL_FALSE;
}
/**
* Called via eglSwapBuffers(), drv->API.SwapBuffers().
*/
@ -703,10 +734,12 @@ dri2_wl_swap_buffers_with_damage(_EGLDriver *drv,
dri2_surf->dx = 0;
dri2_surf->dy = 0;
/* We deliberately ignore the damage region and post maximum damage, due to
/* If the compositor doesn't support damage_buffer, we deliberately
* ignore the damage region and post maximum damage, due to
* https://bugs.freedesktop.org/78190 */
wl_surface_damage(dri2_surf->wl_win->surface,
0, 0, INT32_MAX, INT32_MAX);
if (!n_rects || !try_damage_buffer(dri2_surf, rects, n_rects))
wl_surface_damage(dri2_surf->wl_win->surface,
0, 0, INT32_MAX, INT32_MAX);
if (dri2_dpy->is_different_gpu) {
_EGLContext *ctx = _eglGetCurrentContext();

6
src/gallium/auxiliary/Android.mk
View File

@ -44,9 +44,9 @@ LOCAL_SRC_FILES += \
LOCAL_CPPFLAGS := -std=c++11
endif
# We need libmesa_glsl to get NIR's generated include directories.
# We need libmesa_nir to get NIR's generated include directories.
LOCAL_MODULE := libmesa_gallium
LOCAL_STATIC_LIBRARIES += libmesa_glsl
LOCAL_STATIC_LIBRARIES += libmesa_nir
# generate sources
LOCAL_MODULE_CLASS := STATIC_LIBRARIES
@ -64,5 +64,7 @@ $(intermediates)/util/u_format_srgb.c: $(intermediates)/%.c: $(LOCAL_PATH)/%.py
$(intermediates)/util/u_format_table.c: $(intermediates)/%.c: $(LOCAL_PATH)/%.py $(LOCAL_PATH)/util/u_format.csv
$(transform-generated-source)
LOCAL_GENERATED_SOURCES += $(MESA_GEN_NIR_H)
include $(GALLIUM_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

19
src/gallium/auxiliary/tgsi/tgsi_scan.c
View File

@ -43,6 +43,15 @@
#include "tgsi/tgsi_scan.h"
static bool
is_memory_file(unsigned file)
{
return file == TGSI_FILE_SAMPLER ||
file == TGSI_FILE_SAMPLER_VIEW ||
file == TGSI_FILE_IMAGE ||
file == TGSI_FILE_BUFFER;
}
static void
scan_instruction(struct tgsi_shader_info *info,
@ -50,6 +59,7 @@ scan_instruction(struct tgsi_shader_info *info,
unsigned *current_depth)
{
unsigned i;
bool is_mem_inst = false;
assert(fullinst->Instruction.Opcode < TGSI_OPCODE_LAST);
info->opcode_count[fullinst->Instruction.Opcode]++;
@ -181,6 +191,9 @@ scan_instruction(struct tgsi_shader_info *info,
info->is_msaa_sampler[src->Register.Index] = TRUE;
}
}
if (is_memory_file(src->Register.File))
is_mem_inst = true;
}
/* check for indirect register writes */
@ -190,8 +203,14 @@ scan_instruction(struct tgsi_shader_info *info,
info->indirect_files |= (1 << dst->Register.File);
info->indirect_files_written |= (1 << dst->Register.File);
}
if (is_memory_file(dst->Register.File))
is_mem_inst = true;
}
if (is_mem_inst)
info->num_memory_instructions++;
info->num_instructions++;
}

1
src/gallium/auxiliary/tgsi/tgsi_scan.h
View File

@ -74,6 +74,7 @@ struct tgsi_shader_info
uint immediate_count; /**< number of immediates declared */
uint num_instructions;
uint num_memory_instructions; /**< sampler, buffer, and image instructions */
uint opcode_count[TGSI_OPCODE_LAST]; /**< opcode histogram */

8
src/gallium/drivers/freedreno/Android.mk
View File

@ -32,14 +32,16 @@ LOCAL_SRC_FILES := \
$(a4xx_SOURCES) \
$(ir3_SOURCES)
LOCAL_CFLAGS := \
-Wno-packed-bitfield-compat
#LOCAL_CFLAGS := \
# -Wno-packed-bitfield-compat
LOCAL_C_INCLUDES := \
$(LOCAL_PATH)/ir3
LOCAL_GENERATED_SOURCES := $(MESA_GEN_NIR_H)
LOCAL_SHARED_LIBRARIES := libdrm libdrm_freedreno
LOCAL_STATIC_LIBRARIES := libmesa_glsl
LOCAL_STATIC_LIBRARIES := libmesa_glsl libmesa_nir
LOCAL_MODULE := libmesa_pipe_freedreno
include $(GALLIUM_COMMON_MK)

1
src/gallium/drivers/nouveau/Makefile.sources
View File

@ -150,7 +150,6 @@ NVC0_C_SOURCES := \
nvc0/gm107_texture.xml.h \
nvc0/nvc0_3d.xml.h \
nvc0/nvc0_compute.c \
nvc0/nvc0_compute.h \
nvc0/nvc0_compute.xml.h \
nvc0/nvc0_context.c \
nvc0/nvc0_context.h \

4
src/gallium/drivers/nouveau/codegen/nv50_ir.h
View File

@ -161,6 +161,7 @@ enum operation
OP_VSEL,
OP_CCTL, // cache control
OP_SHFL, // warp shuffle
OP_VOTE,
OP_LAST
};
@ -244,6 +245,9 @@ enum operation
#define NV50_IR_SUBOP_V2(d,a,b) (((d) << 10) | ((b) << 5) | (a) | 0x4000)
#define NV50_IR_SUBOP_V4(d,a,b) (((d) << 10) | ((b) << 5) | (a) | 0x8000)
#define NV50_IR_SUBOP_Vn(n) ((n) >> 14)
#define NV50_IR_SUBOP_VOTE_ALL 0
#define NV50_IR_SUBOP_VOTE_ANY 1
#define NV50_IR_SUBOP_VOTE_UNI 2
enum DataType
{

53
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gk110.cpp
View File

@ -128,6 +128,8 @@ private:
void emitFlow(const Instruction *);
void emitVOTE(const Instruction *);
inline void defId(const ValueDef&, const int pos);
inline void srcId(const ValueRef&, const int pos);
inline void srcId(const ValueRef *, const int pos);
@ -1370,6 +1372,24 @@ CodeEmitterGK110::emitFlow(const Instruction *i)
}
}
void
CodeEmitterGK110::emitVOTE(const Instruction *i)
{
assert(i->src(0).getFile() == FILE_PREDICATE &&
i->def(1).getFile() == FILE_PREDICATE);
code[0] = 0x00000002;
code[1] = 0x86c00000 | (i->subOp << 19);
emitPredicate(i);
defId(i->def(0), 2);
defId(i->def(1), 48);
if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
code[0] |= 1 << 45;
srcId(i->src(0), 42);
}
void
CodeEmitterGK110::emitAFETCH(const Instruction *i)
{
@ -1597,7 +1617,13 @@ CodeEmitterGK110::emitSTORE(const Instruction *i)
switch (i->src(0).getFile()) {
case FILE_MEMORY_GLOBAL: code[1] = 0xe0000000; code[0] = 0x00000000; break;
case FILE_MEMORY_LOCAL: code[1] = 0x7a800000; code[0] = 0x00000002; break;
case FILE_MEMORY_SHARED: code[1] = 0x7ac00000; code[0] = 0x00000002; break;
case FILE_MEMORY_SHARED:
code[0] = 0x00000002;
if (i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED)
code[1] = 0x78400000;
else
code[1] = 0x7ac00000;
break;
default:
assert(!"invalid memory file");
break;
@ -1617,6 +1643,13 @@ CodeEmitterGK110::emitSTORE(const Instruction *i)
code[0] |= offset << 23;
code[1] |= offset >> 9;
// Unlocked store on shared memory can fail.
if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
i->subOp == NV50_IR_SUBOP_STORE_UNLOCKED) {
assert(i->defExists(0));
defId(i->def(0), 32 + 16);
}
emitPredicate(i);
srcId(i->src(1), 2);
@ -1635,7 +1668,13 @@ CodeEmitterGK110::emitLOAD(const Instruction *i)
switch (i->src(0).getFile()) {
case FILE_MEMORY_GLOBAL: code[1] = 0xc0000000; code[0] = 0x00000000; break;
case FILE_MEMORY_LOCAL: code[1] = 0x7a000000; code[0] = 0x00000002; break;
case FILE_MEMORY_SHARED: code[1] = 0x7a400000; code[0] = 0x00000002; break;
case FILE_MEMORY_SHARED:
code[0] = 0x00000002;
if (i->subOp == NV50_IR_SUBOP_LOAD_LOCKED)
code[1] = 0x77400000;
else
code[1] = 0x7a400000;
break;
case FILE_MEMORY_CONST:
if (!i->src(0).isIndirect(0) && typeSizeof(i->dType) == 4) {
emitMOV(i);
@ -1663,6 +1702,13 @@ CodeEmitterGK110::emitLOAD(const Instruction *i)
code[0] |= offset << 23;
code[1] |= offset >> 9;
// Locked store on shared memory can fail.
if (i->src(0).getFile() == FILE_MEMORY_SHARED &&
i->subOp == NV50_IR_SUBOP_LOAD_LOCKED) {
assert(i->defExists(1));
defId(i->def(1), 32 + 16);
}
emitPredicate(i);
defId(i->def(0), 2);
@ -2054,6 +2100,9 @@ CodeEmitterGK110::emitInstruction(Instruction *insn)
case OP_CCTL:
emitCCTL(insn);
break;
case OP_VOTE:
emitVOTE(insn);
break;
case OP_PHI:
case OP_UNION:
case OP_CONSTRAINT:

29
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_gm107.cpp
View File

@ -195,6 +195,8 @@ private:
void emitOUT();
void emitMEMBAR();
void emitVOTE();
};
/*******************************************************************************
@ -2653,6 +2655,30 @@ CodeEmitterGM107::emitMEMBAR()
emitField(0x08, 2, insn->subOp >> 2);
}
void
CodeEmitterGM107::emitVOTE()
{
int subOp;
assert(insn->src(0).getFile() == FILE_PREDICATE &&
insn->def(1).getFile() == FILE_PREDICATE);
switch (insn->subOp) {
case NV50_IR_SUBOP_VOTE_ANY: subOp = 1; break;
default:
assert(insn->subOp == NV50_IR_SUBOP_VOTE_ALL);
subOp = 0;
break;
}
emitInsn (0x50d80000);
emitField(0x30, 2, subOp);
emitGPR (0x00, insn->def(0));
emitPRED (0x2d, insn->def(1));
emitField(0x2a, 1, insn->src(0).mod == Modifier(NV50_IR_MOD_NOT));
emitPRED (0x27, insn->src(0));
}
/*******************************************************************************
* assembler front-end
******************************************************************************/
@ -2955,6 +2981,9 @@ CodeEmitterGM107::emitInstruction(Instruction *i)
case OP_MEMBAR:
emitMEMBAR();
break;
case OP_VOTE:
emitVOTE();
break;
default:
assert(!"invalid opcode");
emitNOP();

23
src/gallium/drivers/nouveau/codegen/nv50_ir_emit_nvc0.cpp
View File

@ -142,6 +142,8 @@ private:
void emitPIXLD(const Instruction *);
void emitVOTE(const Instruction *);
inline void defId(const ValueDef&, const int pos);
inline void defId(const Instruction *, int d, const int pos);
inline void srcId(const ValueRef&, const int pos);
@ -2334,6 +2336,24 @@ CodeEmitterNVC0::emitPIXLD(const Instruction *i)
code[1] |= 0x00e00000;
}
void
CodeEmitterNVC0::emitVOTE(const Instruction *i)
{
assert(i->src(0).getFile() == FILE_PREDICATE &&
i->def(1).getFile() == FILE_PREDICATE);
code[0] = 0x00000004 | (i->subOp << 5);
code[1] = 0x48000000;
emitPredicate(i);
defId(i->def(0), 14);
defId(i->def(1), 32 + 22);
if (i->src(0).mod == Modifier(NV50_IR_MOD_NOT))
code[0] |= 1 << 23;
srcId(i->src(0), 20);
}
bool
CodeEmitterNVC0::emitInstruction(Instruction *insn)
{
@ -2604,6 +2624,9 @@ CodeEmitterNVC0::emitInstruction(Instruction *insn)
case OP_PIXLD:
emitPIXLD(insn);
break;
case OP_VOTE:
emitVOTE(insn);
break;
case OP_PHI:
case OP_UNION:
case OP_CONSTRAINT:

1
src/gallium/drivers/nouveau/codegen/nv50_ir_print.cpp
View File

@ -190,6 +190,7 @@ const char *operationStr[OP_LAST + 1] =
"vsel",
"cctl",
"shfl",
"vote",
"(invalid)"
};

3
src/gallium/drivers/nouveau/codegen/nv50_ir_target.cpp
View File

@ -55,6 +55,7 @@ const uint8_t Target::operationSrcNr[] =
2, 2, 2, 2, 3, 2, // VADD, VAVG, VMIN, VMAX, VSAD, VSET,
2, 2, 2, 1, // VSHR, VSHL, VSEL, CCTL
3, // SHFL
1, // VOTE
0
};
@ -129,6 +130,8 @@ const OpClass Target::operationClass[] =
OPCLASS_VECTOR, OPCLASS_CONTROL,
// SHFL
OPCLASS_OTHER,
// VOTE
OPCLASS_OTHER,
OPCLASS_PSEUDO // LAST
};

2
src/gallium/drivers/nouveau/nv50/nv50_screen.c
View File

@ -121,7 +121,7 @@ nv50_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
return 256;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
return 1; /* 256 for binding as RT, but that's not possible in GL */
return 16; /* 256 for binding as RT, but that's not possible in GL */
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:
return NOUVEAU_MIN_BUFFER_MAP_ALIGN;
case PIPE_CAP_MAX_VIEWPORTS:

53
src/gallium/drivers/nouveau/nvc0/nvc0_compute.c
View File

@ -23,7 +23,8 @@
*/
#include "nvc0/nvc0_context.h"
#include "nvc0/nvc0_compute.h"
#include "nvc0/nvc0_compute.xml.h"
int
nvc0_screen_compute_setup(struct nvc0_screen *screen,
@ -120,34 +121,6 @@ nvc0_screen_compute_setup(struct nvc0_screen *screen,
return 0;
}
bool
nvc0_compute_validate_program(struct nvc0_context *nvc0)
{
struct nvc0_program *prog = nvc0->compprog;
if (prog->mem)
return true;
if (!prog->translated) {
prog->translated = nvc0_program_translate(
prog, nvc0->screen->base.device->chipset, &nvc0->base.debug);
if (!prog->translated)
return false;
}
if (unlikely(!prog->code_size))
return false;
if (likely(prog->code_size)) {
if (nvc0_program_upload_code(nvc0, prog)) {
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
BEGIN_NVC0(push, NVC0_CP(FLUSH), 1);
PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CODE);
return true;
}
}
return false;
}
static void
nvc0_compute_validate_samplers(struct nvc0_context *nvc0)
{
@ -274,11 +247,25 @@ nvc0_compute_validate_buffers(struct nvc0_context *nvc0)
}
}
void
nvc0_compute_validate_globals(struct nvc0_context *nvc0)
{
unsigned i;
for (i = 0; i < nvc0->global_residents.size / sizeof(struct pipe_resource *);
++i) {
struct pipe_resource *res = *util_dynarray_element(
&nvc0->global_residents, struct pipe_resource *, i);
if (res)
nvc0_add_resident(nvc0->bufctx_cp, NVC0_BIND_CP_GLOBAL,
nv04_resource(res), NOUVEAU_BO_RDWR);
}
}
static bool
nvc0_compute_state_validate(struct nvc0_context *nvc0)
{
if (!nvc0_compute_validate_program(nvc0))
return false;
nvc0_compprog_validate(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_CONSTBUF)
nvc0_compute_validate_constbufs(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_DRIVERCONST)
@ -289,8 +276,10 @@ nvc0_compute_state_validate(struct nvc0_context *nvc0)
nvc0_compute_validate_textures(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_SAMPLERS)
nvc0_compute_validate_samplers(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_GLOBALS)
nvc0_compute_validate_globals(nvc0);
/* TODO: surfaces, global memory buffers */
/* TODO: surfaces */
nvc0_bufctx_fence(nvc0, nvc0->bufctx_cp, false);

9
src/gallium/drivers/nouveau/nvc0/nvc0_compute.h
View File

@ -1,9 +0,0 @@
#ifndef NVC0_COMPUTE_H
#define NVC0_COMPUTE_H
#include "nvc0/nvc0_compute.xml.h"
bool
nvc0_compute_validate_program(struct nvc0_context *nvc0);
#endif /* NVC0_COMPUTE_H */

4
src/gallium/drivers/nouveau/nvc0/nvc0_context.h
View File

@ -254,6 +254,7 @@ void nvc0_tctlprog_validate(struct nvc0_context *);
void nvc0_tevlprog_validate(struct nvc0_context *);
void nvc0_gmtyprog_validate(struct nvc0_context *);
void nvc0_fragprog_validate(struct nvc0_context *);
void nvc0_compprog_validate(struct nvc0_context *);
void nvc0_tfb_validate(struct nvc0_context *);
@ -261,8 +262,6 @@ void nvc0_tfb_validate(struct nvc0_context *);
extern void nvc0_init_state_functions(struct nvc0_context *);
/* nvc0_state_validate.c */
void nvc0_validate_global_residents(struct nvc0_context *,
struct nouveau_bufctx *, int bin);
bool nvc0_state_validate(struct nvc0_context *, uint32_t state_mask);
/* nvc0_surface.c */
@ -342,5 +341,6 @@ void nve4_launch_grid(struct pipe_context *, const struct pipe_grid_info *);
/* nvc0_compute.c */
void nvc0_launch_grid(struct pipe_context *, const struct pipe_grid_info *);
void nvc0_compute_validate_globals(struct nvc0_context *);
#endif

2
src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
View File

@ -112,7 +112,7 @@ nvc0_screen_get_param(struct pipe_screen *pscreen, enum pipe_cap param)
case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
return 256;
case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
return 1; /* 256 for binding as RT, but that's not possible in GL */
return 16; /* 256 for binding as RT, but that's not possible in GL */
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return 16;
case PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT:

15
src/gallium/drivers/nouveau/nvc0/nvc0_shader_state.c
View File

@ -28,6 +28,8 @@
#include "nvc0/nvc0_context.h"
#include "nvc0/nvc0_query_hw.h"
#include "nvc0/nvc0_compute.xml.h"
static inline void
nvc0_program_update_context_state(struct nvc0_context *nvc0,
struct nvc0_program *prog, int stage)
@ -256,6 +258,19 @@ nvc0_gmtyprog_validate(struct nvc0_context *nvc0)
nvc0_program_update_context_state(nvc0, gp, 3);
}
void
nvc0_compprog_validate(struct nvc0_context *nvc0)
{
struct nouveau_pushbuf *push = nvc0->base.pushbuf;
struct nvc0_program *cp = nvc0->compprog;
if (cp && !nvc0_program_validate(nvc0, cp))
return;
BEGIN_NVC0(push, NVC0_CP(FLUSH), 1);
PUSH_DATA (push, NVC0_COMPUTE_FLUSH_CODE);
}
void
nvc0_tfb_validate(struct nvc0_context *nvc0)
{

15
src/gallium/drivers/nouveau/nvc0/nvc0_state_validate.c
View File

@ -559,21 +559,6 @@ nvc0_validate_driverconst(struct nvc0_context *nvc0)
nvc0->dirty_cp |= NVC0_NEW_CP_DRIVERCONST;
}
void
nvc0_validate_global_residents(struct nvc0_context *nvc0,
struct nouveau_bufctx *bctx, int bin)
{
unsigned i;
for (i = 0; i < nvc0->global_residents.size / sizeof(struct pipe_resource *);
++i) {
struct pipe_resource *res = *util_dynarray_element(
&nvc0->global_residents, struct pipe_resource *, i);
if (res)
nvc0_add_resident(bctx, bin, nv04_resource(res), NOUVEAU_BO_RDWR);
}
}
static void
nvc0_validate_derived_1(struct nvc0_context *nvc0)
{

7
src/gallium/drivers/nouveau/nvc0/nve4_compute.c
View File

@ -23,7 +23,6 @@
*/
#include "nvc0/nvc0_context.h"
#include "nvc0/nvc0_compute.h"
#include "nvc0/nve4_compute.h"
#include "codegen/nv50_ir_driver.h"
@ -306,8 +305,7 @@ nve4_compute_set_tex_handles(struct nvc0_context *nvc0)
static bool
nve4_compute_state_validate(struct nvc0_context *nvc0)
{
if (!nvc0_compute_validate_program(nvc0))
return false;
nvc0_compprog_validate(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_TEXTURES)
nve4_compute_validate_textures(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_SAMPLERS)
@ -317,8 +315,7 @@ nve4_compute_state_validate(struct nvc0_context *nvc0)
if (nvc0->dirty_cp & NVC0_NEW_CP_SURFACES)
nve4_compute_validate_surfaces(nvc0);
if (nvc0->dirty_cp & NVC0_NEW_CP_GLOBALS)
nvc0_validate_global_residents(nvc0,
nvc0->bufctx_cp, NVC0_BIND_CP_GLOBAL);
nvc0_compute_validate_globals(nvc0);
nvc0_bufctx_fence(nvc0, nvc0->bufctx_cp, false);

1
src/gallium/drivers/r300/Android.mk
View File

@ -32,7 +32,6 @@ LOCAL_SRC_FILES := $(C_SOURCES)
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/mesa

9
src/gallium/drivers/r300/r300_context.c
View File

@ -156,7 +156,6 @@ static boolean r300_setup_atoms(struct r300_context* r300)
boolean is_rv350 = r300->screen->caps.is_rv350;
boolean is_r500 = r300->screen->caps.is_r500;
boolean has_tcl = r300->screen->caps.has_tcl;
boolean drm_2_6_0 = r300->screen->info.drm_minor >= 6;
/* Create the actual atom list.
*
@ -175,11 +174,11 @@ static boolean r300_setup_atoms(struct r300_context* r300)
R300_INIT_ATOM(gpu_flush, 9);
R300_INIT_ATOM(aa_state, 4);
R300_INIT_ATOM(fb_state, 0);
R300_INIT_ATOM(hyperz_state, is_r500 || (is_rv350 && drm_2_6_0) ? 10 : 8);
R300_INIT_ATOM(hyperz_state, is_r500 || is_rv350 ? 10 : 8);
/* ZB (unpipelined), SC. */
R300_INIT_ATOM(ztop_state, 2);
/* ZB, FG. */
R300_INIT_ATOM(dsa_state, is_r500 ? (drm_2_6_0 ? 10 : 8) : 6);
R300_INIT_ATOM(dsa_state, is_r500 ? 10 : 6);
/* RB3D. */
R300_INIT_ATOM(blend_state, 8);
R300_INIT_ATOM(blend_color_state, is_r500 ? 3 : 2);
@ -353,9 +352,7 @@ static void r300_init_states(struct pipe_context *pipe)
OUT_CB_REG(R300_ZB_DEPTHCLEARVALUE, 0);
OUT_CB_REG(R300_SC_HYPERZ, R300_SC_HYPERZ_ADJ_2);
if (r300->screen->caps.is_r500 ||
(r300->screen->caps.is_rv350 &&
r300->screen->info.drm_minor >= 6)) {
if (r300->screen->caps.is_r500 || r300->screen->caps.is_rv350) {
OUT_CB_REG(R300_GB_Z_PEQ_CONFIG, 0);
}
END_CB;

3
src/gallium/drivers/r300/r300_emit.c
View File

@ -1434,8 +1434,7 @@ unsigned r300_get_num_cs_end_dwords(struct r300_context *r300)
dwords += r300->hyperz_state.size + 2; /* emit_hyperz_end + zcache flush */
if (r300->screen->caps.is_r500)
dwords += 2; /* emit_index_bias */
if (r300->screen->info.drm_minor >= 6)
dwords += 3; /* MSPOS */
dwords += 3; /* MSPOS */
return dwords;
}

6
src/gallium/drivers/r300/r300_flush.c
View File

@ -45,7 +45,7 @@ static void r300_flush_and_cleanup(struct r300_context *r300, unsigned flags,
r500_emit_index_bias(r300, 0);
/* The DDX doesn't set these regs. */
if (r300->screen->info.drm_minor >= 6) {
{
CS_LOCALS(r300);
OUT_CS_REG_SEQ(R300_GB_MSPOS0, 2);
OUT_CS(0x66666666);
@ -78,9 +78,7 @@ void r300_flush(struct pipe_context *pipe,
{
struct r300_context *r300 = r300_context(pipe);
if (r300->screen->info.drm_minor >= 12) {
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
}
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
if (r300->dirty_hw) {
r300_flush_and_cleanup(r300, flags, fence);

19
src/gallium/drivers/r300/r300_screen.c
View File

@ -529,7 +529,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen,
unsigned usage)
{
uint32_t retval = 0;
boolean drm_2_8_0 = r300_screen(screen)->info.drm_minor >= 8;
boolean is_r500 = r300_screen(screen)->caps.is_r500;
boolean is_r400 = r300_screen(screen)->caps.is_r400;
boolean is_color2101010 = format == PIPE_FORMAT_R10G10B10A2_UNORM ||
@ -545,13 +544,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen,
format == PIPE_FORMAT_RGTC2_SNORM ||
format == PIPE_FORMAT_LATC2_UNORM ||
format == PIPE_FORMAT_LATC2_SNORM;
boolean is_x16f_xy16f = format == PIPE_FORMAT_R16_FLOAT ||
format == PIPE_FORMAT_R16G16_FLOAT ||
format == PIPE_FORMAT_A16_FLOAT ||
format == PIPE_FORMAT_L16_FLOAT ||
format == PIPE_FORMAT_L16A16_FLOAT ||
format == PIPE_FORMAT_R16A16_FLOAT ||
format == PIPE_FORMAT_I16_FLOAT;
boolean is_half_float = format == PIPE_FORMAT_R16_FLOAT ||
format == PIPE_FORMAT_R16G16_FLOAT ||
format == PIPE_FORMAT_R16G16B16_FLOAT ||
@ -570,10 +562,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen,
case 2:
case 4:
case 6:
/* We need DRM 2.8.0. */
if (!drm_2_8_0) {
return FALSE;
}
/* No texturing and scanout. */
if (usage & (PIPE_BIND_SAMPLER_VIEW |
PIPE_BIND_DISPLAY_TARGET |
@ -613,8 +601,6 @@ static boolean r300_is_format_supported(struct pipe_screen* screen,
(is_r500 || !is_ati1n) &&
/* ATI2N is supported on r4xx-r5xx. */
(is_r400 || is_r500 || !is_ati2n) &&
/* R16F and RG16F texture support was added in as late as DRM 2.8.0 */
(drm_2_8_0 || !is_x16f_xy16f) &&
r300_is_sampler_format_supported(format)) {
retval |= PIPE_BIND_SAMPLER_VIEW;
}
@ -626,7 +612,7 @@ static boolean r300_is_format_supported(struct pipe_screen* screen,
PIPE_BIND_SHARED |
PIPE_BIND_BLENDABLE)) &&
/* 2101010 cannot be rendered to on non-r5xx. */
(!is_color2101010 || (is_r500 && drm_2_8_0)) &&
(!is_color2101010 || is_r500) &&
r300_is_colorbuffer_format_supported(format)) {
retval |= usage &
(PIPE_BIND_RENDER_TARGET |
@ -723,9 +709,6 @@ struct pipe_screen* r300_screen_create(struct radeon_winsys *rws)
if (SCREEN_DBG_ON(r300screen, DBG_NO_HIZ))
r300screen->caps.hiz_ram = 0;
if (r300screen->info.drm_minor < 8)
r300screen->caps.has_us_format = FALSE;
r300screen->rws = rws;
r300screen->screen.destroy = r300_destroy_screen;
r300screen->screen.get_name = r300_get_name;

46
src/gallium/drivers/r300/r300_state.c
View File

@ -834,45 +834,6 @@ static void r300_set_stencil_ref(struct pipe_context* pipe,
r300_mark_atom_dirty(r300, &r300->dsa_state);
}
static void r300_tex_set_tiling_flags(struct r300_context *r300,
struct r300_resource *tex,
unsigned level)
{
/* Check if the macrotile flag needs to be changed.
* Skip changing the flags otherwise. */
if (tex->tex.macrotile[tex->surface_level] !=
tex->tex.macrotile[level]) {
r300->rws->buffer_set_tiling(tex->buf, r300->cs,
tex->tex.microtile, tex->tex.macrotile[level],
0, 0, 0, 0, 0, 0, 0,
tex->tex.stride_in_bytes[0], false);
tex->surface_level = level;
}
}
/* This switcheroo is needed just because of goddamned MACRO_SWITCH. */
static void r300_fb_set_tiling_flags(struct r300_context *r300,
const struct pipe_framebuffer_state *state)
{
unsigned i;
/* Set tiling flags for new surfaces. */
for (i = 0; i < state->nr_cbufs; i++) {
if (!state->cbufs[i])
continue;
r300_tex_set_tiling_flags(r300,
r300_resource(state->cbufs[i]->texture),
state->cbufs[i]->u.tex.level);
}
if (state->zsbuf) {
r300_tex_set_tiling_flags(r300,
r300_resource(state->zsbuf->texture),
state->zsbuf->u.tex.level);
}
}
static void r300_print_fb_surf_info(struct pipe_surface *surf, unsigned index,
const char *binding)
{
@ -1017,13 +978,6 @@ r300_set_framebuffer_state(struct pipe_context* pipe,
/* Re-swizzle the blend color. */
r300_set_blend_color(pipe, &((struct r300_blend_color_state*)r300->blend_color_state.state)->state);
if (r300->screen->info.drm_minor < 12) {
/* The tiling flags are dependent on the surface miplevel, unfortunately.
* This workarounds a bad design decision in old kernels which were
* rewriting tile fields in registers. */
r300_fb_set_tiling_flags(r300, state);
}
if (unlock_zbuffer) {
pipe_surface_reference(&r300->locked_zbuffer, NULL);
}

21
src/gallium/drivers/r600/evergreen_compute.c
View File

@ -447,24 +447,15 @@ static void compute_emit_cs(struct r600_context *ctx, const uint *block_layout,
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */
radeon_emit(cs, reloc);
if (!ctx->keep_tiling_flags) {
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C70_CB_COLOR0_INFO */
radeon_emit(cs, reloc);
}
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */
radeon_emit(cs, reloc);
}
if (ctx->keep_tiling_flags) {
for (; i < 8 ; i++) {
radeon_compute_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
S_028C70_FORMAT(V_028C70_COLOR_INVALID));
}
for (; i < 12; i++) {
radeon_compute_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
S_028C70_FORMAT(V_028C70_COLOR_INVALID));
}
}
for (; i < 8 ; i++)
radeon_compute_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C,
S_028C70_FORMAT(V_028C70_COLOR_INVALID));
for (; i < 12; i++)
radeon_compute_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C,
S_028C70_FORMAT(V_028C70_COLOR_INVALID));
/* Set CB_TARGET_MASK XXX: Use cb_misc_state */
radeon_compute_set_context_reg(cs, R_028238_CB_TARGET_MASK,

44
src/gallium/drivers/r600/evergreen_state.c
View File

@ -1466,15 +1466,13 @@ static void evergreen_set_framebuffer_state(struct pipe_context *ctx,
/* Colorbuffers. */
rctx->framebuffer.atom.num_dw += state->nr_cbufs * 23;
if (rctx->keep_tiling_flags)
rctx->framebuffer.atom.num_dw += state->nr_cbufs * 2;
rctx->framebuffer.atom.num_dw += state->nr_cbufs * 2;
rctx->framebuffer.atom.num_dw += (12 - state->nr_cbufs) * 3;
/* ZS buffer. */
if (state->zsbuf) {
rctx->framebuffer.atom.num_dw += 24;
if (rctx->keep_tiling_flags)
rctx->framebuffer.atom.num_dw += 2;
rctx->framebuffer.atom.num_dw += 2;
} else if (rctx->screen->b.info.drm_minor >= 18) {
rctx->framebuffer.atom.num_dw += 4;
}
@ -1656,11 +1654,6 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C60_CB_COLOR0_BASE */
radeon_emit(cs, reloc);
if (!rctx->keep_tiling_flags) {
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C70_CB_COLOR0_INFO */
radeon_emit(cs, reloc);
}
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C74_CB_COLOR0_ATTRIB */
radeon_emit(cs, reloc);
@ -1674,27 +1667,12 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
if (i == 1 && state->cbufs[0]) {
radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + 1 * 0x3C,
cb->cb_color_info | tex->cb_color_info);
if (!rctx->keep_tiling_flags) {
unsigned reloc = radeon_add_to_buffer_list(&rctx->b,
&rctx->b.gfx,
(struct r600_resource*)state->cbufs[0]->texture,
RADEON_USAGE_READWRITE,
RADEON_PRIO_COLOR_BUFFER);
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028C70_CB_COLOR0_INFO */
radeon_emit(cs, reloc);
}
i++;
}
if (rctx->keep_tiling_flags) {
for (; i < 8 ; i++) {
radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, 0);
}
for (; i < 12; i++) {
radeon_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C, 0);
}
}
for (; i < 8 ; i++)
radeon_set_context_reg(cs, R_028C70_CB_COLOR0_INFO + i * 0x3C, 0);
for (; i < 12; i++)
radeon_set_context_reg(cs, R_028E50_CB_COLOR8_INFO + (i - 8) * 0x1C, 0);
/* ZS buffer. */
if (state->zsbuf) {
@ -1721,11 +1699,6 @@ static void evergreen_emit_framebuffer_state(struct r600_context *rctx, struct r
radeon_emit(cs, zb->db_depth_size); /* R_028058_DB_DEPTH_SIZE */
radeon_emit(cs, zb->db_depth_slice); /* R_02805C_DB_DEPTH_SLICE */
if (!rctx->keep_tiling_flags) {
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028040_DB_Z_INFO */
radeon_emit(cs, reloc);
}
radeon_emit(cs, PKT3(PKT3_NOP, 0, 0)); /* R_028048_DB_Z_READ_BASE */
radeon_emit(cs, reloc);
@ -3680,8 +3653,7 @@ void evergreen_init_state_functions(struct r600_context *rctx)
*/
if (rctx->b.chip_class == EVERGREEN) {
r600_init_atom(rctx, &rctx->config_state.atom, id++, evergreen_emit_config_state, 11);
if (rctx->screen->b.info.drm_minor >= 7)
rctx->config_state.dyn_gpr_enabled = true;
rctx->config_state.dyn_gpr_enabled = true;
}
r600_init_atom(rctx, &rctx->framebuffer.atom, id++, evergreen_emit_framebuffer_state, 0);
/* shader const */
@ -3933,7 +3905,7 @@ bool evergreen_adjust_gprs(struct r600_context *rctx)
max_gprs += def_num_clause_temp_gprs * 2;
/* if we have no TESS and dyn gpr is enabled then do nothing. */
if (!rctx->hw_shader_stages[EG_HW_STAGE_HS].shader || rctx->screen->b.info.drm_minor < 7) {
if (!rctx->hw_shader_stages[EG_HW_STAGE_HS].shader) {
if (rctx->config_state.dyn_gpr_enabled)
return true;

4
src/gallium/drivers/r600/r600_hw_context.c
View File

@ -270,9 +270,7 @@ void r600_context_gfx_flush(void *context, unsigned flags,
}
/* force to keep tiling flags */
if (ctx->keep_tiling_flags) {
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
}
flags |= RADEON_FLUSH_KEEP_TILING_FLAGS;
/* Flush the CS. */
ctx->b.ws->cs_flush(cs, flags, fence, ctx->screen->b.cs_count++);

16
src/gallium/drivers/r600/r600_isa.h
View File

@ -102,13 +102,13 @@ enum alu_op_flags
/* condition codes - 3 bits */
AF_CC_SHIFT = 29,
AF_CC_MASK = (7 << AF_CC_SHIFT),
AF_CC_E = (0 << AF_CC_SHIFT),
AF_CC_GT = (1 << AF_CC_SHIFT),
AF_CC_GE = (2 << AF_CC_SHIFT),
AF_CC_NE = (3 << AF_CC_SHIFT),
AF_CC_LT = (4 << AF_CC_SHIFT),
AF_CC_LE = (5 << AF_CC_SHIFT),
AF_CC_MASK = (7U << AF_CC_SHIFT),
AF_CC_E = (0U << AF_CC_SHIFT),
AF_CC_GT = (1U << AF_CC_SHIFT),
AF_CC_GE = (2U << AF_CC_SHIFT),
AF_CC_NE = (3U << AF_CC_SHIFT),
AF_CC_LT = (4U << AF_CC_SHIFT),
AF_CC_LE = (5U << AF_CC_SHIFT),
};
/* flags for FETCH instructions (TEX/VTX) */
@ -165,7 +165,7 @@ struct alu_op_info
* (0 if instruction doesn't exist for chip class) */
int slots[4];
/* flags (mostly autogenerated from instruction name) */
int flags;
unsigned int flags;
};
/* FETCH instruction info */

3
src/gallium/drivers/r600/r600_pipe.c
View File

@ -136,7 +136,6 @@ static struct pipe_context *r600_create_context(struct pipe_screen *screen,
goto fail;
rctx->screen = rscreen;
rctx->keep_tiling_flags = rscreen->b.info.drm_minor >= 12;
r600_init_blit_functions(rctx);
@ -409,7 +408,7 @@ static int r600_get_param(struct pipe_screen* pscreen, enum pipe_cap param)
return 12;
case PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS:
/* textures support 8192, but layered rendering supports 2048 */
return rscreen->b.info.drm_minor >= 9 ? 2048 : 0;
return 2048;
/* Render targets. */
case PIPE_CAP_MAX_RENDER_TARGETS:

1
src/gallium/drivers/r600/r600_pipe.h
View File

@ -442,7 +442,6 @@ struct r600_context {
/* Hardware info. */
boolean has_vertex_cache;
boolean keep_tiling_flags;
unsigned default_gprs[EG_NUM_HW_STAGES];
unsigned current_gprs[EG_NUM_HW_STAGES];
unsigned r6xx_num_clause_temp_gprs;

18
src/gallium/drivers/r600/r600_state_common.c
View File

@ -2235,7 +2235,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
uint32_t result = 0, word4 = 0, yuv_format = 0;
const struct util_format_description *desc;
boolean uniform = TRUE;
bool enable_s3tc = rscreen->b.info.drm_minor >= 9;
bool is_srgb_valid = FALSE;
const unsigned char swizzle_xxxx[4] = {0, 0, 0, 0};
const unsigned char swizzle_yyyy[4] = {1, 1, 1, 1};
@ -2330,9 +2329,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
}
if (desc->layout == UTIL_FORMAT_LAYOUT_RGTC) {
if (!enable_s3tc)
goto out_unknown;
switch (format) {
case PIPE_FORMAT_RGTC1_SNORM:
case PIPE_FORMAT_LATC1_SNORM:
@ -2354,10 +2350,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
}
if (desc->layout == UTIL_FORMAT_LAYOUT_S3TC) {
if (!enable_s3tc)
goto out_unknown;
if (!util_format_s3tc_enabled) {
goto out_unknown;
}
@ -2386,9 +2378,6 @@ uint32_t r600_translate_texformat(struct pipe_screen *screen,
}
if (desc->layout == UTIL_FORMAT_LAYOUT_BPTC) {
if (!enable_s3tc)
goto out_unknown;
if (rscreen->b.chip_class < EVERGREEN)
goto out_unknown;
@ -2721,6 +2710,13 @@ uint32_t r600_colorformat_endian_swap(uint32_t colorformat)
/* 32-bit buffers. */
case V_0280A0_COLOR_8_8_8_8:
/*
* No need to do endian swaps on four 8-bits components,
* as mesa<-->pipe formats conversion take into account
* the endianess
*/
return ENDIAN_NONE;
case V_0280A0_COLOR_2_10_10_10:
case V_0280A0_COLOR_8_24:
case V_0280A0_COLOR_24_8:

2
src/gallium/drivers/radeon/r600_pipe_common.h
View File

@ -659,7 +659,7 @@ r600_get_sampler_view_priority(struct r600_resource *res)
} while (0);
#define R600_ERR(fmt, args...) \
fprintf(stderr, "EE %s:%d %s - "fmt, __FILE__, __LINE__, __func__, ##args)
fprintf(stderr, "EE %s:%d %s - " fmt, __FILE__, __LINE__, __func__, ##args)
/* For MSAA sample positions. */
#define FILL_SREG(s0x, s0y, s1x, s1y, s2x, s2y, s3x, s3y) \

16
src/gallium/drivers/radeon/r600_texture.c
View File

@ -1293,25 +1293,14 @@ unsigned r600_translate_colorswap(enum pipe_format format)
break;
case 4:
/* check the middle channels, the 1st and 4th channel can be NONE */
#ifdef PIPE_ARCH_LITTLE_ENDIAN
if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,Z))
return V_0280A0_SWAP_STD; /* XYZW */
else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,Y))
return V_0280A0_SWAP_STD_REV; /* WZYX */
else if (HAS_SWIZZLE(1,Y) && HAS_SWIZZLE(2,X))
return V_0280A0_SWAP_ALT; /* ZYXW */
else if (HAS_SWIZZLE(1,X) && HAS_SWIZZLE(2,Y))
return V_0280A0_SWAP_ALT_REV; /* WXYZ */
#else
if (HAS_SWIZZLE(1,W) && HAS_SWIZZLE(2,X))
return V_0280A0_SWAP_STD; /* ZWXY */
else if (HAS_SWIZZLE(1,X) && HAS_SWIZZLE(2,W))
return V_0280A0_SWAP_STD_REV; /* YXWZ */
else if (HAS_SWIZZLE(1,W) && HAS_SWIZZLE(2,Z))
return V_0280A0_SWAP_ALT; /* XWZY */
else if (HAS_SWIZZLE(1,Z) && HAS_SWIZZLE(2,W))
return V_0280A0_SWAP_ALT_REV; /* YZWX */
#endif
break;
}
return ~0U;
@ -1419,6 +1408,11 @@ void evergreen_do_fast_color_clear(struct r600_common_context *rctx,
{
int i;
/* This function is broken in BE, so just disable this path for now */
#ifdef PIPE_ARCH_BIG_ENDIAN
return;
#endif
if (rctx->render_cond)
return;

16
src/gallium/drivers/radeon/radeon_winsys.h
View File

@ -26,24 +26,10 @@
/* The public winsys interface header for the radeon driver. */
/* R300 features in DRM.
*
* 2.6.0:
* - Hyper-Z
* - GB_Z_PEQ_CONFIG on rv350->r4xx
* - R500 FG_ALPHA_VALUE
*
* 2.8.0:
* - R500 US_FORMAT regs
* - R500 ARGB2101010 colorbuffer
* - CMask and AA regs
* - R16F/RG16F
*/
#include "pipebuffer/pb_buffer.h"
#define RADEON_FLUSH_ASYNC (1 << 0)
#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1) /* needs DRM 2.12.0 */
#define RADEON_FLUSH_KEEP_TILING_FLAGS (1 << 1)
#define RADEON_FLUSH_END_OF_FRAME (1 << 2)
/* Tiling flags. */

2
src/gallium/drivers/radeonsi/si_compute.c
View File

@ -115,7 +115,7 @@ static void *si_create_compute_state(
si_shader_binary_read_config(&program->shader.binary,
&program->shader.config, 0);
si_shader_dump(sctx->screen, &program->shader, &sctx->b.debug,
TGSI_PROCESSOR_COMPUTE);
TGSI_PROCESSOR_COMPUTE, stderr);
si_shader_binary_upload(sctx->screen, &program->shader);
program->input_buffer = si_resource_create_custom(sctx->b.b.screen,

21
src/gallium/drivers/radeonsi/si_debug.c
View File

@ -34,15 +34,15 @@
DEBUG_GET_ONCE_OPTION(replace_shaders, "RADEON_REPLACE_SHADERS", NULL)
static void si_dump_shader(struct si_shader_ctx_state *state, const char *name,
FILE *f)
static void si_dump_shader(struct si_screen *sscreen,
struct si_shader_ctx_state *state, FILE *f)
{
if (!state->cso || !state->current)
return;
fprintf(f, "%s shader disassembly:\n", name);
si_dump_shader_key(state->cso->type, &state->current->key, f);
fprintf(f, "%s\n\n", state->current->binary.disasm_string);
si_shader_dump(sscreen, state->current, NULL,
state->cso->info.processor, f);
}
/**
@ -670,11 +670,11 @@ static void si_dump_debug_state(struct pipe_context *ctx, FILE *f,
si_dump_debug_registers(sctx, f);
si_dump_framebuffer(sctx, f);
si_dump_shader(&sctx->vs_shader, "Vertex", f);
si_dump_shader(&sctx->tcs_shader, "Tessellation control", f);
si_dump_shader(&sctx->tes_shader, "Tessellation evaluation", f);
si_dump_shader(&sctx->gs_shader, "Geometry", f);
si_dump_shader(&sctx->ps_shader, "Fragment", f);
si_dump_shader(sctx->screen, &sctx->vs_shader, f);
si_dump_shader(sctx->screen, &sctx->tcs_shader, f);
si_dump_shader(sctx->screen, &sctx->tes_shader, f);
si_dump_shader(sctx->screen, &sctx->gs_shader, f);
si_dump_shader(sctx->screen, &sctx->ps_shader, f);
si_dump_last_bo_list(sctx, f);
si_dump_last_ib(sctx, f);
@ -781,8 +781,7 @@ void si_check_vm_faults(struct si_context *sctx)
fprintf(f, "Device name: %s\n\n", screen->get_name(screen));
fprintf(f, "Failing VM page: 0x%08x\n\n", addr);
si_dump_last_bo_list(sctx, f);
si_dump_last_ib(sctx, f);
si_dump_debug_state(&sctx->b.b, f, 0);
fclose(f);
fprintf(stderr, "Detected a VM fault, exiting...\n");

46
src/gallium/drivers/radeonsi/si_shader.c
View File

@ -4406,14 +4406,14 @@ int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader)
static void si_shader_dump_disassembly(const struct radeon_shader_binary *binary,
struct pipe_debug_callback *debug,
const char *name)
const char *name, FILE *file)
{
char *line, *p;
unsigned i, count;
if (binary->disasm_string) {
fprintf(stderr, "Shader %s disassembly:\n", name);
fprintf(stderr, "%s", binary->disasm_string);
fprintf(file, "Shader %s disassembly:\n", name);
fprintf(file, "%s", binary->disasm_string);
if (debug && debug->debug_message) {
/* Very long debug messages are cut off, so send the
@ -4443,9 +4443,9 @@ static void si_shader_dump_disassembly(const struct radeon_shader_binary *binary
"Shader Disassembly End");
}
} else {
fprintf(stderr, "Shader %s binary:\n", name);
fprintf(file, "Shader %s binary:\n", name);
for (i = 0; i < binary->code_size; i += 4) {
fprintf(stderr, "@0x%x: %02x%02x%02x%02x\n", i,
fprintf(file, "@0x%x: %02x%02x%02x%02x\n", i,
binary->code[i + 3], binary->code[i + 2],
binary->code[i + 1], binary->code[i]);
}
@ -4457,7 +4457,8 @@ static void si_shader_dump_stats(struct si_screen *sscreen,
unsigned num_inputs,
unsigned code_size,
struct pipe_debug_callback *debug,
unsigned processor)
unsigned processor,
FILE *file)
{
unsigned lds_increment = sscreen->b.chip_class >= CIK ? 512 : 256;
unsigned lds_per_wave = 0;
@ -4493,15 +4494,16 @@ static void si_shader_dump_stats(struct si_screen *sscreen,
if (lds_per_wave)
max_simd_waves = MIN2(max_simd_waves, 16384 / lds_per_wave);
if (r600_can_dump_shader(&sscreen->b, processor)) {
if (file != stderr ||
r600_can_dump_shader(&sscreen->b, processor)) {
if (processor == TGSI_PROCESSOR_FRAGMENT) {
fprintf(stderr, "*** SHADER CONFIG ***\n"
fprintf(file, "*** SHADER CONFIG ***\n"
"SPI_PS_INPUT_ADDR = 0x%04x\n"
"SPI_PS_INPUT_ENA = 0x%04x\n",
conf->spi_ps_input_addr, conf->spi_ps_input_ena);
}
fprintf(stderr, "*** SHADER STATS ***\n"
fprintf(file, "*** SHADER STATS ***\n"
"SGPRS: %d\n"
"VGPRS: %d\n"
"Code Size: %d bytes\n"
@ -4555,27 +4557,30 @@ static const char *si_get_shader_name(struct si_shader *shader,
}
void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
struct pipe_debug_callback *debug, unsigned processor)
struct pipe_debug_callback *debug, unsigned processor,
FILE *file)
{
if (r600_can_dump_shader(&sscreen->b, processor) &&
!(sscreen->b.debug_flags & DBG_NO_ASM)) {
fprintf(stderr, "\n%s:\n", si_get_shader_name(shader, processor));
if (file != stderr ||
(r600_can_dump_shader(&sscreen->b, processor) &&
!(sscreen->b.debug_flags & DBG_NO_ASM))) {
fprintf(file, "\n%s:\n", si_get_shader_name(shader, processor));
if (shader->prolog)
si_shader_dump_disassembly(&shader->prolog->binary,
debug, "prolog");
debug, "prolog", file);
si_shader_dump_disassembly(&shader->binary, debug, "main");
si_shader_dump_disassembly(&shader->binary, debug, "main", file);
if (shader->epilog)
si_shader_dump_disassembly(&shader->epilog->binary,
debug, "epilog");
fprintf(stderr, "\n");
debug, "epilog", file);
fprintf(file, "\n");
}
si_shader_dump_stats(sscreen, &shader->config,
shader->selector ? shader->selector->info.num_inputs : 0,
si_get_shader_binary_size(shader), debug, processor);
si_get_shader_binary_size(shader), debug, processor,
file);
}
int si_compile_llvm(struct si_screen *sscreen,
@ -4723,7 +4728,7 @@ static int si_generate_gs_copy_shader(struct si_screen *sscreen,
if (r600_can_dump_shader(&sscreen->b, TGSI_PROCESSOR_GEOMETRY))
fprintf(stderr, "GS Copy Shader:\n");
si_shader_dump(sscreen, ctx->shader, debug,
TGSI_PROCESSOR_GEOMETRY);
TGSI_PROCESSOR_GEOMETRY, stderr);
r = si_shader_binary_upload(sscreen, ctx->shader);
}
@ -5971,7 +5976,8 @@ int si_shader_create(struct si_screen *sscreen, LLVMTargetMachineRef tm,
}
}
si_shader_dump(sscreen, shader, debug, shader->selector->info.processor);
si_shader_dump(sscreen, shader, debug, shader->selector->info.processor,
stderr);
/* Upload. */
r = si_shader_binary_upload(sscreen, shader);

4
src/gallium/drivers/radeonsi/si_shader.h
View File

@ -365,6 +365,7 @@ struct si_shader {
struct r600_resource *scratch_bo;
union si_shader_key key;
bool is_binary_shared;
unsigned z_order;
/* The following data is all that's needed for binary shaders. */
struct radeon_shader_binary binary;
@ -433,7 +434,8 @@ void si_shader_destroy(struct si_shader *shader);
unsigned si_shader_io_get_unique_index(unsigned semantic_name, unsigned index);
int si_shader_binary_upload(struct si_screen *sscreen, struct si_shader *shader);
void si_shader_dump(struct si_screen *sscreen, struct si_shader *shader,
struct pipe_debug_callback *debug, unsigned processor);
struct pipe_debug_callback *debug, unsigned processor,
FILE *f);
void si_shader_apply_scratch_relocs(struct si_context *sctx,
struct si_shader *shader,
uint64_t scratch_va);

6
src/gallium/drivers/radeonsi/si_state.c
View File

@ -1339,10 +1339,10 @@ static void si_emit_db_render_state(struct si_context *sctx, struct r600_atom *s
sctx->ps_db_shader_control;
/* Bug workaround for smoothing (overrasterization) on SI. */
if (sctx->b.chip_class == SI && sctx->smoothing_enabled)
if (sctx->b.chip_class == SI && sctx->smoothing_enabled) {
db_shader_control &= C_02880C_Z_ORDER;
db_shader_control |= S_02880C_Z_ORDER(V_02880C_LATE_Z);
else
db_shader_control |= S_02880C_Z_ORDER(V_02880C_EARLY_Z_THEN_LATE_Z);
}
/* Disable the gl_SampleMask fragment shader output if MSAA is disabled. */
if (sctx->framebuffer.nr_samples <= 1 || (rs && !rs->multisample_enable))

20
src/gallium/drivers/radeonsi/si_state_shaders.c
View File

@ -789,6 +789,17 @@ static void si_shader_ps(struct si_shader *shader)
S_00B02C_EXTRA_LDS_SIZE(shader->config.lds_size) |
S_00B02C_USER_SGPR(num_user_sgprs) |
S_00B32C_SCRATCH_EN(shader->config.scratch_bytes_per_wave > 0));
/* Prefer RE_Z if the shader is complex enough. The requirement is either:
* - the shader uses at least 2 VMEM instructions, or
* - the code size is at least 50 2-dword instructions or 100 1-dword
* instructions.
*/
if (info->num_memory_instructions >= 2 ||
shader->binary.code_size > 100*4)
shader->z_order = V_02880C_EARLY_Z_THEN_RE_Z;
else
shader->z_order = V_02880C_EARLY_Z_THEN_LATE_Z;
}
static void si_shader_init_pm4_state(struct si_shader *shader)
@ -1985,15 +1996,18 @@ bool si_update_shaders(struct si_context *sctx)
si_update_vgt_shader_config(sctx);
if (sctx->ps_shader.cso) {
unsigned db_shader_control =
sctx->ps_shader.cso->db_shader_control |
S_02880C_KILL_ENABLE(si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS);
unsigned db_shader_control;
r = si_shader_select(ctx, &sctx->ps_shader);
if (r)
return false;
si_pm4_bind_state(sctx, ps, sctx->ps_shader.current->pm4);
db_shader_control =
sctx->ps_shader.cso->db_shader_control |
S_02880C_KILL_ENABLE(si_get_alpha_test_func(sctx) != PIPE_FUNC_ALWAYS) |
S_02880C_Z_ORDER(sctx->ps_shader.current->z_order);
if (si_pm4_state_changed(sctx, ps) || si_pm4_state_changed(sctx, vs) ||
sctx->sprite_coord_enable != rs->sprite_coord_enable ||
sctx->flatshade != rs->flatshade) {

6
src/gallium/drivers/vc4/Android.mk
View File

@ -28,9 +28,11 @@ include $(CLEAR_VARS)
LOCAL_SRC_FILES := \
$(C_SOURCES)
LOCAL_GENERATED_SOURCES := $(MESA_GEN_NIR_H)
LOCAL_SHARED_LIBRARIES := libdrm
# We need libmesa_glsl to get NIR's generated include directories.
LOCAL_STATIC_LIBRARIES := libmesa_glsl
# We need libmesa_nir to get NIR's generated include directories.
LOCAL_STATIC_LIBRARIES := libmesa_nir
LOCAL_MODULE := libmesa_pipe_vc4
include $(GALLIUM_COMMON_MK)

4
src/gallium/drivers/virgl/virgl_encode.c
View File

@ -741,7 +741,9 @@ int virgl_encode_blit(struct virgl_context *ctx,
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_BLIT, 0, VIRGL_CMD_BLIT_SIZE));
tmp = VIRGL_CMD_BLIT_S0_MASK(blit->mask) |
VIRGL_CMD_BLIT_S0_FILTER(blit->filter) |
VIRGL_CMD_BLIT_S0_SCISSOR_ENABLE(blit->scissor_enable);
VIRGL_CMD_BLIT_S0_SCISSOR_ENABLE(blit->scissor_enable) |
VIRGL_CMD_BLIT_S0_RENDER_CONDITION_ENABLE(blit->render_condition_enable) |
VIRGL_CMD_BLIT_S0_ALPHA_BLEND(blit->alpha_blend);
virgl_encoder_write_dword(ctx->cbuf, tmp);
virgl_encoder_write_dword(ctx->cbuf, (blit->scissor.minx | blit->scissor.miny << 16));
virgl_encoder_write_dword(ctx->cbuf, (blit->scissor.maxx | blit->scissor.maxy << 16));

2
src/gallium/drivers/virgl/virgl_protocol.h
View File

@ -388,6 +388,8 @@ enum virgl_context_cmd {
#define VIRGL_CMD_BLIT_S0_MASK(x) (((x) & 0xff) << 0)
#define VIRGL_CMD_BLIT_S0_FILTER(x) (((x) & 0x3) << 8)
#define VIRGL_CMD_BLIT_S0_SCISSOR_ENABLE(x) (((x) & 0x1) << 10)
#define VIRGL_CMD_BLIT_S0_RENDER_CONDITION_ENABLE(x) (((x) & 0x1) << 11)
#define VIRGL_CMD_BLIT_S0_ALPHA_BLEND(x) (((x) & 0x1) << 12)
#define VIRGL_CMD_BLIT_SCISSOR_MINX_MINY 2
#define VIRGL_CMD_BLIT_SCISSOR_MAXX_MAXY 3
#define VIRGL_CMD_BLIT_DST_RES_HANDLE 4

3
src/gallium/drivers/virgl/virgl_screen.c
View File

@ -232,6 +232,9 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_GENERATE_MIPMAP:
case PIPE_CAP_SURFACE_REINTERPRET_BLOCKS:
case PIPE_CAP_QUERY_BUFFER_OBJECT:
case PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS:
case PIPE_CAP_STRING_MARKER:
case PIPE_CAP_QUERY_MEMORY_INFO:
return 0;
case PIPE_CAP_VENDOR_ID:
return 0x1af4;

1
src/gallium/include/pipe/p_format.h
View File

@ -432,7 +432,6 @@ enum pipe_format {
#elif defined(PIPE_ARCH_BIG_ENDIAN)
#define PIPE_FORMAT_ABGR8888_UNORM PIPE_FORMAT_R8G8B8A8_UNORM
#define PIPE_FORMAT_XBGR8888_UNORM PIPE_FORMAT_R8G8B8X8_UNORM
#define PIPE_FORMAT_XRGB8888_UNORM PIPE_FORMAT_B8G8R8X8_UNORM
#define PIPE_FORMAT_ARGB8888_UNORM PIPE_FORMAT_B8G8R8A8_UNORM
#define PIPE_FORMAT_XRGB8888_UNORM PIPE_FORMAT_B8G8R8X8_UNORM
#define PIPE_FORMAT_BGRA8888_UNORM PIPE_FORMAT_A8R8G8B8_UNORM

1
src/gallium/state_trackers/clover/Makefile.am
View File

@ -41,6 +41,7 @@ libclllvm_la_CXXFLAGS = \
$(VISIBILITY_CXXFLAGS) \
$(LLVM_CXXFLAGS) \
$(DEFINES) \
$(LIBELF_CFLAGS) \
-DLIBCLC_INCLUDEDIR=\"$(LIBCLC_INCLUDEDIR)/\" \
-DLIBCLC_LIBEXECDIR=\"$(LIBCLC_LIBEXECDIR)/\" \
-DCLANG_RESOURCE_DIR=\"$(CLANG_RESOURCE_DIR)\"

1
src/gallium/state_trackers/nine/Makefile.sources
View File

@ -35,6 +35,7 @@ C_SOURCES := \
nine_flags.h \
nine_helpers.c \
nine_helpers.h \
nine_limits.h \
nine_lock.c \
nine_lock.h \
nine_pdata.h \

26
src/gallium/state_trackers/nine/buffer9.c
View File

@ -174,13 +174,18 @@ NineBuffer9_Lock( struct NineBuffer9 *This,
u_box_1d(OffsetToLock, SizeToLock, &box);
if (This->base.pool == D3DPOOL_MANAGED) {
if (!This->managed.dirty) {
assert(LIST_IS_EMPTY(&This->managed.list));
list_add(&This->managed.list, &This->base.base.device->update_buffers);
This->managed.dirty = TRUE;
This->managed.dirty_box = box;
} else {
u_box_union_2d(&This->managed.dirty_box, &This->managed.dirty_box, &box);
/* READONLY doesn't dirty the buffer */
if (!(Flags & D3DLOCK_READONLY)) {
if (!This->managed.dirty) {
assert(LIST_IS_EMPTY(&This->managed.list));
This->managed.dirty = TRUE;
This->managed.dirty_box = box;
} else {
u_box_union_2d(&This->managed.dirty_box, &This->managed.dirty_box, &box);
/* Do not upload while we are locking, we'll add it back later */
if (!LIST_IS_EMPTY(&This->managed.list))
list_delinit(&This->managed.list);
}
}
*ppbData = (char *)This->managed.data + OffsetToLock;
DBG("returning pointer %p\n", *ppbData);
@ -229,8 +234,13 @@ NineBuffer9_Unlock( struct NineBuffer9 *This )
user_assert(This->nmaps > 0, D3DERR_INVALIDCALL);
if (This->base.pool != D3DPOOL_MANAGED)
This->pipe->transfer_unmap(This->pipe, This->maps[--(This->nmaps)]);
else
else {
This->nmaps--;
/* TODO: Fix this to upload at the first draw call needing the data,
* instead of at the next draw call */
if (!This->nmaps && This->managed.dirty && LIST_IS_EMPTY(&This->managed.list))
list_add(&This->managed.list, &This->base.base.device->update_buffers);
}
return D3D_OK;
}

38
src/gallium/state_trackers/nine/nine_shader.c
View File

@ -830,6 +830,18 @@ nine_ureg_dst_register(unsigned file, int index)
return ureg_dst(ureg_src_register(file, index));
}
static inline struct ureg_src
nine_get_position_input(struct shader_translator *tx)
{
struct ureg_program *ureg = tx->ureg;
if (tx->wpos_is_sysval)
return ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0);
else
return ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION,
0, TGSI_INTERPOLATE_LINEAR);
}
static struct ureg_src
tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
{
@ -955,16 +967,8 @@ tx_src_param(struct shader_translator *tx, const struct sm1_src_param *param)
case D3DSPR_MISCTYPE:
switch (param->idx) {
case D3DSMO_POSITION:
if (ureg_src_is_undef(tx->regs.vPos)) {
if (tx->wpos_is_sysval) {
tx->regs.vPos =
ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0);
} else {
tx->regs.vPos =
ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0,
TGSI_INTERPOLATE_LINEAR);
}
}
if (ureg_src_is_undef(tx->regs.vPos))
tx->regs.vPos = nine_get_position_input(tx);
if (tx->shift_wpos) {
/* TODO: do this only once */
struct ureg_dst wpos = tx_scratch(tx);
@ -2048,9 +2052,16 @@ DECL_SPECIAL(DCL)
unsigned interp_location = 0;
/* SM3 only, SM2 input semantic determined by file */
assert(sem.reg.idx < Elements(tx->regs.v));
if (tgsi.Name == TGSI_SEMANTIC_POSITION) {
tx->regs.v[sem.reg.idx] = nine_get_position_input(tx);
return D3D_OK;
}
if (sem.reg.mod & NINED3DSPDM_CENTROID ||
(tgsi.Name == TGSI_SEMANTIC_COLOR && tx->info->force_color_in_centroid))
interp_location = TGSI_INTERPOLATE_LOC_CENTROID;
tx->regs.v[sem.reg.idx] = ureg_DECL_fs_input_cyl_centroid(
ureg, tgsi.Name, tgsi.Index,
nine_tgsi_to_interp_mode(&tgsi),
@ -3269,12 +3280,7 @@ shader_add_ps_fog_stage(struct shader_translator *tx, struct ureg_src src_col)
}
if (tx->info->fog_mode != D3DFOG_NONE) {
if (tx->wpos_is_sysval) {
depth = ureg_DECL_system_value(ureg, TGSI_SEMANTIC_POSITION, 0);
} else {
depth = ureg_DECL_fs_input(ureg, TGSI_SEMANTIC_POSITION, 0,
TGSI_INTERPOLATE_LINEAR);
}
depth = nine_get_position_input(tx);
depth = ureg_scalar(depth, TGSI_SWIZZLE_Z);
}

5
src/gallium/targets/dri/Android.mk
View File

@ -28,9 +28,10 @@ include $(CLEAR_VARS)
LOCAL_MODULE := gallium_dri
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_MODULE_RELATIVE_PATH := $(notdir $(MESA_DRI_MODULE_PATH))
LOCAL_MODULE_RELATIVE_PATH := $(MESA_DRI_MODULE_REL_PATH)
else
LOCAL_MODULE_PATH := $(MESA_DRI_MODULE_PATH)
LOCAL_UNSTRIPPED_PATH := $(MESA_DRI_MODULE_UNSTRIPPED_PATH)
endif
LOCAL_SRC_FILES := target.c
@ -109,6 +110,8 @@ LOCAL_WHOLE_STATIC_LIBRARIES := \
libmesa_st_dri \
libmesa_st_mesa \
libmesa_glsl \
libmesa_compiler \
libmesa_nir \
libmesa_dri_common \
libmesa_megadriver_stub \
libmesa_gallium \

3
src/gallium/targets/opencl/Makefile.am
View File

@ -2,9 +2,6 @@ include $(top_srcdir)/src/gallium/Automake.inc
lib_LTLIBRARIES = lib@OPENCL_LIBNAME@.la
AM_CPPFLAGS = \
$(LIBELF_CFLAGS)
lib@OPENCL_LIBNAME@_la_LDFLAGS = \
$(LLVM_LDFLAGS) \
-no-undefined \

38
src/gallium/winsys/radeon/drm/radeon_drm_winsys.c
View File

@ -174,9 +174,9 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
/* Get DRM version. */
version = drmGetVersion(ws->fd);
if (version->version_major != 2 ||
version->version_minor < 3) {
version->version_minor < 12) {
fprintf(stderr, "%s: DRM version is %d.%d.%d but this driver is "
"only compatible with 2.3.x (kernel 2.6.34) or later.\n",
"only compatible with 2.12.0 (kernel 3.2) or later.\n",
__FUNCTION__,
version->version_major,
version->version_minor,
@ -374,8 +374,7 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
else if (ws->gen >= DRV_R600) {
uint32_t tiling_config = 0;
if (ws->info.drm_minor >= 9 &&
!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS,
if (!radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_BACKENDS,
"num backends",
&ws->info.num_render_backends))
return FALSE;
@ -401,27 +400,20 @@ static boolean do_winsys_init(struct radeon_drm_winsys *ws)
ws->info.pipe_interleave_bytes =
ws->info.chip_class >= EVERGREEN ? 512 : 256;
if (ws->info.drm_minor >= 11) {
radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
&ws->info.num_tile_pipes);
radeon_get_drm_value(ws->fd, RADEON_INFO_NUM_TILE_PIPES, NULL,
&ws->info.num_tile_pipes);
/* "num_tiles_pipes" must be equal to the number of pipes (Px) in the
* pipe config field of the GB_TILE_MODE array. Only one card (Tahiti)
* reports a different value (12). Fix it by setting what's in the
* GB_TILE_MODE array (8).
*/
if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
ws->info.num_tile_pipes = 8;
/* "num_tiles_pipes" must be equal to the number of pipes (Px) in the
* pipe config field of the GB_TILE_MODE array. Only one card (Tahiti)
* reports a different value (12). Fix it by setting what's in the
* GB_TILE_MODE array (8).
*/
if (ws->gen == DRV_SI && ws->info.num_tile_pipes == 12)
ws->info.num_tile_pipes = 8;
if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
&ws->info.r600_gb_backend_map))
ws->info.r600_gb_backend_map_valid = TRUE;
} else {
ws->info.num_tile_pipes =
ws->info.chip_class >= EVERGREEN ?
1 << (tiling_config & 0xf) :
1 << ((tiling_config & 0xe) >> 1);
}
if (radeon_get_drm_value(ws->fd, RADEON_INFO_BACKEND_MAP, NULL,
&ws->info.r600_gb_backend_map))
ws->info.r600_gb_backend_map_valid = TRUE;
ws->info.has_virtual_memory = FALSE;
if (ws->info.drm_minor >= 13) {

9
src/intel/vulkan/anv_pipeline.c
View File

@ -396,13 +396,8 @@ anv_pipeline_compile(struct anv_pipeline *pipeline,
prog_data->binding_table.image_start = bias;
/* Finish the optimization and compilation process */
if (nir->stage != MESA_SHADER_VERTEX &&
nir->stage != MESA_SHADER_TESS_CTRL &&
nir->stage != MESA_SHADER_TESS_EVAL &&
nir->stage != MESA_SHADER_FRAGMENT) {
nir = brw_nir_lower_io(nir, &pipeline->device->info,
compiler->scalar_stage[stage], false, NULL);
}
if (nir->stage == MESA_SHADER_COMPUTE)
brw_nir_lower_shared(nir);
/* nir_lower_io will only handle the push constants; we need to set this
* to the full number of possible uniforms.

1
src/mesa/Android.libmesa_dricore.mk
View File

@ -59,7 +59,6 @@ endif
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa/main \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/compiler/nir \
$(MESA_TOP)/src/gallium/include \
$(MESA_TOP)/src/gallium/auxiliary

2
src/mesa/Android.libmesa_glsl_utils.mk
View File

@ -36,7 +36,6 @@ include $(CLEAR_VARS)
LOCAL_MODULE := libmesa_glsl_utils
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/compiler/nir \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/gallium/include \
@ -62,7 +61,6 @@ LOCAL_IS_HOST_MODULE := true
LOCAL_CFLAGS := -D_POSIX_C_SOURCE=199309L
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/compiler/nir \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/gallium/include \

1
src/mesa/Android.libmesa_st_mesa.mk
View File

@ -54,7 +54,6 @@ endif
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/mesa/main \
$(MESA_TOP)/src/glsl \
$(MESA_TOP)/src/compiler/nir \
$(MESA_TOP)/src/gallium/auxiliary \
$(MESA_TOP)/src/gallium/include

3
src/mesa/Android.mesa_gen_matypes.mk
View File

@ -35,8 +35,7 @@ LOCAL_MODULE := mesa_gen_matypes
LOCAL_IS_HOST_MODULE := true
LOCAL_C_INCLUDES := \
$(MESA_TOP)/src/mapi \
$(MESA_TOP)/src/glsl
$(MESA_TOP)/src/mapi
LOCAL_SRC_FILES := \
x86/gen_matypes.c

133
src/mesa/drivers/common/meta.c
View File

@ -48,6 +48,7 @@
#include "main/feedback.h"
#include "main/formats.h"
#include "main/format_unpack.h"
#include "main/framebuffer.h"
#include "main/glformats.h"
#include "main/image.h"
#include "main/macros.h"
@ -104,42 +105,20 @@ static void meta_drawpix_cleanup(struct gl_context *ctx,
struct drawpix_state *drawpix);
void
_mesa_meta_bind_fbo_image(GLenum fboTarget, GLenum attachment,
struct gl_texture_image *texImage, GLuint layer)
_mesa_meta_framebuffer_texture_image(struct gl_context *ctx,
struct gl_framebuffer *fb,
GLenum attachment,
struct gl_texture_image *texImage,
GLuint layer)
{
struct gl_texture_object *texObj = texImage->TexObject;
int level = texImage->Level;
GLenum texTarget = texObj->Target;
const GLenum texTarget = texObj->Target == GL_TEXTURE_CUBE_MAP
? GL_TEXTURE_CUBE_MAP_POSITIVE_X + texImage->Face
: texObj->Target;
switch (texTarget) {
case GL_TEXTURE_1D:
_mesa_FramebufferTexture1D(fboTarget,
attachment,
texTarget,
texObj->Name,
level);
break;
case GL_TEXTURE_1D_ARRAY:
case GL_TEXTURE_2D_ARRAY:
case GL_TEXTURE_2D_MULTISAMPLE_ARRAY:
case GL_TEXTURE_CUBE_MAP_ARRAY:
case GL_TEXTURE_3D:
_mesa_FramebufferTextureLayer(fboTarget,
attachment,
texObj->Name,
level,
layer);
break;
default: /* 2D / cube */
if (texTarget == GL_TEXTURE_CUBE_MAP)
texTarget = GL_TEXTURE_CUBE_MAP_POSITIVE_X + texImage->Face;
_mesa_FramebufferTexture2D(fboTarget,
attachment,
texTarget,
texObj->Name,
level);
}
_mesa_framebuffer_texture(ctx, fb, attachment, texObj, texTarget,
level, layer, false, __func__);
}
GLuint
@ -847,8 +826,8 @@ _mesa_meta_begin(struct gl_context *ctx, GLbitfield state)
if (ctx->RasterDiscard)
_mesa_set_enable(ctx, GL_RASTERIZER_DISCARD, GL_FALSE);
save->DrawBufferName = ctx->DrawBuffer->Name;
save->ReadBufferName = ctx->ReadBuffer->Name;
_mesa_reference_framebuffer(&save->DrawBuffer, ctx->DrawBuffer);
_mesa_reference_framebuffer(&save->ReadBuffer, ctx->ReadBuffer);
}
}
@ -1234,11 +1213,9 @@ _mesa_meta_end(struct gl_context *ctx)
if (save->TransformFeedbackNeedsResume)
_mesa_ResumeTransformFeedback();
if (ctx->DrawBuffer->Name != save->DrawBufferName)
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, save->DrawBufferName);
if (ctx->ReadBuffer->Name != save->ReadBufferName)
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, save->ReadBufferName);
_mesa_bind_framebuffers(ctx, save->DrawBuffer, save->ReadBuffer);
_mesa_reference_framebuffer(&save->DrawBuffer, NULL);
_mesa_reference_framebuffer(&save->ReadBuffer, NULL);
if (state & MESA_META_DRAW_BUFFERS) {
_mesa_drawbuffers(ctx, ctx->DrawBuffer, ctx->Const.MaxDrawBuffers,
@ -2807,7 +2784,7 @@ copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
GLint x, GLint y,
GLsizei width, GLsizei height)
{
GLuint fbo;
struct gl_framebuffer *drawFb;
bool success = false;
GLbitfield mask;
GLenum status;
@ -2815,32 +2792,37 @@ copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
if (!ctx->Extensions.ARB_framebuffer_object)
return false;
_mesa_meta_begin(ctx, MESA_META_ALL & ~MESA_META_DRAW_BUFFERS);
drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (drawFb == NULL)
return false;
_mesa_GenFramebuffers(1, &fbo);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbo);
_mesa_meta_begin(ctx, MESA_META_ALL & ~MESA_META_DRAW_BUFFERS);
_mesa_bind_framebuffers(ctx, drawFb, ctx->ReadBuffer);
if (rb->_BaseFormat == GL_DEPTH_STENCIL ||
rb->_BaseFormat == GL_DEPTH_COMPONENT) {
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_DEPTH_ATTACHMENT,
texImage, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_DEPTH_ATTACHMENT,
texImage, zoffset);
mask = GL_DEPTH_BUFFER_BIT;
if (rb->_BaseFormat == GL_DEPTH_STENCIL &&
texImage->_BaseFormat == GL_DEPTH_STENCIL) {
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_STENCIL_ATTACHMENT,
texImage, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_STENCIL_ATTACHMENT,
texImage, zoffset);
mask |= GL_STENCIL_BUFFER_BIT;
}
_mesa_DrawBuffer(GL_NONE);
} else {
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
texImage, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_COLOR_ATTACHMENT0,
texImage, zoffset);
mask = GL_COLOR_BUFFER_BIT;
_mesa_DrawBuffer(GL_COLOR_ATTACHMENT0);
}
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto out;
@ -2866,7 +2848,7 @@ copytexsubimage_using_blit_framebuffer(struct gl_context *ctx, GLuint dims,
success = mask == 0x0;
out:
_mesa_DeleteFramebuffers(1, &fbo);
_mesa_reference_framebuffer(&drawFb, NULL);
_mesa_meta_end(ctx);
return success;
}
@ -2961,8 +2943,8 @@ _mesa_meta_CopyTexSubImage(struct gl_context *ctx, GLuint dims,
static void
meta_decompress_fbo_cleanup(struct decompress_fbo_state *decompress_fbo)
{
if (decompress_fbo->FBO != 0) {
_mesa_DeleteFramebuffers(1, &decompress_fbo->FBO);
if (decompress_fbo->fb != NULL) {
_mesa_reference_framebuffer(&decompress_fbo->fb, NULL);
_mesa_reference_renderbuffer(&decompress_fbo->rb, NULL);
}
@ -3065,7 +3047,7 @@ decompress_texture_image(struct gl_context *ctx,
ctx->Texture.Unit[ctx->Texture.CurrentUnit].Sampler);
/* Create/bind FBO/renderbuffer */
if (decompress_fbo->FBO == 0) {
if (decompress_fbo->fb == NULL) {
decompress_fbo->rb = ctx->Driver.NewRenderbuffer(ctx, 0xDEADBEEF);
if (decompress_fbo->rb == NULL) {
_mesa_meta_end(ctx);
@ -3074,20 +3056,25 @@ decompress_texture_image(struct gl_context *ctx,
decompress_fbo->rb->RefCount = 1;
_mesa_GenFramebuffers(1, &decompress_fbo->FBO);
_mesa_BindFramebuffer(GL_FRAMEBUFFER_EXT, decompress_fbo->FBO);
decompress_fbo->fb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (decompress_fbo->fb == NULL) {
_mesa_meta_end(ctx);
return false;
}
_mesa_bind_framebuffers(ctx, decompress_fbo->fb, decompress_fbo->fb);
_mesa_framebuffer_renderbuffer(ctx, ctx->DrawBuffer, GL_COLOR_ATTACHMENT0,
decompress_fbo->rb);
}
else {
_mesa_BindFramebuffer(GL_FRAMEBUFFER_EXT, decompress_fbo->FBO);
_mesa_bind_framebuffers(ctx, decompress_fbo->fb, decompress_fbo->fb);
}
/* alloc dest surface */
if (width > decompress_fbo->Width || height > decompress_fbo->Height) {
_mesa_renderbuffer_storage(ctx, decompress_fbo->rb, rbFormat,
width, height, 0);
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE) {
/* If the framebuffer isn't complete then we'll leave
* decompress_fbo->Width as zero so that it will fail again next time
@ -3434,10 +3421,11 @@ cleartexsubimage_color(struct gl_context *ctx,
GLenum datatype;
GLenum status;
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
texImage, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_COLOR_ATTACHMENT0,
texImage, zoffset);
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
return false;
@ -3481,14 +3469,16 @@ cleartexsubimage_depth_stencil(struct gl_context *ctx,
GLfloat depthValue;
GLenum status;
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_DEPTH_ATTACHMENT,
texImage, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_DEPTH_ATTACHMENT,
texImage, zoffset);
if (texImage->_BaseFormat == GL_DEPTH_STENCIL)
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_STENCIL_ATTACHMENT,
texImage, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_STENCIL_ATTACHMENT,
texImage, zoffset);
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
return false;
@ -3526,11 +3516,14 @@ cleartexsubimage_for_zoffset(struct gl_context *ctx,
GLint zoffset,
const GLvoid *clearValue)
{
GLuint fbo;
struct gl_framebuffer *drawFb;
bool success;
_mesa_GenFramebuffers(1, &fbo);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbo);
drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (drawFb == NULL)
return false;
_mesa_bind_framebuffers(ctx, drawFb, ctx->ReadBuffer);
switch(texImage->_BaseFormat) {
case GL_DEPTH_STENCIL:
@ -3543,7 +3536,7 @@ cleartexsubimage_for_zoffset(struct gl_context *ctx,
break;
}
_mesa_DeleteFramebuffers(1, &fbo);
_mesa_reference_framebuffer(&drawFb, NULL);
return success;
}

14
src/mesa/drivers/common/meta.h
View File

@ -186,7 +186,8 @@ struct save_state
GLboolean RasterDiscard;
GLboolean TransformFeedbackNeedsResume;
GLuint DrawBufferName, ReadBufferName;
struct gl_framebuffer *DrawBuffer;
struct gl_framebuffer *ReadBuffer;
/** MESA_META_DRAW_BUFFERS */
GLenum ColorDrawBuffers[MAX_DRAW_BUFFERS];
@ -368,7 +369,7 @@ struct gen_mipmap_state
{
GLuint VAO;
struct gl_buffer_object *buf_obj;
GLuint FBO;
struct gl_framebuffer *fb;
struct gl_sampler_object *samp_obj;
struct blit_shader_table shaders;
@ -381,7 +382,7 @@ struct gen_mipmap_state
struct decompress_fbo_state
{
struct gl_renderbuffer *rb;
GLuint FBO;
struct gl_framebuffer *fb;
GLint Width, Height;
};
@ -661,7 +662,10 @@ _mesa_meta_glsl_generate_mipmap_cleanup(struct gl_context *ctx,
struct gen_mipmap_state *mipmap);
void
_mesa_meta_bind_fbo_image(GLenum target, GLenum attachment,
struct gl_texture_image *texImage, GLuint layer);
_mesa_meta_framebuffer_texture_image(struct gl_context *ctx,
struct gl_framebuffer *fb,
GLenum attachment,
struct gl_texture_image *texImage,
GLuint layer);
#endif /* META_H */

31
src/mesa/drivers/common/meta_copy_image.c
View File

@ -30,6 +30,7 @@
#include "teximage.h"
#include "texobj.h"
#include "fbobject.h"
#include "framebuffer.h"
#include "buffers.h"
#include "state.h"
#include "mtypes.h"
@ -166,7 +167,8 @@ _mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
GLint src_internal_format, dst_internal_format;
GLuint src_view_texture = 0;
struct gl_texture_image *src_view_tex_image;
GLuint fbos[2];
struct gl_framebuffer *readFb;
struct gl_framebuffer *drawFb;
bool success = false;
GLbitfield mask;
GLenum status, attachment;
@ -210,9 +212,15 @@ _mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
/* We really only need to stash the bound framebuffers and scissor. */
_mesa_meta_begin(ctx, MESA_META_SCISSOR);
_mesa_GenFramebuffers(2, fbos);
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbos[1]);
readFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (readFb == NULL)
goto meta_end;
drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (drawFb == NULL)
goto meta_end;
_mesa_bind_framebuffers(ctx, drawFb, readFb);
switch (_mesa_get_format_base_format(src_format)) {
case GL_DEPTH_COMPONENT:
@ -238,14 +246,14 @@ _mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
/* Prefer the tex image because, even if we have a renderbuffer, we may
* have had to wrap it in a texture view.
*/
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, attachment,
src_view_tex_image, src_z);
_mesa_meta_framebuffer_texture_image(ctx, ctx->ReadBuffer, attachment,
src_view_tex_image, src_z);
} else {
_mesa_framebuffer_renderbuffer(ctx, ctx->ReadBuffer, attachment,
src_renderbuffer);
}
status = _mesa_CheckFramebufferStatus(GL_READ_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->ReadBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto meta_end;
@ -253,11 +261,11 @@ _mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
_mesa_framebuffer_renderbuffer(ctx, ctx->DrawBuffer, attachment,
dst_renderbuffer);
} else {
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, attachment,
dst_tex_image, dst_z);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer, attachment,
dst_tex_image, dst_z);
}
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto meta_end;
@ -281,7 +289,8 @@ _mesa_meta_CopyImageSubData_uncompressed(struct gl_context *ctx,
success = true;
meta_end:
_mesa_DeleteFramebuffers(2, fbos);
_mesa_reference_framebuffer(&readFb, NULL);
_mesa_reference_framebuffer(&drawFb, NULL);
_mesa_meta_end(ctx);
cleanup:

46
src/mesa/drivers/common/meta_generate_mipmap.c
View File

@ -35,6 +35,7 @@
#include "main/enums.h"
#include "main/enable.h"
#include "main/fbobject.h"
#include "main/framebuffer.h"
#include "main/macros.h"
#include "main/mipmap.h"
#include "main/teximage.h"
@ -56,21 +57,11 @@ static bool
fallback_required(struct gl_context *ctx, GLenum target,
struct gl_texture_object *texObj)
{
const GLuint fboSave = ctx->DrawBuffer->Name;
struct gen_mipmap_state *mipmap = &ctx->Meta->Mipmap;
struct gl_texture_image *baseImage;
GLuint srcLevel;
GLenum status;
/* GL_DRAW_FRAMEBUFFER does not exist in OpenGL ES 1.x, and since
* _mesa_meta_begin hasn't been called yet, we have to work-around API
* difficulties. The whole reason that GL_DRAW_FRAMEBUFFER is used instead
* of GL_FRAMEBUFFER is that the read framebuffer may be different. This
* is moot in OpenGL ES 1.x.
*/
const GLenum fbo_target = ctx->API == API_OPENGLES
? GL_FRAMEBUFFER : GL_DRAW_FRAMEBUFFER;
/* check for fallbacks */
if (target == GL_TEXTURE_3D) {
_mesa_perf_debug(ctx, MESA_DEBUG_SEVERITY_HIGH,
@ -109,16 +100,19 @@ fallback_required(struct gl_context *ctx, GLenum target,
/*
* Test that we can actually render in the texture's format.
*/
if (!mipmap->FBO)
_mesa_GenFramebuffers(1, &mipmap->FBO);
_mesa_BindFramebuffer(fbo_target, mipmap->FBO);
if (mipmap->fb == NULL) {
mipmap->fb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (mipmap->fb == NULL) {
_mesa_perf_debug(ctx, MESA_DEBUG_SEVERITY_HIGH,
"glGenerateMipmap() ran out of memory\n");
return true;
}
}
_mesa_meta_bind_fbo_image(fbo_target, GL_COLOR_ATTACHMENT0, baseImage, 0);
status = _mesa_CheckFramebufferStatus(fbo_target);
_mesa_BindFramebuffer(fbo_target, fboSave);
_mesa_meta_framebuffer_texture_image(ctx, mipmap->fb,
GL_COLOR_ATTACHMENT0, baseImage, 0);
status = _mesa_check_framebuffer_status(ctx, mipmap->fb);
if (status != GL_FRAMEBUFFER_COMPLETE_EXT) {
_mesa_perf_debug(ctx, MESA_DEBUG_SEVERITY_HIGH,
"glGenerateMipmap() got incomplete FBO\n");
@ -138,11 +132,7 @@ _mesa_meta_glsl_generate_mipmap_cleanup(struct gl_context *ctx,
mipmap->VAO = 0;
_mesa_reference_buffer_object(ctx, &mipmap->buf_obj, NULL);
_mesa_reference_sampler_object(ctx, &mipmap->samp_obj, NULL);
if (mipmap->FBO != 0) {
_mesa_DeleteFramebuffers(1, &mipmap->FBO);
mipmap->FBO = 0;
}
_mesa_reference_framebuffer(&mipmap->fb, NULL);
_mesa_meta_blit_shader_table_cleanup(&mipmap->shaders);
}
@ -251,8 +241,8 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target,
_mesa_bind_sampler(ctx, ctx->Texture.CurrentUnit, mipmap->samp_obj);
assert(mipmap->FBO != 0);
_mesa_BindFramebuffer(GL_FRAMEBUFFER_EXT, mipmap->FBO);
assert(mipmap->fb != NULL);
_mesa_bind_framebuffers(ctx, mipmap->fb, mipmap->fb);
_mesa_texture_parameteriv(ctx, texObj, GL_GENERATE_MIPMAP, &always_false, false);
@ -354,10 +344,12 @@ _mesa_meta_GenerateMipmap(struct gl_context *ctx, GLenum target,
_mesa_buffer_data(ctx, mipmap->buf_obj, GL_NONE, sizeof(verts), verts,
GL_DYNAMIC_DRAW, __func__);
_mesa_meta_bind_fbo_image(GL_FRAMEBUFFER, GL_COLOR_ATTACHMENT0, dstImage, layer);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_COLOR_ATTACHMENT0, dstImage,
layer);
/* sanity check */
if (_mesa_CheckFramebufferStatus(GL_FRAMEBUFFER) !=
if (_mesa_check_framebuffer_status(ctx, ctx->DrawBuffer) !=
GL_FRAMEBUFFER_COMPLETE) {
_mesa_problem(ctx, "Unexpected incomplete framebuffer in "
"_mesa_meta_GenerateMipmap()");

76
src/mesa/drivers/common/meta_tex_subimage.c
View File

@ -30,6 +30,7 @@
#include "buffers.h"
#include "clear.h"
#include "fbobject.h"
#include "framebuffer.h"
#include "glformats.h"
#include "glheader.h"
#include "image.h"
@ -178,7 +179,9 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
const struct gl_pixelstore_attrib *packing)
{
struct gl_buffer_object *pbo = NULL;
GLuint pbo_tex = 0, fbos[2] = { 0, 0 };
GLuint pbo_tex = 0;
struct gl_framebuffer *readFb = NULL;
struct gl_framebuffer *drawFb = NULL;
int image_height;
struct gl_texture_image *pbo_tex_image;
GLenum status;
@ -225,9 +228,15 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
_mesa_meta_begin(ctx, ~(MESA_META_PIXEL_TRANSFER |
MESA_META_PIXEL_STORE));
_mesa_GenFramebuffers(2, fbos);
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbos[1]);
readFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (readFb == NULL)
goto fail;
drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (drawFb == NULL)
goto fail;
_mesa_bind_framebuffers(ctx, drawFb, tex_image ? readFb : ctx->ReadBuffer);
if (tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
assert(depth == 1);
@ -239,17 +248,19 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
yoffset = 0;
}
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
pbo_tex_image, 0);
_mesa_meta_framebuffer_texture_image(ctx, ctx->ReadBuffer,
GL_COLOR_ATTACHMENT0,
pbo_tex_image, 0);
/* If this passes on the first layer it should pass on the others */
status = _mesa_CheckFramebufferStatus(GL_READ_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->ReadBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto fail;
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_COLOR_ATTACHMENT0,
tex_image, zoffset);
/* If this passes on the first layer it should pass on the others */
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto fail;
@ -263,8 +274,9 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
goto fail;
for (z = 1; z < depth; z++) {
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_update_state(ctx);
@ -279,7 +291,8 @@ _mesa_meta_pbo_TexSubImage(struct gl_context *ctx, GLuint dims,
success = true;
fail:
_mesa_DeleteFramebuffers(2, fbos);
_mesa_reference_framebuffer(&readFb, NULL);
_mesa_reference_framebuffer(&drawFb, NULL);
_mesa_DeleteTextures(1, &pbo_tex);
_mesa_reference_buffer_object(ctx, &pbo, NULL);
@ -297,7 +310,9 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
const struct gl_pixelstore_attrib *packing)
{
struct gl_buffer_object *pbo = NULL;
GLuint pbo_tex = 0, fbos[2] = { 0, 0 };
GLuint pbo_tex = 0;
struct gl_framebuffer *readFb;
struct gl_framebuffer *drawFb;
int image_height;
struct gl_texture_image *pbo_tex_image;
struct gl_renderbuffer *rb = NULL;
@ -360,7 +375,13 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
if (ctx->Extensions.ARB_color_buffer_float)
_mesa_ClampColor(GL_CLAMP_FRAGMENT_COLOR, GL_FALSE);
_mesa_GenFramebuffers(2, fbos);
readFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (readFb == NULL)
goto fail;
drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (drawFb == NULL)
goto fail;
if (tex_image && tex_image->TexObject->Target == GL_TEXTURE_1D_ARRAY) {
assert(depth == 1);
@ -376,23 +397,24 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
* we're doing a ReadPixels and we should just use whatever framebuffer
* the client has bound.
*/
_mesa_bind_framebuffers(ctx, drawFb, tex_image ? readFb : ctx->ReadBuffer);
if (tex_image) {
_mesa_BindFramebuffer(GL_READ_FRAMEBUFFER, fbos[0]);
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset);
_mesa_meta_framebuffer_texture_image(ctx, ctx->ReadBuffer,
GL_COLOR_ATTACHMENT0,
tex_image, zoffset);
/* If this passes on the first layer it should pass on the others */
status = _mesa_CheckFramebufferStatus(GL_READ_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->ReadBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto fail;
} else {
assert(depth == 1);
}
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbos[1]);
_mesa_meta_bind_fbo_image(GL_DRAW_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
pbo_tex_image, 0);
_mesa_meta_framebuffer_texture_image(ctx, ctx->DrawBuffer,
GL_COLOR_ATTACHMENT0,
pbo_tex_image, 0);
/* If this passes on the first layer it should pass on the others */
status = _mesa_CheckFramebufferStatus(GL_DRAW_FRAMEBUFFER);
status = _mesa_check_framebuffer_status(ctx, ctx->DrawBuffer);
if (status != GL_FRAMEBUFFER_COMPLETE)
goto fail;
@ -427,8 +449,9 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
}
for (z = 1; z < depth; z++) {
_mesa_meta_bind_fbo_image(GL_READ_FRAMEBUFFER, GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_meta_framebuffer_texture_image(ctx, ctx->ReadBuffer,
GL_COLOR_ATTACHMENT0,
tex_image, zoffset + z);
_mesa_update_state(ctx);
@ -452,7 +475,8 @@ _mesa_meta_pbo_GetTexSubImage(struct gl_context *ctx, GLuint dims,
success = true;
fail:
_mesa_DeleteFramebuffers(2, fbos);
_mesa_reference_framebuffer(&drawFb, NULL);
_mesa_reference_framebuffer(&readFb, NULL);
_mesa_DeleteTextures(1, &pbo_tex);
_mesa_reference_buffer_object(ctx, &pbo, NULL);

5
src/mesa/drivers/dri/Android.mk
View File

@ -28,9 +28,6 @@ include $(LOCAL_PATH)/common/Makefile.sources
#-----------------------------------------------
# Variables common to all DRI drivers
MESA_DRI_MODULE_PATH := $(TARGET_OUT_SHARED_LIBRARIES)/dri
MESA_DRI_MODULE_UNSTRIPPED_PATH := $(TARGET_OUT_SHARED_LIBRARIES_UNSTRIPPED)/dri
MESA_DRI_CFLAGS := \
-DHAVE_ANDROID_PLATFORM
@ -42,6 +39,8 @@ MESA_DRI_C_INCLUDES := \
MESA_DRI_WHOLE_STATIC_LIBRARIES := \
libmesa_glsl \
libmesa_compiler \
libmesa_nir \
libmesa_megadriver_stub \
libmesa_dri_common \
libmesa_dricore \

22
src/mesa/drivers/dri/common/Android.mk
View File

@ -74,20 +74,24 @@ $(intermediates)/xmlpool/%.po: $(LOCAL_PATH)/xmlpool/%.po $(POT)
sed -i -e 's/charset=.*\\n/charset=UTF-8\\n/' $@; \
fi
$(intermediates)/xmlpool/%/LC_MESSAGES/options.mo: $(intermediates)/xmlpool/%.po
PRIVATE_SCRIPT := $(LOCAL_PATH)/xmlpool/gen_xmlpool.py
PRIVATE_LOCALEDIR := $(intermediates)/xmlpool
PRIVATE_TEMPLATE_HEADER := $(LOCAL_PATH)/xmlpool/t_options.h
PRIVATE_MO_FILES := $(MESA_DRI_OPTIONS_LANGS:%=$(intermediates)/xmlpool/%/LC_MESSAGES/options.mo)
LOCAL_GENERATED_SOURCES += $(PRIVATE_MO_FILES)
$(PRIVATE_MO_FILES): $(intermediates)/xmlpool/%/LC_MESSAGES/options.mo: $(intermediates)/xmlpool/%.po
mkdir -p $(dir $@)
msgfmt -o $@ $<
$(MESA_DRI_OPTIONS_H): PRIVATE_SCRIPT := $(LOCAL_PATH)/xmlpool/gen_xmlpool.py
$(MESA_DRI_OPTIONS_H): PRIVATE_LOCALEDIR := $(intermediates)/xmlpool
$(MESA_DRI_OPTIONS_H): PRIVATE_TEMPLATE_HEADER := $(LOCAL_PATH)/xmlpool/t_options.h
$(MESA_DRI_OPTIONS_H): PRIVATE_MO_FILES := $(MESA_DRI_OPTIONS_LANGS:%=$(intermediates)/xmlpool/%/LC_MESSAGES/options.mo)
.SECONDEXPANSION:
$(MESA_DRI_OPTIONS_H): $$(PRIVATE_SCRIPT) $$(PRIVATE_TEMPLATE_HEADER) $$(PRIVATE_MO_FILES)
@mkdir -p $(dir $@)
$(hide) $(MESA_PYTHON2) $(PRIVATE_SCRIPT) $(PRIVATE_TEMPLATE_HEADER) \
$(LOCAL_GENERATED_SOURCES): PRIVATE_PYTHON := $(MESA_PYTHON2)
$(LOCAL_GENERATED_SOURCES): PRIVATE_CUSTOM_TOOL = $(PRIVATE_PYTHON) $^ $(PRIVATE_TEMPLATE_HEADER) \
$(PRIVATE_LOCALEDIR) $(MESA_DRI_OPTIONS_LANGS) > $@
$(MESA_DRI_OPTIONS_H): $(PRIVATE_SCRIPT) $(PRIVATE_TEMPLATE_HEADER) $(PRIVATE_MO_FILES)
$(transform-generated-source)
include $(MESA_COMMON_MK)
include $(BUILD_STATIC_LIBRARY)

5
src/mesa/drivers/dri/i915/Android.mk
View File

@ -27,7 +27,7 @@ include $(CLEAR_VARS)
LOCAL_MODULE := i915_dri
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_MODULE_RELATIVE_PATH := $(notdir $(MESA_DRI_MODULE_PATH))
LOCAL_MODULE_RELATIVE_PATH := $(MESA_DRI_MODULE_REL_PATH)
else
LOCAL_MODULE_PATH := $(MESA_DRI_MODULE_PATH)
LOCAL_UNSTRIPPED_PATH := $(MESA_DRI_MODULE_UNSTRIPPED_PATH)
@ -54,7 +54,8 @@ LOCAL_SHARED_LIBRARIES := \
libdrm_intel
LOCAL_GENERATED_SOURCES := \
$(MESA_DRI_OPTIONS_H)
$(MESA_DRI_OPTIONS_H) \
$(MESA_GEN_NIR_H)
include $(MESA_COMMON_MK)
include $(BUILD_SHARED_LIBRARY)

1
src/mesa/drivers/dri/i915/i915_context.c
View File

@ -254,7 +254,6 @@ i915CreateContext(int api,
/* FINISHME: Are there other options that should be enabled for software
* FINISHME: vertex shaders?
*/
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitCondCodes = true;
ctx->Const.ShaderCompilerOptions[MESA_SHADER_VERTEX].EmitNoIndirectSampler =
true;

20
src/mesa/drivers/dri/i915/i915_fragprog.c
View File

@ -598,26 +598,6 @@ upload_program(struct i915_fragment_program *p)
0, src0, T0_TEXKILL);
break;
case OPCODE_KIL_NV:
if (inst->DstReg.CondMask == COND_TR) {
tmp = i915_get_utemp(p);
/* The KIL instruction discards the fragment if any component of
* the source is < 0. Emit an immediate operand of {-1}.xywz.
*/
i915_emit_texld(p, get_live_regs(p, inst),
tmp, A0_DEST_CHANNEL_ALL,
0, /* use a dummy dest reg */
negate(swizzle(tmp, ONE, ONE, ONE, ONE),
1, 1, 1, 1),
T0_TEXKILL);
} else {
p->error = 1;
i915_program_error(p, "Unsupported KIL_NV condition code: %d",
inst->DstReg.CondMask);
}
break;
case OPCODE_LG2:
src0 = src_vector(p, &inst->SrcReg[0], program);

5
src/mesa/drivers/dri/i965/Android.mk
View File

@ -27,7 +27,7 @@ include $(CLEAR_VARS)
LOCAL_MODULE := i965_dri
ifeq ($(MESA_LOLLIPOP_BUILD),true)
LOCAL_MODULE_RELATIVE_PATH := $(notdir $(MESA_DRI_MODULE_PATH))
LOCAL_MODULE_RELATIVE_PATH := $(MESA_DRI_MODULE_REL_PATH)
else
LOCAL_MODULE_PATH := $(MESA_DRI_MODULE_PATH)
LOCAL_UNSTRIPPED_PATH := $(MESA_DRI_MODULE_UNSTRIPPED_PATH)
@ -59,7 +59,8 @@ LOCAL_SHARED_LIBRARIES := \
libdrm_intel
LOCAL_GENERATED_SOURCES := \
$(MESA_DRI_OPTIONS_H)
$(MESA_DRI_OPTIONS_H) \
$(MESA_GEN_NIR_H)
include $(MESA_COMMON_MK)
include $(BUILD_SHARED_LIBRARY)

1
src/mesa/drivers/dri/i965/brw_compiler.c
View File

@ -144,7 +144,6 @@ brw_compiler_create(void *mem_ctx, const struct brw_device_info *devinfo)
compiler->glsl_compiler_options[i].MaxIfDepth =
devinfo->gen < 6 ? 16 : UINT_MAX;
compiler->glsl_compiler_options[i].EmitCondCodes = true;
compiler->glsl_compiler_options[i].EmitNoNoise = true;
compiler->glsl_compiler_options[i].EmitNoMainReturn = true;
compiler->glsl_compiler_options[i].EmitNoIndirectInput = true;

86
src/mesa/drivers/dri/i965/brw_dead_control_flow.cpp
View File

@ -32,8 +32,8 @@
/* Look for and eliminate dead control flow:
*
* - if/endif
* . else in else/endif
* - if/else/endif
* - else in else/endif
* - then in if/else/endif
*/
bool
dead_control_flow_eliminate(backend_shader *s)
@ -41,61 +41,42 @@ dead_control_flow_eliminate(backend_shader *s)
bool progress = false;
foreach_block_safe (block, s->cfg) {
bblock_t *if_block = NULL, *else_block = NULL, *endif_block = block;
bool found = false;
bblock_t *prev_block = block->prev();
backend_instruction *const inst = block->start();
backend_instruction *const prev_inst = prev_block->end();
/* ENDIF instructions, by definition, can only be found at the start of
* basic blocks.
*/
backend_instruction *endif_inst = endif_block->start();
if (endif_inst->opcode != BRW_OPCODE_ENDIF)
continue;
if (inst->opcode == BRW_OPCODE_ENDIF &&
prev_inst->opcode == BRW_OPCODE_ELSE) {
bblock_t *const else_block = prev_block;
backend_instruction *const else_inst = prev_inst;
backend_instruction *if_inst = NULL, *else_inst = NULL;
backend_instruction *prev_inst = endif_block->prev()->end();
if (prev_inst->opcode == BRW_OPCODE_ELSE) {
else_inst = prev_inst;
else_block = endif_block->prev();
found = true;
else_inst->remove(else_block);
progress = true;
} else if (inst->opcode == BRW_OPCODE_ENDIF &&
prev_inst->opcode == BRW_OPCODE_IF) {
bblock_t *const endif_block = block;
bblock_t *const if_block = prev_block;
backend_instruction *const endif_inst = inst;
backend_instruction *const if_inst = prev_inst;
if (else_block->start_ip == else_block->end_ip)
prev_inst = else_block->prev()->end();
}
if (prev_inst->opcode == BRW_OPCODE_IF) {
if_inst = prev_inst;
if_block = else_block != NULL ? else_block->prev()
: endif_block->prev();
found = true;
} else {
/* Don't remove the ENDIF if we didn't find a dead IF. */
endif_inst = NULL;
}
if (found) {
bblock_t *earlier_block = NULL, *later_block = NULL;
if (if_inst) {
if (if_block->start_ip == if_block->end_ip) {
earlier_block = if_block->prev();
} else {
earlier_block = if_block;
}
if_inst->remove(if_block);
if (if_block->start_ip == if_block->end_ip) {
earlier_block = if_block->prev();
} else {
earlier_block = if_block;
}
if_inst->remove(if_block);
if (else_inst) {
else_inst->remove(else_block);
}
if (endif_inst) {
if (endif_block->start_ip == endif_block->end_ip) {
later_block = endif_block->next();
} else {
later_block = endif_block;
}
endif_inst->remove(endif_block);
if (endif_block->start_ip == endif_block->end_ip) {
later_block = endif_block->next();
} else {
later_block = endif_block;
}
endif_inst->remove(endif_block);
assert((earlier_block == NULL) == (later_block == NULL));
if (earlier_block && earlier_block->can_combine_with(later_block)) {
@ -110,6 +91,19 @@ dead_control_flow_eliminate(backend_shader *s)
}
}
progress = true;
} else if (inst->opcode == BRW_OPCODE_ELSE &&
prev_inst->opcode == BRW_OPCODE_IF) {
bblock_t *const else_block = block;
backend_instruction *const if_inst = prev_inst;
backend_instruction *const else_inst = inst;
/* Since the else-branch is becoming the new then-branch, the
* condition has to be inverted.
*/
if_inst->predicate_inverse = !if_inst->predicate_inverse;
else_inst->remove(else_block);
progress = true;
}
}

5
src/mesa/drivers/dri/i965/brw_eu_emit.c
View File

@ -2526,6 +2526,8 @@ brw_send_indirect_message(struct brw_codegen *p,
struct brw_inst *send;
int setup;
dst = retype(dst, BRW_REGISTER_TYPE_UW);
assert(desc.type == BRW_REGISTER_TYPE_UD);
/* We hold on to the setup instruction (the SEND in the direct case, the OR
@ -3207,6 +3209,7 @@ brw_memory_fence(struct brw_codegen *p,
* message doesn't write anything back.
*/
insn = next_insn(p, BRW_OPCODE_SEND);
dst = retype(dst, BRW_REGISTER_TYPE_UW);
brw_set_dest(p, insn, dst);
brw_set_src0(p, insn, dst);
brw_set_memory_fence_message(p, insn, GEN7_SFID_DATAPORT_DATA_CACHE,
@ -3473,7 +3476,7 @@ brw_barrier(struct brw_codegen *p, struct brw_reg src)
assert(devinfo->gen >= 7);
inst = next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, inst, brw_null_reg());
brw_set_dest(p, inst, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW));
brw_set_src0(p, inst, src);
brw_set_src1(p, inst, brw_null_reg());

4
src/mesa/drivers/dri/i965/brw_fs.cpp
View File

@ -5643,8 +5643,8 @@ brw_compile_fs(const struct brw_compiler *compiler, void *log_data,
nir_shader *shader = nir_shader_clone(mem_ctx, src_shader);
shader = brw_nir_apply_sampler_key(shader, compiler->devinfo, &key->tex,
true);
shader = brw_nir_lower_io(shader, compiler->devinfo, true,
false, NULL);
brw_nir_lower_fs_inputs(shader);
brw_nir_lower_fs_outputs(shader);
shader = brw_postprocess_nir(shader, compiler->devinfo, true);
/* key->alpha_test_func means simulating alpha testing via discards,

2
src/mesa/drivers/dri/i965/brw_fs_cse.cpp
View File

@ -139,6 +139,8 @@ operands_match(const fs_inst *a, const fs_inst *b, bool *negate)
ys[1].f = ys1_imm;
*negate = (xs0_negate != xs1_negate) != (ys0_negate != ys1_negate);
if (*negate && (a->saturate || b->saturate))
return false;
return ret;
} else if (!a->is_commutative()) {
bool match = true;

2
src/mesa/drivers/dri/i965/brw_fs_generator.cpp
View File

@ -455,7 +455,7 @@ fs_generator::generate_cs_terminate(fs_inst *inst, struct brw_reg payload)
insn = brw_next_insn(p, BRW_OPCODE_SEND);
brw_set_dest(p, insn, brw_null_reg());
brw_set_dest(p, insn, retype(brw_null_reg(), BRW_REGISTER_TYPE_UW));
brw_set_src0(p, insn, payload);
brw_set_src1(p, insn, brw_imm_d(0));

32
src/mesa/drivers/dri/i965/brw_fs_saturate_propagation.cpp
View File

@ -56,8 +56,7 @@ opt_saturate_propagation_local(fs_visitor *v, bblock_t *block)
inst->dst.file != VGRF ||
inst->dst.type != inst->src[0].type ||
inst->src[0].file != VGRF ||
inst->src[0].abs ||
inst->src[0].negate)
inst->src[0].abs)
continue;
int src_var = v->live_intervals->var_from_reg(inst->src[0]);
@ -82,6 +81,31 @@ opt_saturate_propagation_local(fs_visitor *v, bblock_t *block)
scan_inst->src[i].type = inst->dst.type;
}
}
if (inst->src[0].negate) {
if (scan_inst->opcode == BRW_OPCODE_MUL) {
scan_inst->src[0].negate = !scan_inst->src[0].negate;
inst->src[0].negate = false;
} else if (scan_inst->opcode == BRW_OPCODE_MAD) {
scan_inst->src[0].negate = !scan_inst->src[0].negate;
scan_inst->src[1].negate = !scan_inst->src[1].negate;
inst->src[0].negate = false;
} else if (scan_inst->opcode == BRW_OPCODE_ADD) {
if (scan_inst->src[1].file == IMM) {
if (!brw_negate_immediate(scan_inst->src[1].type,
&scan_inst->src[1].as_brw_reg())) {
break;
}
} else {
scan_inst->src[1].negate = !scan_inst->src[1].negate;
}
scan_inst->src[0].negate = !scan_inst->src[0].negate;
inst->src[0].negate = false;
} else {
break;
}
}
scan_inst->saturate = true;
inst->saturate = false;
progress = true;
@ -96,7 +120,9 @@ opt_saturate_propagation_local(fs_visitor *v, bblock_t *block)
if (scan_inst->opcode != BRW_OPCODE_MOV ||
!scan_inst->saturate ||
scan_inst->src[0].abs ||
scan_inst->src[0].negate) {
scan_inst->src[0].negate ||
scan_inst->src[0].abs != inst->src[0].abs ||
scan_inst->src[0].negate != inst->src[0].negate) {
interfered = true;
break;
}

14
src/mesa/drivers/dri/i965/brw_meta_fast_clear.c
View File

@ -36,6 +36,7 @@
#include "main/varray.h"
#include "main/uniforms.h"
#include "main/fbobject.h"
#include "main/framebuffer.h"
#include "main/renderbuffer.h"
#include "main/texobj.h"
@ -848,18 +849,23 @@ brw_meta_resolve_color(struct brw_context *brw,
struct intel_mipmap_tree *mt)
{
struct gl_context *ctx = &brw->ctx;
GLuint fbo;
struct gl_framebuffer *drawFb;
struct gl_renderbuffer *rb;
struct rect rect;
brw_emit_mi_flush(brw);
drawFb = ctx->Driver.NewFramebuffer(ctx, 0xDEADBEEF);
if (drawFb == NULL) {
_mesa_error(ctx, GL_OUT_OF_MEMORY, "in %s", __func__);
return;
}
_mesa_meta_begin(ctx, MESA_META_ALL);
_mesa_GenFramebuffers(1, &fbo);
rb = brw_get_rb_for_slice(brw, mt, 0, 0, false);
_mesa_BindFramebuffer(GL_DRAW_FRAMEBUFFER, fbo);
_mesa_bind_framebuffers(ctx, drawFb, ctx->ReadBuffer);
_mesa_framebuffer_renderbuffer(ctx, ctx->DrawBuffer, GL_COLOR_ATTACHMENT0,
rb);
_mesa_DrawBuffer(GL_COLOR_ATTACHMENT0);
@ -888,7 +894,7 @@ brw_meta_resolve_color(struct brw_context *brw,
use_rectlist(brw, false);
_mesa_reference_renderbuffer(&rb, NULL);
_mesa_DeleteFramebuffers(1, &fbo);
_mesa_reference_framebuffer(&drawFb, NULL);
_mesa_meta_end(ctx);

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