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https://gitee.com/openharmony/third_party_mesa3d
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ilo: add ilo_image_can_enable_aux()
It replaces ilo_texture_can_enable_hiz().
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430594c34f
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@ -878,9 +878,8 @@ img_align(struct ilo_image *img, struct ilo_image_params *params)
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align_h = MAX2(align_h, 2);
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/*
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* Depth Buffer Clear/Resolve works in 8x4 sample blocks. In
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* ilo_texture_can_enable_hiz(), we always return true for the first slice.
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* To avoid out-of-bound access, we have to pad.
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* Depth Buffer Clear/Resolve works in 8x4 sample blocks. Pad to allow HiZ
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* for unaligned non-mipmapped and non-array images.
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*/
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if (img->aux.type == ILO_IMAGE_AUX_HIZ &&
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templ->last_level == 0 &&
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@ -179,6 +179,12 @@ ilo_image_set_aux_bo(struct ilo_image *img, struct intel_bo *bo)
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img->aux.bo = intel_bo_ref(bo);
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}
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static inline bool
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ilo_image_can_enable_aux(const struct ilo_image *img, unsigned level)
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{
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return (img->aux.bo && (img->aux.enables & (1 << level)));
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}
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/**
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* Convert from pixel position to 2D memory offset.
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*/
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@ -974,8 +974,7 @@ zs_init_info(const struct ilo_dev *dev,
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* same value (enabled or disabled) as Hierarchical Depth Buffer
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* Enable."
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*/
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separate_stencil =
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ilo_texture_can_enable_hiz(tex, level, first_layer, num_layers);
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separate_stencil = ilo_image_can_enable_aux(&tex->image, level);
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}
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/*
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@ -1073,7 +1072,7 @@ zs_init_info(const struct ilo_dev *dev,
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}
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}
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if (ilo_texture_can_enable_hiz(tex, level, first_layer, num_layers)) {
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if (ilo_image_can_enable_aux(&tex->image, level)) {
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info->hiz.bo = tex->image.aux.bo;
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info->hiz.stride = tex->image.aux.bo_stride;
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@ -166,7 +166,7 @@ ilo_blit_resolve_slices_for_hiz(struct ilo_context *ilo,
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unsigned i;
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assert(tex->base.target != PIPE_BUFFER &&
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ilo_texture_can_enable_hiz(tex, level, first_slice, num_slices));
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ilo_image_can_enable_aux(&tex->image, level));
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if (resolve_flags & ILO_TEXTURE_RENDER_WRITE) {
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/*
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@ -58,10 +58,10 @@ ilo_blit_resolve_slices(struct ilo_context *ilo,
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* As it is only used to resolve HiZ right now, return early when there is
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* no HiZ.
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*/
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if (!ilo_texture_can_enable_hiz(tex, level, first_slice, num_slices))
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if (!ilo_image_can_enable_aux(&tex->image, level))
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return;
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if (ilo_texture_can_enable_hiz(tex, level, first_slice, num_slices)) {
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if (ilo_image_can_enable_aux(&tex->image, level)) {
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ilo_blit_resolve_slices_for_hiz(ilo, res, level,
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first_slice, num_slices, resolve_flags);
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}
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@ -331,9 +331,7 @@ ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
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struct pipe_depth_stencil_alpha_state dsa_state;
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uint32_t uses, clear_value;
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if (!ilo_texture_can_enable_hiz(tex,
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zs->u.tex.level, zs->u.tex.first_layer,
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zs->u.tex.last_layer - zs->u.tex.first_layer + 1))
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if (!ilo_image_can_enable_aux(&tex->image, zs->u.tex.level))
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return false;
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if (!hiz_can_clear_zs(blitter, tex))
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@ -427,7 +425,7 @@ ilo_blitter_rectlist_resolve_z(struct ilo_blitter *blitter,
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const struct ilo_texture_slice *s =
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ilo_texture_get_slice(tex, level, slice);
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if (!ilo_texture_can_enable_hiz(tex, level, slice, 1))
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if (!ilo_image_can_enable_aux(&tex->image, level))
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return;
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/*
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@ -462,7 +460,7 @@ ilo_blitter_rectlist_resolve_hiz(struct ilo_blitter *blitter,
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struct ilo_texture *tex = ilo_texture(res);
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struct pipe_depth_stencil_alpha_state dsa_state;
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if (!ilo_texture_can_enable_hiz(tex, level, slice, 1))
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if (!ilo_image_can_enable_aux(&tex->image, level))
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return;
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/*
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@ -217,7 +217,6 @@ tex_create_hiz(struct ilo_texture *tex)
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const struct pipe_resource *templ = &tex->base;
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struct ilo_screen *is = ilo_screen(tex->base.screen);
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struct intel_bo *bo;
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unsigned lv;
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bo = intel_winsys_alloc_bo(is->dev.winsys, "hiz texture",
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tex->image.aux.bo_stride * tex->image.aux.bo_height, false);
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@ -226,17 +225,18 @@ tex_create_hiz(struct ilo_texture *tex)
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ilo_image_set_aux_bo(&tex->image, bo);
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for (lv = 0; lv <= templ->last_level; lv++) {
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if (tex->image.aux.enables & (1 << lv)) {
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const unsigned num_slices = (templ->target == PIPE_TEXTURE_3D) ?
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u_minify(templ->depth0, lv) : templ->array_size;
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unsigned flags = ILO_TEXTURE_HIZ;
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if (tex->imported) {
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unsigned lv;
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/* this will trigger a HiZ resolve */
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if (tex->imported)
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flags |= ILO_TEXTURE_CPU_WRITE;
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for (lv = 0; lv <= templ->last_level; lv++) {
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if (tex->image.aux.enables & (1 << lv)) {
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const unsigned num_slices = (templ->target == PIPE_TEXTURE_3D) ?
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u_minify(templ->depth0, lv) : templ->array_size;
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/* this will trigger HiZ resolves */
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const unsigned flags = ILO_TEXTURE_CPU_WRITE;
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ilo_texture_set_slice_flags(tex, lv, 0, num_slices, flags, flags);
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ilo_texture_set_slice_flags(tex, lv, 0, num_slices, flags, flags);
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}
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}
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}
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@ -66,16 +66,6 @@ enum ilo_texture_flags {
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* flags, the slice has been cleared to ilo_texture_slice::clear_value.
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*/
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ILO_TEXTURE_CLEAR = 1 << 6,
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/*
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* Set when HiZ can be enabled.
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*
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* It is never set in resolve flags. When set in slice flags, the slice
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* can have HiZ enabled. It is to be noted that this bit is always set for
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* either all or none of the slices in a level, allowing quick check in
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* case of layered rendering.
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*/
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ILO_TEXTURE_HIZ = 1 << 7,
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};
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/**
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@ -189,18 +179,4 @@ ilo_texture_set_slice_clear_value(struct ilo_texture *tex, unsigned level,
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}
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}
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static inline bool
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ilo_texture_can_enable_hiz(const struct ilo_texture *tex, unsigned level,
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unsigned first_slice, unsigned num_slices)
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{
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/*
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* Either all or none of the slices in the same level have ILO_TEXTURE_HIZ
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* set. It suffices to check only the first slice.
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*/
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const struct ilo_texture_slice *slice =
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ilo_texture_get_slice(tex, level, 0);
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return (tex->image.aux.bo && (slice->flags & ILO_TEXTURE_HIZ));
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}
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#endif /* ILO_RESOURCE_H */
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@ -96,8 +96,7 @@ resource_get_transfer_method(struct pipe_resource *res,
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if (tex->image.tiling == GEN8_TILING_W || tex->separate_s8) {
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/* on GEN6, separate stencil is enabled only when HiZ is */
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if (ilo_dev_gen(&is->dev) >= ILO_GEN(7) ||
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ilo_texture_can_enable_hiz(tex, transfer->level,
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transfer->box.z, transfer->box.depth)) {
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ilo_image_can_enable_aux(&tex->image, transfer->level)) {
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m = ILO_TRANSFER_MAP_SW_ZS;
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need_convert = true;
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}
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