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winsys/amdgpu: finish up SI addrlib integration

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Reviewed-by: Edward O'Callaghan <funfunctor@folklore1984.net>
This commit is contained in:
Marek Olšák 2016-08-19 01:40:29 +02:00
parent 97b55243fb
commit a6869e7c06
1 changed files with 25 additions and 5 deletions
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22
src/gallium/winsys/amdgpu/drm/amdgpu_surface.c
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@ -369,7 +369,8 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
* - Mipmapped array textures have low performance (discovered by a closed
* driver team).
*/
AddrSurfInfoIn.flags.dccCompatible = !(surf->flags & RADEON_SURF_Z_OR_SBUFFER) &&
AddrSurfInfoIn.flags.dccCompatible = ws->info.chip_class >= VI &&
!(surf->flags & RADEON_SURF_Z_OR_SBUFFER) &&
!(surf->flags & RADEON_SURF_DISABLE_DCC) &&
!compressed && AddrDccIn.numSamples <= 1 &&
((surf->array_size == 1 && surf->npix_z == 1) ||
@ -414,11 +415,30 @@ static int amdgpu_surface_init(struct radeon_winsys *rws,
assert(!(surf->flags & RADEON_SURF_Z_OR_SBUFFER));
assert(AddrSurfInfoIn.tileMode == ADDR_TM_2D_TILED_THIN1);
if (ws->info.chip_class == SI) {
if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE) {
if (surf->bpe == 2)
AddrSurfInfoIn.tileIndex = 11; /* 16bpp */
else
AddrSurfInfoIn.tileIndex = 12; /* 32bpp */
} else {
if (surf->bpe == 1)
AddrSurfInfoIn.tileIndex = 14; /* 8bpp */
else if (surf->bpe == 2)
AddrSurfInfoIn.tileIndex = 15; /* 16bpp */
else if (surf->bpe == 4)
AddrSurfInfoIn.tileIndex = 16; /* 32bpp */
else
AddrSurfInfoIn.tileIndex = 17; /* 64bpp (and 128bpp) */
}
} else {
/* CIK - VI */
if (AddrSurfInfoIn.tileType == ADDR_DISPLAYABLE)
AddrSurfInfoIn.tileIndex = 10; /* 2D displayable */
else
AddrSurfInfoIn.tileIndex = 14; /* 2D non-displayable */
}
}
surf->bo_size = 0;
surf->dcc_size = 0;