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ilo: move ilo_layout.[ch] to core as ilo_image.[ch]

Browse Source 
Move files and s/layout/image/.
This commit is contained in:
Chia-I Wu 2015-03-08 13:39:02 +08:00
parent 8252765532
commit ac47563cb4
11 changed files with 486 additions and 484 deletions
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4
src/gallium/drivers/ilo/Makefile.sources
View File

@ -7,6 +7,8 @@ C_SOURCES := \
core/ilo_format.c \
core/ilo_format.h \
core/ilo_fence.h \
core/ilo_image.c \
core/ilo_image.h \
core/intel_winsys.h \
ilo_blit.c \
ilo_blit.h \
@ -34,8 +36,6 @@ C_SOURCES := \
ilo_draw.h \
ilo_gpgpu.c \
ilo_gpgpu.h \
ilo_layout.c \
ilo_layout.h \
ilo_public.h \
ilo_query.c \
ilo_query.h \

551
src/gallium/drivers/ilo/ilo_layout.c → src/gallium/drivers/ilo/core/ilo_image.c
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File diff suppressed because it is too large Load Diff

154
src/gallium/drivers/ilo/ilo_layout.h → src/gallium/drivers/ilo/core/ilo_image.h
View File

@ -25,50 +25,51 @@
* Chia-I Wu <olv@lunarg.com>
*/
#ifndef ILO_LAYOUT_H
#define ILO_LAYOUT_H
#ifndef ILO_IMAGE_H
#define ILO_IMAGE_H
#include "genhw/genhw.h"
#include "ilo_common.h"
#include "ilo_core.h"
#include "ilo_dev.h"
struct pipe_resource;
enum ilo_layout_walk_type {
enum ilo_image_walk_type {
/*
* Array layers of an LOD are packed together vertically. This maps to
* ARYSPC_LOD0 for non-mipmapped 2D textures, and is extended to support
* mipmapped stencil textures and HiZ on GEN6.
*/
ILO_LAYOUT_WALK_LOD,
ILO_IMAGE_WALK_LOD,
/*
* LODs of an array layer are packed together. This maps to ARYSPC_FULL
* and is used for mipmapped 2D textures.
*/
ILO_LAYOUT_WALK_LAYER,
ILO_IMAGE_WALK_LAYER,
/*
* 3D slices of an LOD are packed together, horizontally with wrapping.
* Used for 3D textures.
*/
ILO_LAYOUT_WALK_3D,
ILO_IMAGE_WALK_3D,
};
enum ilo_layout_aux_type {
ILO_LAYOUT_AUX_NONE,
ILO_LAYOUT_AUX_HIZ,
ILO_LAYOUT_AUX_MCS,
enum ilo_image_aux_type {
ILO_IMAGE_AUX_NONE,
ILO_IMAGE_AUX_HIZ,
ILO_IMAGE_AUX_MCS,
};
struct ilo_layout_lod {
struct ilo_image_lod {
/* physical position */
unsigned x;
unsigned y;
/*
* Physical size of an LOD slice. There may be multiple slices when the
* walk type is not ILO_LAYOUT_WALK_LAYER.
* walk type is not ILO_IMAGE_WALK_LAYER.
*/
unsigned slice_width;
unsigned slice_height;
@ -77,8 +78,8 @@ struct ilo_layout_lod {
/**
* Texture layout.
*/
struct ilo_layout {
enum ilo_layout_aux_type aux;
struct ilo_image {
enum ilo_image_aux_type aux;
/* physical width0, height0, and format */
unsigned width0;
@ -94,7 +95,7 @@ struct ilo_layout {
unsigned block_height;
unsigned block_size;
enum ilo_layout_walk_type walk;
enum ilo_image_walk_type walk;
bool interleaved_samples;
/* bitmask of valid tiling modes */
@ -105,9 +106,9 @@ struct ilo_layout {
unsigned align_i;
unsigned align_j;
struct ilo_layout_lod lods[PIPE_MAX_TEXTURE_LEVELS];
struct ilo_image_lod lods[PIPE_MAX_TEXTURE_LEVELS];
/* physical height of layers for ILO_LAYOUT_WALK_LAYER */
/* physical height of layers for ILO_IMAGE_WALK_LAYER */
unsigned layer_height;
/* distance in bytes between two pixel block rows */
@ -123,50 +124,51 @@ struct ilo_layout {
unsigned aux_height;
};
void ilo_layout_init(struct ilo_layout *layout,
const struct ilo_dev *dev,
const struct pipe_resource *templ);
void
ilo_image_init(struct ilo_image *img,
const struct ilo_dev *dev,
const struct pipe_resource *templ);
bool
ilo_layout_update_for_imported_bo(struct ilo_layout *layout,
enum gen_surface_tiling tiling,
unsigned bo_stride);
ilo_image_update_for_imported_bo(struct ilo_image *img,
enum gen_surface_tiling tiling,
unsigned bo_stride);
/**
* Convert from pixel position to 2D memory offset.
*/
static inline void
ilo_layout_pos_to_mem(const struct ilo_layout *layout,
unsigned pos_x, unsigned pos_y,
unsigned *mem_x, unsigned *mem_y)
ilo_image_pos_to_mem(const struct ilo_image *img,
unsigned pos_x, unsigned pos_y,
unsigned *mem_x, unsigned *mem_y)
{
assert(pos_x % layout->block_width == 0);
assert(pos_y % layout->block_height == 0);
assert(pos_x % img->block_width == 0);
assert(pos_y % img->block_height == 0);
*mem_x = pos_x / layout->block_width * layout->block_size;
*mem_y = pos_y / layout->block_height;
*mem_x = pos_x / img->block_width * img->block_size;
*mem_y = pos_y / img->block_height;
}
/**
* Convert from 2D memory offset to linear offset.
*/
static inline unsigned
ilo_layout_mem_to_linear(const struct ilo_layout *layout,
unsigned mem_x, unsigned mem_y)
ilo_image_mem_to_linear(const struct ilo_image *img,
unsigned mem_x, unsigned mem_y)
{
return mem_y * layout->bo_stride + mem_x;
return mem_y * img->bo_stride + mem_x;
}
/**
* Convert from 2D memory offset to raw offset.
*/
static inline unsigned
ilo_layout_mem_to_raw(const struct ilo_layout *layout,
unsigned mem_x, unsigned mem_y)
ilo_image_mem_to_raw(const struct ilo_image *img,
unsigned mem_x, unsigned mem_y)
{
unsigned tile_w, tile_h;
switch (layout->tiling) {
switch (img->tiling) {
case GEN6_TILING_NONE:
tile_w = 1;
tile_h = 1;
@ -193,27 +195,27 @@ ilo_layout_mem_to_raw(const struct ilo_layout *layout,
assert(mem_x % tile_w == 0);
assert(mem_y % tile_h == 0);
return mem_y * layout->bo_stride + mem_x * tile_h;
return mem_y * img->bo_stride + mem_x * tile_h;
}
/**
* Return the stride, in bytes, between slices within a level.
*/
static inline unsigned
ilo_layout_get_slice_stride(const struct ilo_layout *layout, unsigned level)
ilo_image_get_slice_stride(const struct ilo_image *img, unsigned level)
{
unsigned h;
switch (layout->walk) {
case ILO_LAYOUT_WALK_LOD:
h = layout->lods[level].slice_height;
switch (img->walk) {
case ILO_IMAGE_WALK_LOD:
h = img->lods[level].slice_height;
break;
case ILO_LAYOUT_WALK_LAYER:
h = layout->layer_height;
case ILO_IMAGE_WALK_LAYER:
h = img->layer_height;
break;
case ILO_LAYOUT_WALK_3D:
case ILO_IMAGE_WALK_3D:
if (level == 0) {
h = layout->lods[0].slice_height;
h = img->lods[0].slice_height;
break;
}
/* fall through */
@ -223,71 +225,71 @@ ilo_layout_get_slice_stride(const struct ilo_layout *layout, unsigned level)
break;
}
assert(h % layout->block_height == 0);
assert(h % img->block_height == 0);
return (h / layout->block_height) * layout->bo_stride;
return (h / img->block_height) * img->bo_stride;
}
/**
* Return the physical size, in bytes, of a slice in a level.
*/
static inline unsigned
ilo_layout_get_slice_size(const struct ilo_layout *layout, unsigned level)
ilo_image_get_slice_size(const struct ilo_image *img, unsigned level)
{
const unsigned w = layout->lods[level].slice_width;
const unsigned h = layout->lods[level].slice_height;
const unsigned w = img->lods[level].slice_width;
const unsigned h = img->lods[level].slice_height;
assert(w % layout->block_width == 0);
assert(h % layout->block_height == 0);
assert(w % img->block_width == 0);
assert(h % img->block_height == 0);
return (w / layout->block_width * layout->block_size) *
(h / layout->block_height);
return (w / img->block_width * img->block_size) *
(h / img->block_height);
}
/**
* Return the pixel position of a slice.
*/
static inline void
ilo_layout_get_slice_pos(const struct ilo_layout *layout,
unsigned level, unsigned slice,
unsigned *x, unsigned *y)
ilo_image_get_slice_pos(const struct ilo_image *img,
unsigned level, unsigned slice,
unsigned *x, unsigned *y)
{
switch (layout->walk) {
case ILO_LAYOUT_WALK_LOD:
*x = layout->lods[level].x;
*y = layout->lods[level].y + layout->lods[level].slice_height * slice;
switch (img->walk) {
case ILO_IMAGE_WALK_LOD:
*x = img->lods[level].x;
*y = img->lods[level].y + img->lods[level].slice_height * slice;
break;
case ILO_LAYOUT_WALK_LAYER:
*x = layout->lods[level].x;
*y = layout->lods[level].y + layout->layer_height * slice;
case ILO_IMAGE_WALK_LAYER:
*x = img->lods[level].x;
*y = img->lods[level].y + img->layer_height * slice;
break;
case ILO_LAYOUT_WALK_3D:
case ILO_IMAGE_WALK_3D:
{
/* slices are packed horizontally with wrapping */
const unsigned sx = slice & ((1 << level) - 1);
const unsigned sy = slice >> level;
*x = layout->lods[level].x + layout->lods[level].slice_width * sx;
*y = layout->lods[level].y + layout->lods[level].slice_height * sy;
*x = img->lods[level].x + img->lods[level].slice_width * sx;
*y = img->lods[level].y + img->lods[level].slice_height * sy;
/* should not overlap with the next level */
if (level + 1 < Elements(layout->lods) &&
layout->lods[level + 1].y) {
assert(*y + layout->lods[level].slice_height <=
layout->lods[level + 1].y);
if (level + 1 < Elements(img->lods) &&
img->lods[level + 1].y) {
assert(*y + img->lods[level].slice_height <=
img->lods[level + 1].y);
}
break;
}
default:
assert(!"unknown layout walk type");
assert(!"unknown img walk type");
*x = 0;
*y = 0;
break;
}
/* should not exceed the bo size */
assert(*y + layout->lods[level].slice_height <=
layout->bo_height * layout->block_height);
assert(*y + img->lods[level].slice_height <=
img->bo_height * img->block_height);
}
#endif /* ILO_LAYOUT_H */
#endif /* ILO_IMAGE_H */

34
src/gallium/drivers/ilo/ilo_blitter_blt.c
View File

@ -249,10 +249,10 @@ tex_clear_region(struct ilo_blitter *blitter,
int slice;
/* no W-tiling nor separate stencil support */
if (dst_tex->layout.tiling == GEN8_TILING_W || dst_tex->separate_s8)
if (dst_tex->image.tiling == GEN8_TILING_W || dst_tex->separate_s8)
return false;
if (dst_tex->layout.bo_stride > max_extent)
if (dst_tex->image.bo_stride > max_extent)
return false;
if (dst_box->width * cpp > gen6_blt_max_bytes_per_scanline)
@ -260,17 +260,17 @@ tex_clear_region(struct ilo_blitter *blitter,
dst.bo = dst_tex->bo;
dst.offset = 0;
dst.pitch = dst_tex->layout.bo_stride;
dst.tiling = dst_tex->layout.tiling;
dst.pitch = dst_tex->image.bo_stride;
dst.tiling = dst_tex->image.tiling;
swctrl = ilo_blitter_blt_begin(blitter,
GEN6_XY_COLOR_BLT__SIZE * dst_box->depth,
dst_tex->bo, dst_tex->layout.tiling, NULL, GEN6_TILING_NONE);
dst_tex->bo, dst_tex->image.tiling, NULL, GEN6_TILING_NONE);
for (slice = 0; slice < dst_box->depth; slice++) {
unsigned x, y;
ilo_layout_get_slice_pos(&dst_tex->layout,
ilo_image_get_slice_pos(&dst_tex->image,
dst_level, dst_box->z + slice, &x, &y);
dst.x = x + dst_box->x;
@ -299,7 +299,7 @@ tex_copy_region(struct ilo_blitter *blitter,
const struct pipe_box *src_box)
{
const struct util_format_description *desc =
util_format_description(dst_tex->layout.format);
util_format_description(dst_tex->image.format);
const unsigned max_extent = 32767; /* INT16_MAX */
const uint8_t rop = 0xcc; /* SRCCOPY */
struct ilo_builder *builder = &blitter->ilo->cp->builder;
@ -309,12 +309,12 @@ tex_copy_region(struct ilo_blitter *blitter,
int cpp, xscale, slice;
/* no W-tiling nor separate stencil support */
if (dst_tex->layout.tiling == GEN8_TILING_W || dst_tex->separate_s8 ||
src_tex->layout.tiling == GEN8_TILING_W || src_tex->separate_s8)
if (dst_tex->image.tiling == GEN8_TILING_W || dst_tex->separate_s8 ||
src_tex->image.tiling == GEN8_TILING_W || src_tex->separate_s8)
return false;
if (dst_tex->layout.bo_stride > max_extent ||
src_tex->layout.bo_stride > max_extent)
if (dst_tex->image.bo_stride > max_extent ||
src_tex->image.bo_stride > max_extent)
return false;
cpp = desc->block.bits / 8;
@ -349,13 +349,13 @@ tex_copy_region(struct ilo_blitter *blitter,
dst.bo = dst_tex->bo;
dst.offset = 0;
dst.pitch = dst_tex->layout.bo_stride;
dst.tiling = dst_tex->layout.tiling;
dst.pitch = dst_tex->image.bo_stride;
dst.tiling = dst_tex->image.tiling;
src.bo = src_tex->bo;
src.offset = 0;
src.pitch = src_tex->layout.bo_stride;
src.tiling = src_tex->layout.tiling;
src.pitch = src_tex->image.bo_stride;
src.tiling = src_tex->image.tiling;
swctrl = ilo_blitter_blt_begin(blitter,
GEN6_XY_SRC_COPY_BLT__SIZE * src_box->depth,
@ -364,9 +364,9 @@ tex_copy_region(struct ilo_blitter *blitter,
for (slice = 0; slice < src_box->depth; slice++) {
unsigned dx, dy, sx, sy, width, height;
ilo_layout_get_slice_pos(&dst_tex->layout,
ilo_image_get_slice_pos(&dst_tex->image,
dst_level, dst_z + slice, &dx, &dy);
ilo_layout_get_slice_pos(&src_tex->layout,
ilo_image_get_slice_pos(&src_tex->image,
src_level, src_box->z + slice, &sx, &sy);
dst.x = (dx + dst_x) * xscale;

8
src/gallium/drivers/ilo/ilo_blitter_rectlist.c
View File

@ -138,8 +138,8 @@ ilo_blitter_set_fb(struct ilo_blitter *blitter,
{
struct ilo_texture *tex = ilo_texture(res);
blitter->fb.width = u_minify(tex->layout.width0, level);
blitter->fb.height = u_minify(tex->layout.height0, level);
blitter->fb.width = u_minify(tex->image.width0, level);
blitter->fb.height = u_minify(tex->image.height0, level);
blitter->fb.num_samples = res->nr_samples;
if (!blitter->fb.num_samples)
@ -303,7 +303,7 @@ hiz_can_clear_zs(const struct ilo_blitter *blitter,
* The truth is when HiZ is enabled, separate stencil is also enabled on
* all GENs. The depth buffer format cannot be combined depth/stencil.
*/
switch (tex->layout.format) {
switch (tex->image.format) {
case PIPE_FORMAT_Z16_UNORM:
if (ilo_dev_gen(blitter->ilo->dev) == ILO_GEN(6) &&
tex->base.width0 % 16)
@ -342,7 +342,7 @@ ilo_blitter_rectlist_clear_zs(struct ilo_blitter *blitter,
if (ilo_dev_gen(blitter->ilo->dev) >= ILO_GEN(8))
clear_value = fui(depth);
else
clear_value = util_pack_z(tex->layout.format, depth);
clear_value = util_pack_z(tex->image.format, depth);
ilo_blit_resolve_surface(blitter->ilo, zs,
ILO_TEXTURE_RENDER_WRITE | ILO_TEXTURE_CLEAR);

63
src/gallium/drivers/ilo/ilo_resource.c
View File

@ -25,7 +25,6 @@
* Chia-I Wu <olv@lunarg.com>
*/
#include "ilo_layout.h"
#include "ilo_screen.h"
#include "ilo_resource.h"
@ -164,11 +163,11 @@ tex_import_handle(struct ilo_texture *tex,
unsigned long pitch;
tex->bo = intel_winsys_import_handle(is->dev.winsys, name, handle,
tex->layout.bo_height, &tiling, &pitch);
tex->image.bo_height, &tiling, &pitch);
if (!tex->bo)
return false;
if (!ilo_layout_update_for_imported_bo(&tex->layout,
if (!ilo_image_update_for_imported_bo(&tex->image,
winsys_to_surface_tiling(tiling), pitch)) {
ilo_err("imported handle has incompatible tiling/pitch\n");
intel_bo_unref(tex->bo);
@ -188,15 +187,15 @@ tex_create_bo(struct ilo_texture *tex)
struct intel_bo *bo;
bo = intel_winsys_alloc_bo(is->dev.winsys, name,
tex->layout.bo_stride * tex->layout.bo_height, cpu_init);
tex->image.bo_stride * tex->image.bo_height, cpu_init);
/* set the tiling for transfer and export */
if (bo && (tex->layout.tiling == GEN6_TILING_X ||
tex->layout.tiling == GEN6_TILING_Y)) {
if (bo && (tex->image.tiling == GEN6_TILING_X ||
tex->image.tiling == GEN6_TILING_Y)) {
const enum intel_tiling_mode tiling =
surface_to_winsys_tiling(tex->layout.tiling);
surface_to_winsys_tiling(tex->image.tiling);
if (intel_bo_set_tiling(bo, tiling, tex->layout.bo_stride)) {
if (intel_bo_set_tiling(bo, tiling, tex->image.bo_stride)) {
intel_bo_unref(bo);
bo = NULL;
}
@ -229,7 +228,7 @@ tex_create_separate_stencil(struct ilo_texture *tex)
tex->separate_s8 = ilo_texture(s8);
assert(tex->separate_s8->layout.format == PIPE_FORMAT_S8_UINT);
assert(tex->separate_s8->image.format == PIPE_FORMAT_S8_UINT);
return true;
}
@ -242,12 +241,12 @@ tex_create_hiz(struct ilo_texture *tex)
unsigned lv;
tex->aux_bo = intel_winsys_alloc_bo(is->dev.winsys, "hiz texture",
tex->layout.aux_stride * tex->layout.aux_height, false);
tex->image.aux_stride * tex->image.aux_height, false);
if (!tex->aux_bo)
return false;
for (lv = 0; lv <= templ->last_level; lv++) {
if (tex->layout.aux_enables & (1 << lv)) {
if (tex->image.aux_enables & (1 << lv)) {
const unsigned num_slices = (templ->target == PIPE_TEXTURE_3D) ?
u_minify(templ->depth0, lv) : templ->array_size;
unsigned flags = ILO_TEXTURE_HIZ;
@ -268,10 +267,10 @@ tex_create_mcs(struct ilo_texture *tex)
{
struct ilo_screen *is = ilo_screen(tex->base.screen);
assert(tex->layout.aux_enables == (1 << (tex->base.last_level + 1)) - 1);
assert(tex->image.aux_enables == (1 << (tex->base.last_level + 1)) - 1);
tex->aux_bo = intel_winsys_alloc_bo(is->dev.winsys, "mcs texture",
tex->layout.aux_stride * tex->layout.aux_height, false);
tex->image.aux_stride * tex->image.aux_height, false);
if (!tex->aux_bo)
return false;
@ -306,19 +305,19 @@ tex_alloc_bos(struct ilo_texture *tex,
}
/* allocate separate stencil resource */
if (tex->layout.separate_stencil && !tex_create_separate_stencil(tex))
if (tex->image.separate_stencil && !tex_create_separate_stencil(tex))
return false;
switch (tex->layout.aux) {
case ILO_LAYOUT_AUX_HIZ:
switch (tex->image.aux) {
case ILO_IMAGE_AUX_HIZ:
if (!tex_create_hiz(tex)) {
/* Separate Stencil Buffer requires HiZ to be enabled */
if (ilo_dev_gen(&is->dev) == ILO_GEN(6) &&
tex->layout.separate_stencil)
tex->image.separate_stencil)
return false;
}
break;
case ILO_LAYOUT_AUX_MCS:
case ILO_IMAGE_AUX_MCS:
if (!tex_create_mcs(tex))
return false;
break;
@ -330,21 +329,21 @@ tex_alloc_bos(struct ilo_texture *tex,
}
static bool
tex_init_layout(struct ilo_texture *tex)
tex_init_image(struct ilo_texture *tex)
{
struct ilo_screen *is = ilo_screen(tex->base.screen);
const struct pipe_resource *templ = &tex->base;
struct ilo_layout *layout = &tex->layout;
struct ilo_image *img = &tex->image;
ilo_layout_init(layout, &is->dev, templ);
ilo_image_init(img, &is->dev, templ);
if (layout->bo_height > ilo_max_resource_size / layout->bo_stride)
if (img->bo_height > ilo_max_resource_size / img->bo_stride)
return false;
if (templ->flags & PIPE_RESOURCE_FLAG_MAP_PERSISTENT) {
/* require on-the-fly tiling/untiling or format conversion */
if (layout->tiling == GEN8_TILING_W || layout->separate_stencil ||
layout->format != templ->format)
if (img->tiling == GEN8_TILING_W || img->separate_stencil ||
img->format != templ->format)
return false;
}
@ -371,7 +370,7 @@ tex_create(struct pipe_screen *screen,
tex->imported = (handle != NULL);
if (!tex_init_layout(tex)) {
if (!tex_init_image(tex)) {
FREE(tex);
return NULL;
}
@ -392,13 +391,13 @@ tex_get_handle(struct ilo_texture *tex, struct winsys_handle *handle)
int err;
/* must match what tex_create_bo() sets */
if (tex->layout.tiling == GEN8_TILING_W)
if (tex->image.tiling == GEN8_TILING_W)
tiling = INTEL_TILING_NONE;
else
tiling = surface_to_winsys_tiling(tex->layout.tiling);
tiling = surface_to_winsys_tiling(tex->image.tiling);
err = intel_winsys_export_handle(is->dev.winsys, tex->bo, tiling,
tex->layout.bo_stride, tex->layout.bo_height, handle);
tex->image.bo_stride, tex->image.bo_height, handle);
return !err;
}
@ -481,15 +480,15 @@ static boolean
ilo_can_create_resource(struct pipe_screen *screen,
const struct pipe_resource *templ)
{
struct ilo_layout layout;
struct ilo_image img;
if (templ->target == PIPE_BUFFER)
return (templ->width0 <= ilo_max_resource_size);
memset(&layout, 0, sizeof(layout));
ilo_layout_init(&layout, &ilo_screen(screen)->dev, templ);
memset(&img, 0, sizeof(img));
ilo_image_init(&img, &ilo_screen(screen)->dev, templ);
return (layout.bo_height <= ilo_max_resource_size / layout.bo_stride);
return (img.bo_height <= ilo_max_resource_size / img.bo_stride);
}
static struct pipe_resource *

4
src/gallium/drivers/ilo/ilo_resource.h
View File

@ -29,9 +29,9 @@
#define ILO_RESOURCE_H
#include "core/intel_winsys.h"
#include "core/ilo_image.h"
#include "ilo_common.h"
#include "ilo_layout.h"
#include "ilo_screen.h"
enum ilo_texture_flags {
@ -108,7 +108,7 @@ struct ilo_texture {
bool imported;
struct ilo_layout layout;
struct ilo_image image;
/* XXX thread-safety */
struct intel_bo *bo;

2
src/gallium/drivers/ilo/ilo_state.c
View File

@ -1013,7 +1013,7 @@ ilo_create_sampler_view(struct pipe_context *pipe,
struct ilo_texture *tex = ilo_texture(res);
/* warn about degraded performance because of a missing binding flag */
if (tex->layout.tiling == GEN6_TILING_NONE &&
if (tex->image.tiling == GEN6_TILING_NONE &&
!(tex->base.bind & PIPE_BIND_SAMPLER_VIEW)) {
ilo_warn("creating sampler view for a resource "
"not created for sampling\n");

36
src/gallium/drivers/ilo/ilo_state_3d_bottom.c
View File

@ -1032,12 +1032,12 @@ zs_init_info(const struct ilo_dev *dev,
if (format != PIPE_FORMAT_S8_UINT) {
info->zs.bo = tex->bo;
info->zs.stride = tex->layout.bo_stride;
info->zs.stride = tex->image.bo_stride;
assert(tex->layout.layer_height % 4 == 0);
info->zs.qpitch = tex->layout.layer_height / 4;
assert(tex->image.layer_height % 4 == 0);
info->zs.qpitch = tex->image.layer_height / 4;
info->zs.tiling = tex->layout.tiling;
info->zs.tiling = tex->image.tiling;
info->zs.offset = 0;
}
@ -1056,41 +1056,41 @@ zs_init_info(const struct ilo_dev *dev,
* For GEN7, we still dobule the stride because we did not double the
* slice widths when initializing the layout.
*/
info->stencil.stride = s8_tex->layout.bo_stride * 2;
info->stencil.stride = s8_tex->image.bo_stride * 2;
assert(s8_tex->layout.layer_height % 4 == 0);
info->stencil.qpitch = s8_tex->layout.layer_height / 4;
assert(s8_tex->image.layer_height % 4 == 0);
info->stencil.qpitch = s8_tex->image.layer_height / 4;
info->stencil.tiling = s8_tex->layout.tiling;
info->stencil.tiling = s8_tex->image.tiling;
if (ilo_dev_gen(dev) == ILO_GEN(6)) {
unsigned x, y;
assert(s8_tex->layout.walk == ILO_LAYOUT_WALK_LOD);
assert(s8_tex->image.walk == ILO_IMAGE_WALK_LOD);
/* offset to the level */
ilo_layout_get_slice_pos(&s8_tex->layout, level, 0, &x, &y);
ilo_layout_pos_to_mem(&s8_tex->layout, x, y, &x, &y);
info->stencil.offset = ilo_layout_mem_to_raw(&s8_tex->layout, x, y);
ilo_image_get_slice_pos(&s8_tex->image, level, 0, &x, &y);
ilo_image_pos_to_mem(&s8_tex->image, x, y, &x, &y);
info->stencil.offset = ilo_image_mem_to_raw(&s8_tex->image, x, y);
}
}
if (ilo_texture_can_enable_hiz(tex, level, first_layer, num_layers)) {
info->hiz.bo = tex->aux_bo;
info->hiz.stride = tex->layout.aux_stride;
info->hiz.stride = tex->image.aux_stride;
assert(tex->layout.aux_layer_height % 4 == 0);
info->hiz.qpitch = tex->layout.aux_layer_height / 4;
assert(tex->image.aux_layer_height % 4 == 0);
info->hiz.qpitch = tex->image.aux_layer_height / 4;
info->hiz.tiling = GEN6_TILING_Y;
/* offset to the level */
if (ilo_dev_gen(dev) == ILO_GEN(6))
info->hiz.offset = tex->layout.aux_offsets[level];
info->hiz.offset = tex->image.aux_offsets[level];
}
info->width = tex->layout.width0;
info->height = tex->layout.height0;
info->width = tex->image.width0;
info->height = tex->image.height0;
info->depth = (tex->base.target == PIPE_TEXTURE_3D) ?
tex->base.depth0 : num_layers;

54
src/gallium/drivers/ilo/ilo_state_3d_top.c
View File

@ -584,11 +584,11 @@ view_init_for_texture_gen6(const struct ilo_dev *dev,
surface_format = ilo_format_translate_texture(dev, format);
assert(surface_format >= 0);
width = tex->layout.width0;
height = tex->layout.height0;
width = tex->image.width0;
height = tex->image.height0;
depth = (tex->base.target == PIPE_TEXTURE_3D) ?
tex->base.depth0 : num_layers;
pitch = tex->layout.bo_stride;
pitch = tex->image.bo_stride;
if (surface_type == GEN6_SURFTYPE_CUBE) {
/*
@ -642,10 +642,10 @@ view_init_for_texture_gen6(const struct ilo_dev *dev,
}
/* non-full array spacing is supported only on GEN7+ */
assert(tex->layout.walk != ILO_LAYOUT_WALK_LOD);
assert(tex->image.walk != ILO_IMAGE_WALK_LOD);
/* non-interleaved samples are supported only on GEN7+ */
if (tex->base.nr_samples > 1)
assert(tex->layout.interleaved_samples);
assert(tex->image.interleaved_samples);
if (is_rt) {
assert(num_levels == 1);
@ -673,7 +673,7 @@ view_init_for_texture_gen6(const struct ilo_dev *dev,
*
* "For linear surfaces, this field (X Offset) must be zero"
*/
if (tex->layout.tiling == GEN6_TILING_NONE) {
if (tex->image.tiling == GEN6_TILING_NONE) {
if (is_rt) {
const int elem_size = util_format_get_blocksize(format);
assert(pitch % elem_size == 0);
@ -701,10 +701,10 @@ view_init_for_texture_gen6(const struct ilo_dev *dev,
(width - 1) << GEN6_SURFACE_DW2_WIDTH__SHIFT |
lod << GEN6_SURFACE_DW2_MIP_COUNT_LOD__SHIFT;
assert(tex->layout.tiling != GEN8_TILING_W);
assert(tex->image.tiling != GEN8_TILING_W);
dw[3] = (depth - 1) << GEN6_SURFACE_DW3_DEPTH__SHIFT |
(pitch - 1) << GEN6_SURFACE_DW3_PITCH__SHIFT |
tex->layout.tiling;
tex->image.tiling;
dw[4] = first_level << GEN6_SURFACE_DW4_MIN_LOD__SHIFT |
first_layer << 17 |
@ -714,8 +714,8 @@ view_init_for_texture_gen6(const struct ilo_dev *dev,
dw[5] = 0;
assert(tex->layout.align_j == 2 || tex->layout.align_j == 4);
if (tex->layout.align_j == 4)
assert(tex->image.align_j == 2 || tex->image.align_j == 4);
if (tex->image.align_j == 4)
dw[5] |= GEN6_SURFACE_DW5_VALIGN_4;
}
@ -946,11 +946,11 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
surface_format = ilo_format_translate_texture(dev, format);
assert(surface_format >= 0);
width = tex->layout.width0;
height = tex->layout.height0;
width = tex->image.width0;
height = tex->image.height0;
depth = (tex->base.target == PIPE_TEXTURE_3D) ?
tex->base.depth0 : num_layers;
pitch = tex->layout.bo_stride;
pitch = tex->image.bo_stride;
if (surface_type == GEN6_SURFTYPE_CUBE) {
/*
@ -1030,7 +1030,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
*
* "For linear surfaces, this field (X Offset) must be zero."
*/
if (tex->layout.tiling == GEN6_TILING_NONE) {
if (tex->image.tiling == GEN6_TILING_NONE) {
if (is_rt) {
const int elem_size = util_format_get_blocksize(format);
assert(pitch % elem_size == 0);
@ -1062,7 +1062,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
}
if (ilo_dev_gen(dev) >= ILO_GEN(8)) {
switch (tex->layout.align_j) {
switch (tex->image.align_j) {
case 4:
dw[0] |= GEN7_SURFACE_DW0_VALIGN_4;
break;
@ -1077,7 +1077,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
break;
}
switch (tex->layout.align_i) {
switch (tex->image.align_i) {
case 4:
dw[0] |= GEN8_SURFACE_DW0_HALIGN_4;
break;
@ -1092,21 +1092,21 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
break;
}
dw[0] |= tex->layout.tiling << GEN8_SURFACE_DW0_TILING__SHIFT;
dw[0] |= tex->image.tiling << GEN8_SURFACE_DW0_TILING__SHIFT;
} else {
assert(tex->layout.align_i == 4 || tex->layout.align_i == 8);
assert(tex->layout.align_j == 2 || tex->layout.align_j == 4);
assert(tex->image.align_i == 4 || tex->image.align_i == 8);
assert(tex->image.align_j == 2 || tex->image.align_j == 4);
if (tex->layout.align_j == 4)
if (tex->image.align_j == 4)
dw[0] |= GEN7_SURFACE_DW0_VALIGN_4;
if (tex->layout.align_i == 8)
if (tex->image.align_i == 8)
dw[0] |= GEN7_SURFACE_DW0_HALIGN_8;
assert(tex->layout.tiling != GEN8_TILING_W);
dw[0] |= tex->layout.tiling << GEN7_SURFACE_DW0_TILING__SHIFT;
assert(tex->image.tiling != GEN8_TILING_W);
dw[0] |= tex->image.tiling << GEN7_SURFACE_DW0_TILING__SHIFT;
if (tex->layout.walk == ILO_LAYOUT_WALK_LOD)
if (tex->image.walk == ILO_IMAGE_WALK_LOD)
dw[0] |= GEN7_SURFACE_DW0_ARYSPC_LOD0;
else
dw[0] |= GEN7_SURFACE_DW0_ARYSPC_FULL;
@ -1119,8 +1119,8 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
dw[0] |= GEN7_SURFACE_DW0_CUBE_FACE_ENABLES__MASK;
if (ilo_dev_gen(dev) >= ILO_GEN(8)) {
assert(tex->layout.layer_height % 4 == 0);
dw[1] = tex->layout.layer_height / 4;
assert(tex->image.layer_height % 4 == 0);
dw[1] = tex->image.layer_height / 4;
} else {
dw[1] = 0;
}
@ -1139,7 +1139,7 @@ view_init_for_texture_gen7(const struct ilo_dev *dev,
* means the samples are interleaved. The layouts are the same when the
* number of samples is 1.
*/
if (tex->layout.interleaved_samples && tex->base.nr_samples > 1) {
if (tex->image.interleaved_samples && tex->base.nr_samples > 1) {
assert(!is_rt);
dw[4] |= GEN7_SURFACE_DW4_MSFMT_DEPTH_STENCIL;
}

60
src/gallium/drivers/ilo/ilo_transfer.c
View File

@ -93,7 +93,7 @@ resource_get_transfer_method(struct pipe_resource *res,
bool need_convert = false;
/* we may need to convert on the fly */
if (tex->layout.tiling == GEN8_TILING_W || tex->separate_s8) {
if (tex->image.tiling == GEN8_TILING_W || tex->separate_s8) {
/* on GEN6, separate stencil is enabled only when HiZ is */
if (ilo_dev_gen(&is->dev) >= ILO_GEN(7) ||
ilo_texture_can_enable_hiz(tex, transfer->level,
@ -101,7 +101,7 @@ resource_get_transfer_method(struct pipe_resource *res,
m = ILO_TRANSFER_MAP_SW_ZS;
need_convert = true;
}
} else if (tex->layout.format != tex->base.format) {
} else if (tex->image.format != tex->base.format) {
m = ILO_TRANSFER_MAP_SW_CONVERT;
need_convert = true;
}
@ -114,7 +114,7 @@ resource_get_transfer_method(struct pipe_resource *res,
return true;
}
tiled = (tex->layout.tiling != GEN6_TILING_NONE);
tiled = (tex->image.tiling != GEN6_TILING_NONE);
}
if (tiled)
@ -202,7 +202,7 @@ xfer_alloc_staging_res(struct ilo_transfer *xfer)
xfer->staging.res = res->screen->resource_create(res->screen, &templ);
if (xfer->staging.res && xfer->staging.res->target != PIPE_BUFFER) {
assert(ilo_texture(xfer->staging.res)->layout.tiling ==
assert(ilo_texture(xfer->staging.res)->image.tiling ==
GEN6_TILING_NONE);
}
@ -354,11 +354,11 @@ tex_get_box_origin(const struct ilo_texture *tex,
{
unsigned x, y;
ilo_layout_get_slice_pos(&tex->layout, level, box->z + slice, &x, &y);
ilo_image_get_slice_pos(&tex->image, level, box->z + slice, &x, &y);
x += box->x;
y += box->y;
ilo_layout_pos_to_mem(&tex->layout, x, y, mem_x, mem_y);
ilo_image_pos_to_mem(&tex->image, x, y, mem_x, mem_y);
}
static unsigned
@ -369,13 +369,13 @@ tex_get_box_offset(const struct ilo_texture *tex, unsigned level,
tex_get_box_origin(tex, level, 0, box, &mem_x, &mem_y);
return ilo_layout_mem_to_linear(&tex->layout, mem_x, mem_y);
return ilo_image_mem_to_linear(&tex->image, mem_x, mem_y);
}
static unsigned
tex_get_slice_stride(const struct ilo_texture *tex, unsigned level)
{
return ilo_layout_get_slice_stride(&tex->layout, level);
return ilo_image_get_slice_stride(&tex->image, level);
}
static unsigned
@ -523,21 +523,21 @@ static tex_tile_offset_func
tex_tile_choose_offset_func(const struct ilo_texture *tex,
unsigned *tiles_per_row)
{
switch (tex->layout.tiling) {
switch (tex->image.tiling) {
default:
assert(!"unknown tiling");
/* fall through */
case GEN6_TILING_NONE:
*tiles_per_row = tex->layout.bo_stride;
*tiles_per_row = tex->image.bo_stride;
return tex_tile_none_offset;
case GEN6_TILING_X:
*tiles_per_row = tex->layout.bo_stride / 512;
*tiles_per_row = tex->image.bo_stride / 512;
return tex_tile_x_offset;
case GEN6_TILING_Y:
*tiles_per_row = tex->layout.bo_stride / 128;
*tiles_per_row = tex->image.bo_stride / 128;
return tex_tile_y_offset;
case GEN8_TILING_W:
*tiles_per_row = tex->layout.bo_stride / 64;
*tiles_per_row = tex->image.bo_stride / 64;
return tex_tile_w_offset;
}
}
@ -551,7 +551,7 @@ tex_staging_sys_map_bo(struct ilo_texture *tex,
const bool prefer_cpu = (is->dev.has_llc || for_read_back);
void *ptr;
if (prefer_cpu && (tex->layout.tiling == GEN6_TILING_NONE ||
if (prefer_cpu && (tex->image.tiling == GEN6_TILING_NONE ||
!linear_view))
ptr = intel_bo_map(tex->bo, !for_read_back);
else
@ -584,7 +584,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
tile_offset = tex_tile_choose_offset_func(tex, &tiles_per_row);
assert(tex->layout.block_width == 1 && tex->layout.block_height == 1);
assert(tex->image.block_width == 1 && tex->image.block_height == 1);
if (tex->separate_s8) {
struct ilo_texture *s8_tex = tex->separate_s8;
@ -602,7 +602,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
s8_tile_offset = tex_tile_choose_offset_func(s8_tex, &s8_tiles_per_row);
if (tex->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
assert(tex->layout.format == PIPE_FORMAT_Z24X8_UNORM);
assert(tex->image.format == PIPE_FORMAT_Z24X8_UNORM);
dst_cpp = 4;
dst_s8_pos = 3;
@ -610,7 +610,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
}
else {
assert(tex->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
assert(tex->layout.format == PIPE_FORMAT_Z32_FLOAT);
assert(tex->image.format == PIPE_FORMAT_Z32_FLOAT);
dst_cpp = 8;
dst_s8_pos = 4;
@ -643,7 +643,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
d[dst_s8_pos] = s8_src[s8_offset];
d += dst_cpp;
x += tex->layout.block_size;
x += tex->image.block_size;
s8_x++;
}
@ -656,7 +656,7 @@ tex_staging_sys_zs_read(struct ilo_texture *tex,
tex_staging_sys_unmap_bo(s8_tex);
}
else {
assert(tex->layout.format == PIPE_FORMAT_S8_UINT);
assert(tex->image.format == PIPE_FORMAT_S8_UINT);
for (slice = 0; slice < box->depth; slice++) {
unsigned mem_x, mem_y;
@ -711,7 +711,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
tile_offset = tex_tile_choose_offset_func(tex, &tiles_per_row);
assert(tex->layout.block_width == 1 && tex->layout.block_height == 1);
assert(tex->image.block_width == 1 && tex->image.block_height == 1);
if (tex->separate_s8) {
struct ilo_texture *s8_tex = tex->separate_s8;
@ -729,7 +729,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
s8_tile_offset = tex_tile_choose_offset_func(s8_tex, &s8_tiles_per_row);
if (tex->base.format == PIPE_FORMAT_Z24_UNORM_S8_UINT) {
assert(tex->layout.format == PIPE_FORMAT_Z24X8_UNORM);
assert(tex->image.format == PIPE_FORMAT_Z24X8_UNORM);
src_cpp = 4;
src_s8_pos = 3;
@ -737,7 +737,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
}
else {
assert(tex->base.format == PIPE_FORMAT_Z32_FLOAT_S8X24_UINT);
assert(tex->layout.format == PIPE_FORMAT_Z32_FLOAT);
assert(tex->image.format == PIPE_FORMAT_Z32_FLOAT);
src_cpp = 8;
src_s8_pos = 4;
@ -770,7 +770,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
s8_dst[s8_offset] = s[src_s8_pos];
s += src_cpp;
x += tex->layout.block_size;
x += tex->image.block_size;
s8_x++;
}
@ -783,7 +783,7 @@ tex_staging_sys_zs_write(struct ilo_texture *tex,
tex_staging_sys_unmap_bo(s8_tex);
}
else {
assert(tex->layout.format == PIPE_FORMAT_S8_UINT);
assert(tex->image.format == PIPE_FORMAT_S8_UINT);
for (slice = 0; slice < box->depth; slice++) {
unsigned mem_x, mem_y;
@ -841,8 +841,8 @@ tex_staging_sys_convert_write(struct ilo_texture *tex,
else
dst_slice_stride = 0;
if (unlikely(tex->layout.format == tex->base.format)) {
util_copy_box(dst, tex->layout.format, tex->layout.bo_stride,
if (unlikely(tex->image.format == tex->base.format)) {
util_copy_box(dst, tex->image.format, tex->image.bo_stride,
dst_slice_stride, 0, 0, 0, box->width, box->height, box->depth,
xfer->staging.sys, xfer->base.stride, xfer->base.layer_stride,
0, 0, 0);
@ -854,14 +854,14 @@ tex_staging_sys_convert_write(struct ilo_texture *tex,
switch (tex->base.format) {
case PIPE_FORMAT_ETC1_RGB8:
assert(tex->layout.format == PIPE_FORMAT_R8G8B8X8_UNORM);
assert(tex->image.format == PIPE_FORMAT_R8G8B8X8_UNORM);
for (slice = 0; slice < box->depth; slice++) {
const void *src =
xfer->staging.sys + xfer->base.layer_stride * slice;
util_format_etc1_rgb8_unpack_rgba_8unorm(dst,
tex->layout.bo_stride, src, xfer->base.stride,
tex->image.bo_stride, src, xfer->base.stride,
box->width, box->height);
dst += dst_slice_stride;
@ -957,7 +957,7 @@ tex_map(struct ilo_transfer *xfer)
ptr += tex_get_box_offset(tex, xfer->base.level, &xfer->base.box);
/* stride is for a block row, not a texel row */
xfer->base.stride = tex->layout.bo_stride;
xfer->base.stride = tex->image.bo_stride;
/* note that slice stride is not always available */
xfer->base.layer_stride = (xfer->base.box.depth > 1) ?
tex_get_slice_stride(tex, xfer->base.level) : 0;
@ -967,7 +967,7 @@ tex_map(struct ilo_transfer *xfer)
ptr = xfer_map(xfer);
if (ptr) {
const struct ilo_texture *staging = ilo_texture(xfer->staging.res);
xfer->base.stride = staging->layout.bo_stride;
xfer->base.stride = staging->image.bo_stride;
xfer->base.layer_stride = tex_get_slice_stride(staging, 0);
}
break;