d3d12: Properly set HS input control point count

Looks like some hardware needs this info in the shader to match the
topology. Since there's no spot in the shader info for it, we're
currently using the array size of the TCS input vars to store it.

Cc: mesa-stable
Reviewed-by: Paul Dodzweit <paul.dodzweit@amd.com>
Tested-by: Paul Dodzweit <paul.dodzweit@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/16920>

src/gallium/drivers/d3d12/d3d12_compiler.cpp

@@ -743,6 +743,7 @@ d3d12_compare_shader_keys(const d3d12_shader_key *expect, const d3d12_shader_key
           expect->hs.ccw != have->hs.ccw ||
           expect->hs.point_mode != have->hs.point_mode ||
           expect->hs.spacing != have->hs.spacing ||
+          expect->hs.patch_vertices_in != have->hs.patch_vertices_in ||
           memcmp(&expect->hs.required_patch_outputs, &have->hs.required_patch_outputs,
                  sizeof(struct d3d12_varying_info)) ||
           expect->hs.next_patch_inputs != have->hs.next_patch_inputs)
@@ -978,6 +979,7 @@ d3d12_fill_shader_key(struct d3d12_selection_context *sel_ctx,
          key->hs.point_mode = false;
          key->hs.spacing = TESS_SPACING_EQUAL;
       }
+      key->hs.patch_vertices_in = MAX2(sel_ctx->ctx->patch_vertices, 1);
    } else if (stage == PIPE_SHADER_TESS_EVAL) {
       if (prev && prev->current->nir->info.stage == MESA_SHADER_TESS_CTRL)
          key->ds.tcs_vertices_out = prev->current->nir->info.tess.tcs_vertices_out;
@@ -1147,6 +1149,8 @@ select_shader_variant(struct d3d12_selection_context *sel_ctx, d3d12_shader_sele
       new_nir_variant->info.tess.ccw = key.hs.ccw;
       new_nir_variant->info.tess.point_mode = key.hs.point_mode;
       new_nir_variant->info.tess.spacing = key.hs.spacing;
+
+      NIR_PASS_V(new_nir_variant, dxil_nir_set_tcs_patches_in, key.hs.patch_vertices_in);
    } else if (new_nir_variant->info.stage == MESA_SHADER_TESS_EVAL) {
       new_nir_variant->info.tess.tcs_vertices_out = key.ds.tcs_vertices_out;
    }

src/gallium/drivers/d3d12/d3d12_compiler.h

@@ -120,6 +120,7 @@ struct d3d12_shader_key {
       unsigned ccw:1;
       unsigned point_mode:1;
       unsigned spacing:2;
+      unsigned patch_vertices_in:5;
       struct d3d12_varying_info required_patch_outputs;
       uint32_t next_patch_inputs;
    } hs;

src/microsoft/compiler/dxil_nir.h

@@ -70,6 +70,7 @@ dxil_reassign_driver_locations(nir_shader* s, nir_variable_mode modes,
 
 void dxil_nir_split_tess_ctrl(nir_shader *nir, nir_function **patch_const_func);
 bool dxil_nir_fixup_tess_level_for_domain(nir_shader *nir);
+bool dxil_nir_set_tcs_patches_in(nir_shader *nir, unsigned num_control_points);
 bool dxil_nir_lower_ubo_array_one_to_static(nir_shader *s);
 
 #ifdef __cplusplus

src/microsoft/compiler/dxil_nir_tess.c

@@ -355,3 +355,35 @@ dxil_nir_fixup_tess_level_for_domain(nir_shader *nir)
    }
    return progress;
 }
+
+static bool
+tcs_update_deref_input_types(nir_builder *b, nir_instr *instr, void *data)
+{
+   if (instr->type != nir_instr_type_deref)
+      return false;
+
+   nir_deref_instr *deref = nir_instr_as_deref(instr);
+   if (deref->deref_type != nir_deref_type_var)
+      return false;
+
+   nir_variable *var = deref->var;
+   deref->type = var->type;
+   return true;
+}
+
+bool
+dxil_nir_set_tcs_patches_in(nir_shader *nir, unsigned num_control_points)
+{
+   bool progress = false;
+   nir_foreach_variable_with_modes(var, nir, nir_var_shader_in) {
+      if (nir_is_arrayed_io(var, MESA_SHADER_TESS_CTRL)) {
+         var->type = glsl_array_type(glsl_get_array_element(var->type), num_control_points, 0);
+         progress = true;
+      }
+   }
+
+   if (progress)
+      nir_shader_instructions_pass(nir, tcs_update_deref_input_types, nir_metadata_all, NULL);
+
+   return progress;
+}