Commit Graph

158044 Commits

Author SHA1 Message Date
Alyssa Rosenzweig
0add4f1f1a panfrost: Use compute-based XFB on Midgard
Now we're back to a single XFB implementation for all gens. Fixes:

   KHR-GLES31.core.draw_indirect.advanced-twoPasses-transformFeedback-arrays
   KHR-GLES31.core.draw_indirect.advanced-twoPasses-transformFeedback-elements

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
(cherry picked from commit 0955fe8fe20d2ffb416394be80a12897d7a6d61c)
2022-11-04 14:50:05 -07:00
Alyssa Rosenzweig
ca852a09af pan/mdg: Fix 64-bit address arithmetic
Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19238>
(cherry picked from commit 9e2ce225e682eb7880c70733dcdd51054ad7529b)
2022-11-03 11:02:01 -07:00
Pavel Ondračka
6a2d462191 r300: fix generation of invalid swizzles in regalloc
rc_adjust_channels is inteded for moving the swizzles to a new channels
when rewriting the writemask of an instruction. However for readers one
needs to keep the swizzles in the old channels but rather convert to the
new values, so use the proper helper rc_rewrite_swizzle.

With the new swizzle fixed, we should properly detect that it would be
invalid and thus we can select the proper register class to prevent the
writemask rewrite in the regalloc.

Documentation was added to rc_adjust_channels to make it more clear what
it actually does.

Fixes a bunch of dEQP tests.

Cc: mesa-stable
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7521
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19158>
(cherry picked from commit 1e9e5618110542550b9f92dca8392f213bfd46b7)

Conflicts:
	src/gallium/drivers/r300/ci/r300-r480-fails.txt
2022-11-02 12:56:02 -07:00
Dylan Baker
ddd9bba400 .pick_status.json: Mark 1a06dbcaed9ed4095ec8878d947935f0f7558cfd as denominated 2022-11-02 12:56:01 -07:00
Rob Clark
0284e61c58 freedreno/a6xx: Fix occlusion queries
WFI is not a strong enough barrier, which shows up in piglit qbo tests
which do a single draw.

Fixes: 13fc03f4c0 ("freedreno/a6xx: Avoid stalling for occlusion queries")
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19400>
(cherry picked from commit 5c5e4238ff8f9dfb92b13071582af13c985483ef)
2022-11-02 12:56:01 -07:00
Erik Faye-Lund
e0d84e84f7 zink: do not read is_generated unless in tcs shader
It's undefined behavior in C to read a union member if another member
has been written to more recently. Let's be more careful here!

Fixes: a9d2b86c2c ("zink: store the spirv_shader to the zink_shader struct for generated tcs")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19457>
(cherry picked from commit 090a111c5dcd2c6764e7b990a55f3bddca771499)
2022-11-02 12:56:01 -07:00
Rhys Perry
46f2002521 radv/llvm: fix GS shaders on GFX8/9
6698753cdb switched our GS output stores to use MUBUF.

The stride doesn't matter for the ESGS descriptor (because idxen=false and
the index stride is 64), but this fixes it anyway.

This also changes ACO to use MUBUF store too, since MTBUF doesn't seem to
work correctly with an invalid data format in the descriptor.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: 6698753cdb ("ac/llvm: don't use tbuffer_store as a fallback for swizzled stores")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18885>
(cherry picked from commit a71d068fd07f5d34561b28f2f57267031077033a)
2022-11-02 12:56:01 -07:00
Joan Bruguera
df8d107ab0 nv50/ir/nir: ignore sampler for TXF/TXQ ops.
Recently, a regression was reported where videos in Firefox had shifted/
glitched colors on certain Kepler hardware. This was bisected to
bf02bffe15, however, the issue already
existed but didn't hit users until TGSI was switched to NIR as default.

The issue was traced to a YUV-to-RGB fragment shader used by Firefox,
which uses three samplers for the Y/U/V components. The Y component was
handled correctly, but the U/V components were bogus, causing the issue.

After analysis, it appears the TXF/TXQ ops. should only handle the texture
(r) but not the sampler (s), see 63b850403c
and 346ce0b988.
Similarly, handleTXQ/handleTXF on nv50_ir_from_tgsi always sets s=0.
Only Kepler was affected because other hardware ignores s at codegen.

Always set s=0 on NIR for TXF/TXQ, to keep TGSI behavior and fix the
regression.

Thanks: Karol Herbst and M Henning for help diagnosing the issue.
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7416
Cc: mesa-stable
Suggested-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: M Henning <drawoc@darkrefraction.com>
Signed-off-by: Joan Bruguera <joanbrugueram@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19453>
(cherry picked from commit 6014a642ae24e37c287adbf41d615efa18d0da3d)
2022-11-02 12:56:01 -07:00
Pierre-Eric Pelloux-Prayer
7e7d1bd6ee radeonsi: update db_eqaa even if msaa is disabled
This seems to fix rendering in application toggling MSAA on and
off between draw calls.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7537
Cc: mesa-stable
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19326>
(cherry picked from commit 4147add280e408c68d7910c6cadd860cf92bf5f3)
2022-11-02 12:56:01 -07:00
Marcin Ślusarz
a2aa3198e0 anv: program 3DSTATE_MESH_DISTRIB with the recommended values
It improves performance of vk_meshlet_cadscene on A770.

Fixes: f083df8710 ("anv: update task/mesh distribution with the recommended values")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19412>
(cherry picked from commit dcaaeb56ef2951282225cc598fcd8781ed09f796)
2022-11-02 12:56:01 -07:00
Marcin Ślusarz
79b70f3978 anv: set 3DSTATE_[MESH|TASK]_CONTROL.MaximumNumberofThreadGroups
Documentation is worded in a confusing way, which may be understood that
we don't have to set this field to get good results.

MESH part of this commit improves performance of vk_meshlet_cadscene
by a factor of 2 on A380.

Fixes: ef04caea9b ("anv: Implement Mesh Shading pipeline")
Reviewed-by: Caio Oliveira <caio.oliveira@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19412>
(cherry picked from commit d1d2dee9708b5a3624696460d27969bc03940395)
2022-11-02 12:56:01 -07:00
Danylo Piliaiev
2a7c308d5d freedreno/fdl: Increase alignment for UBWC images
From empirical tests (on a660) R8G8 with UBWC enabled requires 256b
alignment, otherwise there would be a GPU fault during blits.

Set alignment to 4096 for all UBWC images since that's what blob does
and this area is heavily undertested.

Fixes GPU fault in Borderlands 3 running through DXVK.

cc: mesa-stable

Signed-off-by: Danylo Piliaiev <dpiliaiev@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19298>
(cherry picked from commit 5eaca461a774f6f8466402b5facfc426cee9f1fd)
2022-11-02 12:56:01 -07:00
Nanley Chery
ca30a3df24 iris: Enable INTEL_MEASURE for compute dispatches on XeHP
Cc: mesa-stable
Reviewed-by: Kenneth Graunke <kenneth@whitecape.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19324>
(cherry picked from commit 48844910a3ac395c44b2732c1ebaa98d03245a2d)
2022-11-02 12:56:01 -07:00
Lionel Landwerlin
e3a5a7683d intel/compiler: don't allocate compaction arrays on the stack
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7569
Cc: mesa-stable
Reviewed-by: Luis Felipe Strano Moraes <luis.strano@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19339>
(cherry picked from commit 920aed2121162adfecf205cdc0134c99e0bd4277)
2022-11-02 12:56:01 -07:00
Matt Turner
633ebd0c22 intel/dev: Set display_ver = 13 on all ADL/RPL/DG2
display_ver doesn't seem to be used anywhere, but if that were to
change, we'd want this to be consistent.

Fixes: c746bf4c5c ("intel/dev: Add display_ver and set adl-p to 13")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19354>
(cherry picked from commit 3ef88cd0a2de26e56def43db969f98c80235f065)
2022-11-02 12:56:01 -07:00
Iago Toral Quiroga
511013d313 v3dv: drop layout refs for all allocated sets from a pool on destroy / reset
In 7f6ecb8667 we added reference counting for descriptor set layouts,
however, we didn't realize that pools created without the flag
VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT don't free individual
descriptors and can only be reset or destroyed. Since we only drop
references when individual descriptor sets were destroyed, we would
leak set layouts referenced from descriptor sets allocated from these
pools.

Fix that by keeping a list of all allocated descriptor sets (no matter
whether VK_DESCRIPTOR_POOL_CREATE_FREE_DESCRIPTOR_SET_BIT is present or
not) and then traversing the list dropping the references on pool resets
and destroys.

Fixes: 7f6ecb8667 ('v3dv: add reference counting for descriptor set layouts')
Reviewed-by: Alejandro Piñeiro <apinheiro@igalia.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19337>
(cherry picked from commit 07c7d846e5fa6867ce20dd959b4609fd1a0f1646)
2022-11-02 12:56:01 -07:00
Lionel Landwerlin
81c02465a4 nir/divergence_analysis: add missing desc_set_address_intel
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Cc: mesa-stable
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19320>
(cherry picked from commit 117b32a5944890a535700937f1ebf4840ea3c0db)
2022-11-02 12:56:00 -07:00
Dylan Baker
2d2de06121 .pick_status.json: Update to 4087374deb53b79d6ac23c6ae87aadf9595d8d00 2022-11-02 12:56:00 -07:00
Lucas Stach
19b5417727 etnaviv: properly reference flush_resources
The flush_resources recorded in the context need to stay alive until
the context is flushed, at which point additional resolve operations
are done to those resources. While the backing BO is alive due to being
referenced in the cmdstream, the resource might already be destroyed
at this point.

Keep a reference to the resource to make sure it is still available at
context flush time.

Fixes: 7b9d8d1936 ("etnaviv: flush used render buffers on context flush when neccessary")
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19280>
(cherry picked from commit 16e0702ec7103c06f2f33654b6e41498e2eabf8e)
2022-11-02 12:56:00 -07:00
Gert Wollny
8cf878c4d0 r600/sfn: evaluate LDS location for color and clip-vertex too
This is required to support compatibility contexts

Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6926

Fixes: 3340c7ce35
   r600/sfn: lower CLIPVERTEX to clip planes

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19300>
(cherry picked from commit 1fe408e82fce04d8e2c86d5fd7321a4ca6afc8a8)
2022-11-02 12:56:00 -07:00
Gert Wollny
564410045d r600: Account for color and clipvertex when evaluating LDS space
Related: https://gitlab.freedesktop.org/mesa/mesa/-/issues/6926

Fixes: 3340c7ce35
   r600/sfn: lower CLIPVERTEX to clip planes

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19300>
(cherry picked from commit 7b4bf219cc9dfa6320366e03d6055cdcbf5add5e)
2022-11-02 12:56:00 -07:00
Dylan Baker
a784fe2937 .pick_status.json: Update to 16e0702ec7103c06f2f33654b6e41498e2eabf8e 2022-10-26 10:22:54 -07:00
Ruijing Dong
29bb4b3211 frontends/va: fix av1 decoding image distortion issue
problem:
when not using qmatrix, the qm_y, qm_u and qm_v value is set to 0,
which signals av1 decoder to use qmatix and causes confussion.

solution:
when not using qmatrix, set these values to 0xf.

fixed: https://gitlab.freedesktop.org/mesa/mesa/-/issues/5632

Reviewed-by: Sil Vilerino <sivileri@microsoft.com>
Signed-off-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19174>
2022-10-25 18:11:34 +00:00
Fabian Vogt
b6c47ce365 gallivm: Fix LLVM optimization with the new pass manager
The previous list of passes contained several errors: "constprop" does not
exist anymore and a trailing ',' is not allowed. This made LLVMRunPasses
fail, but the error is silently ignored. Thus none of the listed passes
ran at all.

https://reviews.llvm.org/D85159 suggests "InstSimplify really should be
used anywhere ConstProp is being used" so replace constprop with
instsimplify and remove the trailing comma.

By enabling pass logging with
LLVMPassBuilderOptionsSetDebugLogging(opts, true),
the difference is visible. Before:

Running pass: AlwaysInlinerPass on [module]
Running analysis: InnerAnalysisManagerProxy<llvm::FunctionAnalysisManager, llvm::Module> on [module]
Running analysis: ProfileSummaryAnalysis on [module]
Running pass: CoroConditionalWrapper on [module]
Running pass: AnnotationRemarksPass on fs_variant_partial (1162 instructions)
Running analysis: TargetLibraryAnalysis on fs_variant_partial
Running pass: AnnotationRemarksPass on fs_variant_whole (1110 instructions)
Running analysis: TargetLibraryAnalysis on fs_variant_whole

After:

Running pass: AlwaysInlinerPass on [module]
Running analysis: InnerAnalysisManagerProxy<llvm::FunctionAnalysisManager, llvm::Module> on [module]
Running analysis: ProfileSummaryAnalysis on [module]
Running pass: CoroConditionalWrapper on [module]
Running pass: AnnotationRemarksPass on fs_variant_partial (1162 instructions)
Running analysis: TargetLibraryAnalysis on fs_variant_partial
Running pass: AnnotationRemarksPass on fs_variant_whole (1110 instructions)
Running analysis: TargetLibraryAnalysis on fs_variant_whole
Running analysis: InnerAnalysisManagerProxy<llvm::FunctionAnalysisManager, llvm::Module> on [module]
Running pass: SROAPass on fs_variant_partial (1162 instructions)
Running analysis: DominatorTreeAnalysis on fs_variant_partial
Running analysis: AssumptionAnalysis on fs_variant_partial
Running analysis: TargetIRAnalysis on fs_variant_partial
Running pass: EarlyCSEPass on fs_variant_partial (1111 instructions)
Running analysis: TargetLibraryAnalysis on fs_variant_partial
Running pass: SimplifyCFGPass on fs_variant_partial (961 instructions)
Running pass: ReassociatePass on fs_variant_partial (961 instructions)
Running pass: PromotePass on fs_variant_partial (897 instructions)
Running pass: InstCombinePass on fs_variant_partial (897 instructions)
Running analysis: OptimizationRemarkEmitterAnalysis on fs_variant_partial
Running analysis: AAManager on fs_variant_partial
Running analysis: BasicAA on fs_variant_partial
Running analysis: ScopedNoAliasAA on fs_variant_partial
Running analysis: TypeBasedAA on fs_variant_partial
Running analysis: OuterAnalysisManagerProxy<llvm::ModuleAnalysisManager, llvm::Function> on fs_variant_partial
Running pass: SROAPass on fs_variant_whole (1110 instructions)
Running analysis: DominatorTreeAnalysis on fs_variant_whole
Running analysis: AssumptionAnalysis on fs_variant_whole
Running analysis: TargetIRAnalysis on fs_variant_whole
Running pass: EarlyCSEPass on fs_variant_whole (1059 instructions)
Running analysis: TargetLibraryAnalysis on fs_variant_whole
Running pass: SimplifyCFGPass on fs_variant_whole (912 instructions)
Running pass: ReassociatePass on fs_variant_whole (912 instructions)
Running pass: PromotePass on fs_variant_whole (844 instructions)
Running pass: InstCombinePass on fs_variant_whole (844 instructions)
Running analysis: OptimizationRemarkEmitterAnalysis on fs_variant_whole
Running analysis: AAManager on fs_variant_whole
Running analysis: BasicAA on fs_variant_whole
Running analysis: ScopedNoAliasAA on fs_variant_whole
Running analysis: TypeBasedAA on fs_variant_whole
Running analysis: OuterAnalysisManagerProxy<llvm::ModuleAnalysisManager, llvm::Function> on fs_variant_whole

Fixes: 2037c34f24 ("gallivm: move to new pass manager to handle coroutines change.")
Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19217>
(cherry picked from commit 28f4fcaa4f213314a72b8907464852e6fb7a6c2f)
2022-10-25 09:49:23 -07:00
Mike Blumenkrantz
9bda61ae91 zink: don't flag ubo0 as used in shaders with indirect ubo access
ubo0 is not a regular ubo, so avoid setting the hint here

cc: mesa-stable

Reviewed-by: Dave Airlie <airlied@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19281>
(cherry picked from commit 71ee1dd597e7a5ca6c7847e1110cfc49a4974201)
2022-10-25 09:49:23 -07:00
Pavel Ondračka
677721202e r300: respect buffer offset in r300_set_constant_buffer
Fixes constants upload with nine.
Thanks to Marek Olšák for pointing this out.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7481
Cc: mesa-stable
Signed-off-by: Pavel Ondračka <pavel.ondracka@gmail.com>
Reviewed-by: Filip Gawin <filip@gawin.net>
Reviewed-by: Emma Anholt <emma@anholt.net>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19277>
(cherry picked from commit 8a0c1dcbd6c484dcf36ab3f35e33c95a69c0c2af)
2022-10-25 09:25:48 -07:00
Georg Lehmann
80f296268e aco: Don't use opsel for p_insert.
This doesn't make sense, opsel preserves the not selected half of the register,
p_insert zeros it.

No Foz-DB changes.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Daniel Schürmann <daniel@schuermann.dev>

Fixes: 54292e99c7 ("aco: optimize 32-bit extracts and inserts using SDWA")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19253>
(cherry picked from commit 616d3908dc179c7319380111fd1cd5b047caeb75)
2022-10-25 09:25:46 -07:00
Rhys Perry
2572a61af1 aco: swap v_perm_b32 operands
I misread the ISA doc and got the order wrong.

Signed-off-by: Rhys Perry <pendingchaos02@gmail.com>
Reviewed-by: Samuel Pitoiset <samuel.pitoiset@gmail.com>
Fixes: dae1629778 ("aco: disable sdwa on gfx11")
Fixes: e68e6c75ca ("aco: use v_perm_b32 to copy 0xff00/0x00ff/0xff/0x00")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19223>
(cherry picked from commit f32dde29028a529c42431c387edade0886239aad)
2022-10-25 09:25:45 -07:00
Pierre-Eric Pelloux-Prayer
5a11a0f99c radeonsi: zero init using the correct components count
This fixes the replay of the trace attached to
https://gitlab.freedesktop.org/mesa/mesa/-/issues/7530 which
would otherwise fail with an LLVM error:
  "All operands to PHI node must be the same type as the PHI node!"

Fixes: ae4379d81e ("ac/nir: export some undef as zero")
Reviewed-by: Marek Olšák <marek.olsak@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19189>
(cherry picked from commit 434e74e658786446033c981d9de5627a4fbcdd23)
2022-10-25 09:25:44 -07:00
Georg Lehmann
b2e3963fd9 nir: Fix ifind_msb_rev constant folding.
For example if src0 is 0x80000000 we should return 1, not 0.

Signed-off-by: Georg Lehmann <dadschoorse@gmail.com>
Reviewed-by: Ian Romanick <ian.d.romanick@intel.com>
Reviewed-by: Rhys Perry <pendingchaos02@gmail.com>

Fixes: a5747f8ab3 ("nir: add opcodes for *find_msb_rev and lowering")
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18951>
(cherry picked from commit 741dbadae09ef376c1b6176f195b73930d1294db)
2022-10-25 09:25:44 -07:00
Emma Anholt
8771aff787 nir/opt_phi_precision: Fix missing swizzles when narrowing phi srcs.
This NIR:

	vec4 32 ssa_169 = phi block_1: ssa_168, block_2: ssa_138
	vec1 16 ssa_209 = f2fmp ssa_169.x
	vec1 16 ssa_210 = f2fmp ssa_169.y
	vec1 16 ssa_211 = f2fmp ssa_169.z
	vec1 16 ssa_212 = f2fmp ssa_169.w
	vec4 16 ssa_213 = vec4 ssa_209, ssa_210, ssa_211, ssa_212
	intrinsic store_output (ssa_213, ssa_171) (base=0, wrmask=xyzw /*15*/, component=0, src_type=float16 /*144*/, io location=4 slots=1 mediump /*8388740*/, xfb() /*0*/, xfb2() /*0*/)

would turn into:

	vec4 32 ssa_169 = phi block_1: ssa_168, block_2: ssa_138
	vec4 16 ssa_216 = phi block_1: ssa_214, block_2: ssa_215
	vec1 16 ssa_209 = f2fmp ssa_169.x
	vec1 16 ssa_210 = f2fmp ssa_169.y
	vec1 16 ssa_211 = f2fmp ssa_169.z
	vec1 16 ssa_212 = f2fmp ssa_169.w
	vec4 16 ssa_213 = vec4 ssa_216.x, ssa_216.x, ssa_216.x, ssa_216.x
	intrinsic store_output (ssa_213, ssa_171) (base=0, wrmask=xyzw /*15*/, component=0, src_type=float16 /*144*/, io location=4 slots=1 mediump /*8388740*/, xfb() /*0*/, xfb2() /*0*/)

ignoring the swizzles from the f2fmp srcs.  Fixes failures in
dEQP-GLES2.functional.shaders.random.all_features.fragment.20 on
turnip+ANGLE.

Fixes: c7b935962b ("nir: Add pass to lower phi precision")
Reviewed-by: Connor Abbott <cwabbott0@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19179>
(cherry picked from commit 22f7f167cdafe0facbab2ba2a89f5aadccc39dc5)
2022-10-25 09:25:41 -07:00
Yonggang Luo
7a124c1926 meson: with_glx never assigned to 'gallium-xlib', so need add with_glx == 'xlib' for dep_glproto
Fixes: 76791db088 ("mesa/x11: Remove the swrast-classic-based fake libGL")

Signed-off-by: Yonggang Luo <luoyonggang@gmail.com>
Reviewed-by: Eric Engestrom <eric@igalia.com>
Reviewed-by: Adam Jackson <ajax@redhat.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19221>
(cherry picked from commit 814682d00c7f016497afe52cd5c6e86f00110d7c)
2022-10-25 09:25:41 -07:00
Dylan Baker
4baf2e9c9e .pick_status.json: Update to 938e13c57d095dafb752a2edf22c6a02afcd0b28 2022-10-25 09:25:31 -07:00
Dylan Baker
d9612f8e99 .pick_status.json: Update to 93febe1198a03c16c18fc413501ba710edc8b1ec 2022-10-20 09:23:55 -07:00
Dylan Baker
16d3384210 docs: Add sha256 sum for 22.2.2 2022-10-19 10:06:27 -07:00
Dylan Baker
c4f0686207
VERSION: update to 22.2.2 2022-10-19 09:50:22 -07:00
Dylan Baker
247d83cccf docs: add release notes for 22.2.2 2022-10-19 09:50:22 -07:00
Dave Airlie
aa1df86867 gallivm: handle llvm coroutines for llvm > 15
LLVM 15 changed the coroutine presplit function attribute in

735e6c40b5e9 [Coroutines] Convert coroutine.presplit to enum attr

This needed to be updated in mesa.

Cc: mesa-stable
Acked-by: Mike Blumenkrantz <michael.blumenkrantz@gmail.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18815>
(cherry picked from commit bcb136d548e607dbc9b72df0f575710ee03947ec)

Conflicts:
	src/gallium/auxiliary/gallivm/lp_bld_intr.h
2022-10-18 10:03:57 -07:00
Lionel Landwerlin
ab947b5778 anv: add missing tracepoint
Signed-off-by: Lionel Landwerlin <lionel.g.landwerlin@intel.com>
Fixes: 3501a3f9ed ("anv: Convert to 100% dynamic rendering")
Reviewed-by: Ivan Briano <ivan.briano@intel.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/17467>
(cherry picked from commit b12d95f5132f0899cd77d4c5f4ac656261b5e76b)

Conflicts:
	src/intel/vulkan/genX_cmd_buffer.c
2022-10-18 09:58:46 -07:00
Gert Wollny
3ae1f0120b virgl: Report CONSTANT_BUFFER_SIZE according to GL_MAX_UNIFORM_BLOCK_SIZE
GL_MAX_FRAGMENT_UNIFORM_COMPONENTS may not report a size that
is useful to calculate the supported UBO size. Use the value
GL_MAX_UNIFORM_BLOCK_SIZE instead when the host supports this.

Related: https://gitlab.freedesktop.org/virgl/virglrenderer/-/issues/286
Fixes: 5b683ba19a
  virgl: Only progagate the uniform numbers if the numbers are actually right

Signed-off-by: Gert Wollny <gert.wollny@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18512>
(cherry picked from commit 95cea62a9b7b4b2caa3835e4f5e04d83df1de0a3)

Conflicts:
	src/virtio/virtio-gpu/virgl_hw.h
2022-10-18 09:53:54 -07:00
Sil Vilerino
e2472db43b d3d12: Implement cap PIPE_VIDEO_SUPPORTS_CONTIGUOUS_PLANES_MAP
Reports d3d12 support for mapping all the contiguous planes.
This will be used by vaDeriveImage in the VA frontend

Fixes: a585d95803 ("radeonsi/vcn: WA 10bit encoding crash in vaapi")

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18300>
(cherry picked from commit a1f904f7a3de33299932645296d481cda2163683)
2022-10-18 09:46:23 -07:00
Sil Vilerino
30511c9e05 gallium/va: vaDeriveImage to check PIPE_VIDEO_SUPPORTS_CONTIGUOUS_PLANES_MAP
vaDeriveImage should check if the underlying gallium driver can map contiguous planes
before skipping with disallowlist.

Fixes: a585d95803 ("radeonsi/vcn: WA 10bit encoding crash in vaapi")

Reviewed-by: Ruijing Dong <ruijing.dong@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18300>
(cherry picked from commit 81ae033b949953ef0c43edef3d0eb12e4741ee2e)

Conflicts:
	src/gallium/include/pipe/p_video_enums.h
2022-10-18 09:46:21 -07:00
Dylan Baker
6a8e593476 .pick_status.json: Mark dbd022f2ab43ff0a9ecc05c61123467e25f109de as backported 2022-10-18 09:44:18 -07:00
Alyssa Rosenzweig
f132890130 nir: Fix nir_fmax_abs_vec_comp
This failed to take fabs of the first component, implementing an unintended
formula that would return the right results in some common cases but is wrong in
general:

   max { x, |y|, |z| }

instead of the intended

   max { |x|, |y|, |z| }

Reexpress the implementation to make correctness obvious.

Fixes: 272e927d0e ("nir/spirv: initial handling of OpenCL.std extension opcodes")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Reviewed-by: Karol Herbst <kherbst@redhat.com>
Reviewed-by: Jason Ekstrand <jason.ekstrand@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/18754>
(cherry picked from commit fc5c671e8785c89cf986181e0e3e7fa8742c4dce)
2022-10-18 09:41:23 -07:00
Dylan Baker
d39f908b20 .pick_status.json: Mark 4c7a44413a07d3fb314f786e047bb7212c082a6c as denominated 2022-10-18 09:41:20 -07:00
Dylan Baker
9c1d08b94d .pick_status.json: Update to b02e9ef35a0446019cda9473e4c355c7cc4bb24d 2022-10-18 09:41:14 -07:00
Daniel Schürmann
f9dc71cebe aco/spill: Fix spilling of Phi operands
By adding the renamed variable, phi operands got spilled twice at the precessors.

Fixes: dEQP-VK.ray_query.misc.dynamic_indexing
Closes: #7493
Cc: mesa-stable
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19109>
(cherry picked from commit ebf7f7a1827006394fc6355ee245e45b6cfe2793)
2022-10-17 13:56:06 -07:00
Alyssa Rosenzweig
86f250ac27 pan/mdg: Fix 16-bit alignment with spiller
The loop over sources has to happen for every instruction, regardless of whether
we also need to register allocate the destination. The other source loops handle
this properly, but this one was missed.

Fixes spilling failure in shaders/android/angle/aztec_ruins/16.shader_test when
the input NIR is shuffled a bit (from reordering passes).

Fixes: 129d390bd8 ("pan/mdg: Fix bound setting in RA for sources")
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19093>
(cherry picked from commit 829f769e602a7bbff4a0603076cb74ce9a966e8e)
2022-10-17 13:56:06 -07:00
Alyssa Rosenzweig
9a7a02799e pan/mdg: Lower PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK on Midgard
The register file on Midgard is not large enough to sustain 256 threads in a
threadgroup when all ISA-defined registers are used. As such, we want
to advertise the smallest MAX_THREADS_PER_BLOCK permissible by the spec to
avoid compiling shaders that will necessarily spill. The minimum-maximum in
OpenGL ES 3.1 is 128, so set that on Midgard.

6 compute shaders LOST in shader-db due to exceeding this new limit. These
shaders would fault if they were attempted to be executed.

Cc: mesa-stable
Signed-off-by: Alyssa Rosenzweig <alyssa@collabora.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19092>
(cherry picked from commit 9b19104a30bba35c4025833d5022c8ddc6c1ccd0)
2022-10-17 13:56:06 -07:00
Timothy Arceri
18a57663d3 glthread: leave dlist dispatch in place for Begin/End
If Begin/End are called from a display list make sure to leave
the dlist.c's dispatch table in place just like the non-glthread
code does.

Closes: https://gitlab.freedesktop.org/mesa/mesa/-/issues/7335
Fixes: 7f1cac7ba6 ("mesa/glthread: enable immediate mode")

Reviewed-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/19088>
(cherry picked from commit 7dcdd519385aaa4fddfa1368fbbbc89c408befe3)
2022-10-17 13:56:06 -07:00