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Add definitions for cl_arm_controlled_kernel_termination (#152)
* Add definitions for cl_arm_controlled_kernel_termination Signed-off-by: Kevin Petit <kevin.petit@arm.com> Change-Id: I8802d7ef06b619814f898b5215f3592886a744bf * Break cl_command_termination_reason_arm enum into separate definitions Signed-off-by: Kevin Petit <kevin.petit@arm.com> Change-Id: I109b45a222736a5d5346f44ea42e90271a1c79fe * Add cl_device_controlled_termination_capabilities_arm Change-Id: Ic5a0f40e96a0ac03eddca2a4eed26756ce5130ec
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CL/cl_ext.h
30
CL/cl_ext.h
@ -906,6 +906,36 @@ typedef cl_bitfield cl_device_scheduling_controls_capabilities_arm;
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#define CL_QUEUE_KERNEL_BATCHING_ARM 0x41E7
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#define CL_QUEUE_DEFERRED_FLUSH_ARM 0x41EC
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/**************************************
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* cl_arm_controlled_kernel_termination
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***************************************/
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#define cl_arm_controlled_kernel_termination 1
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/* Error code to indicate kernel terminated with failure */
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#define CL_COMMAND_TERMINATED_ITSELF_WITH_FAILURE_ARM -1108
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/* cl_device_info */
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#define CL_DEVICE_CONTROLLED_TERMINATION_CAPABILITIES_ARM 0x41EE
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/* Bit fields for controlled termination feature query */
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typedef cl_bitfield cl_device_controlled_termination_capabilities_arm;
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#define CL_DEVICE_CONTROLLED_TERMINATION_SUCCESS_ARM (1 << 0)
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#define CL_DEVICE_CONTROLLED_TERMINATION_FAILURE_ARM (1 << 1)
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#define CL_DEVICE_CONTROLLED_TERMINATION_QUERY_ARM (1 << 2)
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/* cl_event_info */
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#define CL_EVENT_COMMAND_TERMINATION_REASON_ARM 0x41ED
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/* Values returned for event termination reason query */
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typedef cl_uint cl_command_termination_reason_arm;
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#define CL_COMMAND_TERMINATION_COMPLETION_ARM 0
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#define CL_COMMAND_TERMINATION_CONTROLLED_SUCCESS_ARM 1
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#define CL_COMMAND_TERMINATION_CONTROLLED_FAILURE_ARM 2
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#define CL_COMMAND_TERMINATION_ERROR_ARM 3
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/***************************************
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* cl_intel_thread_local_exec extension *
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****************************************/
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