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Implement SPV_KHR_uniform_group_instructions extension

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Spec: https://github.com/KhronosGroup/SPIRV-Registry/pull/138
This commit is contained in:
Nikita Kornev
2022-02-18 11:31:31 +03:00
parent 6affe04fba
commit 5b634e4352
9 changed files with 224 additions and 2 deletions
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include/spirv/unified1/spirv.core.grammar.json
+126
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@@ -8549,6 +8549,126 @@
],
"capabilities" : [ "LongConstantCompositeINTEL" ],
"version" : "None"
},
{
"opname" : "OpGroupIMulKHR",
"class" : "Group",
"opcode" : 6401,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupFMulKHR",
"class" : "Group",
"opcode" : 6402,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupBitwiseAndKHR",
"class" : "Group",
"opcode" : 6403,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupBitwiseOrKHR",
"class" : "Group",
"opcode" : 6404,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupBitwiseXorKHR",
"class" : "Group",
"opcode" : 6405,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupLogicalAndKHR",
"class" : "Group",
"opcode" : 6406,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupLogicalOrKHR",
"class" : "Group",
"opcode" : 6407,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
},
{
"opname" : "OpGroupLogicalXorKHR",
"class" : "Group",
"opcode" : 6408,
"operands" : [
{ "kind" : "IdResultType" },
{ "kind" : "IdResult" },
{ "kind" : "IdScope", "name" : "'Execution'" },
{ "kind" : "GroupOperation", "name" : "'Operation'" },
{ "kind" : "IdRef", "name" : "'X'" }
],
"capabilities" : [ "GroupUniformArithmeticKHR" ],
"extensions" : [ "SPV_KHR_uniform_group_instructions" ],
"version" : "None"
}
],
"operand_kinds" : [
@@ -13881,6 +14001,12 @@
"value" : 6114,
"extensions" : [ "SPV_INTEL_debug_module" ],
"version" : "None"
},
{
"enumerant" : "GroupUniformArithmeticKHR",
"value" : 6400,
"extensions" : [ "SPV_KHR_uniform_group_instructions"],
"version" : "None"
}
]
},
include/spirv/unified1/spirv.cs
+9
View File
@@ -1087,6 +1087,7 @@ namespace Spv
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
GroupUniformArithmeticKHR = 6400,
}
public enum RayFlagsShift
@@ -1851,6 +1852,14 @@ namespace Spv
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
}
}
}
include/spirv/unified1/spirv.h
+17
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@@ -1087,6 +1087,7 @@ typedef enum SpvCapability_ {
SpvCapabilityOptNoneINTEL = 6094,
SpvCapabilityAtomicFloat16AddEXT = 6095,
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityMax = 0x7fffffff,
} SpvCapability;
@@ -1849,6 +1850,14 @@ typedef enum SpvOp_ {
SpvOpTypeStructContinuedINTEL = 6090,
SpvOpConstantCompositeContinuedINTEL = 6091,
SpvOpSpecConstantCompositeContinuedINTEL = 6092,
SpvOpGroupIMulKHR = 6401,
SpvOpGroupFMulKHR = 6402,
SpvOpGroupBitwiseAndKHR = 6403,
SpvOpGroupBitwiseOrKHR = 6404,
SpvOpGroupBitwiseXorKHR = 6405,
SpvOpGroupLogicalAndKHR = 6406,
SpvOpGroupLogicalOrKHR = 6407,
SpvOpGroupLogicalXorKHR = 6408,
SpvOpMax = 0x7fffffff,
} SpvOp;
@@ -2503,6 +2512,14 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
}
}
#endif /* SPV_ENABLE_UTILITY_CODE */
include/spirv/unified1/spirv.hpp
+17
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@@ -1083,6 +1083,7 @@ enum Capability {
CapabilityOptNoneINTEL = 6094,
CapabilityAtomicFloat16AddEXT = 6095,
CapabilityDebugInfoModuleINTEL = 6114,
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityMax = 0x7fffffff,
};
@@ -1845,6 +1846,14 @@ enum Op {
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
OpMax = 0x7fffffff,
};
@@ -2499,6 +2508,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
}
}
#endif /* SPV_ENABLE_UTILITY_CODE */
include/spirv/unified1/spirv.hpp11
+17
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@@ -1083,6 +1083,7 @@ enum class Capability : unsigned {
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
GroupUniformArithmeticKHR = 6400,
Max = 0x7fffffff,
};
@@ -1845,6 +1846,14 @@ enum class Op : unsigned {
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
Max = 0x7fffffff,
};
@@ -2499,6 +2508,14 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
}
}
#endif /* SPV_ENABLE_UTILITY_CODE */
include/spirv/unified1/spirv.json
+11 -2
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@@ -1064,7 +1064,8 @@
"LongConstantCompositeINTEL": 6089,
"OptNoneINTEL": 6094,
"AtomicFloat16AddEXT": 6095,
"DebugInfoModuleINTEL": 6114
"DebugInfoModuleINTEL": 6114,
"GroupUniformArithmeticKHR": 6400
}
},
{
@@ -1837,7 +1838,15 @@
"OpTypeBufferSurfaceINTEL": 6086,
"OpTypeStructContinuedINTEL": 6090,
"OpConstantCompositeContinuedINTEL": 6091,
"OpSpecConstantCompositeContinuedINTEL": 6092
"OpSpecConstantCompositeContinuedINTEL": 6092,
"OpGroupIMulKHR": 6401,
"OpGroupFMulKHR": 6402,
"OpGroupBitwiseAndKHR": 6403,
"OpGroupBitwiseOrKHR": 6404,
"OpGroupBitwiseXorKHR": 6405,
"OpGroupLogicalAndKHR": 6406,
"OpGroupLogicalOrKHR": 6407,
"OpGroupLogicalXorKHR": 6408
}
}
]
include/spirv/unified1/spirv.lua
+9
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@@ -1045,6 +1045,7 @@ spv = {
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
GroupUniformArithmeticKHR = 6400,
},
RayFlagsShift = {
@@ -1796,6 +1797,14 @@ spv = {
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
},
}
include/spirv/unified1/spirv.py
+9
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@@ -1045,6 +1045,7 @@ spv = {
'OptNoneINTEL' : 6094,
'AtomicFloat16AddEXT' : 6095,
'DebugInfoModuleINTEL' : 6114,
'GroupUniformArithmeticKHR' : 6400,
},
'RayFlagsShift' : {
@@ -1796,6 +1797,14 @@ spv = {
'OpTypeStructContinuedINTEL' : 6090,
'OpConstantCompositeContinuedINTEL' : 6091,
'OpSpecConstantCompositeContinuedINTEL' : 6092,
'OpGroupIMulKHR' : 6401,
'OpGroupFMulKHR' : 6402,
'OpGroupBitwiseAndKHR' : 6403,
'OpGroupBitwiseOrKHR' : 6404,
'OpGroupBitwiseXorKHR' : 6405,
'OpGroupLogicalAndKHR' : 6406,
'OpGroupLogicalOrKHR' : 6407,
'OpGroupLogicalXorKHR' : 6408,
},
}
include/spirv/unified1/spv.d
+9
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@@ -1090,6 +1090,7 @@ enum Capability : uint
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
GroupUniformArithmeticKHR = 6400,
}
enum RayFlagsShift : uint
@@ -1854,6 +1855,14 @@ enum Op : uint
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
}