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移植spirv-headers,适配vkgl测试套件编译

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Signed-off-by: wangshi <wangshi@kaihong.com>
This commit is contained in:
wangshi 2022-11-15 15:45:09 +08:00
parent b2a156e1c0
commit d8b5806bc9
15 changed files with 126 additions and 1465 deletions
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43
include/spirv/spir-v.xml
View File

@ -55,7 +55,7 @@
<id value="2" vendor="Valve" comment="Contact TBD"/>
<id value="3" vendor="Codeplay" comment="Contact Victor Lomuller, victor@codeplay.com"/>
<id value="4" vendor="NVIDIA" comment="Contact Kerch Holt, kholt@nvidia.com"/>
<id value="5" vendor="ARM" comment="Contact Kevin Petit, kevin.petit@arm.com"/>
<id value="5" vendor="ARM" comment="Contact Alexander Galazin, alexander.galazin@arm.com"/>
<id value="6" vendor="Khronos" tool="LLVM/SPIR-V Translator" comment="Contact Yaxun (Sam) Liu, yaxun.liu@amd.com"/>
<id value="7" vendor="Khronos" tool="SPIR-V Tools Assembler" comment="Contact David Neto, dneto@google.com"/>
<id value="8" vendor="Khronos" tool="Glslang Reference Front End" comment="Contact John Kessenich, johnkessenich@google.com"/>
@ -81,11 +81,7 @@
<id value="28" vendor="gfx-rs community" tool="Naga" comment="https://github.com/gfx-rs/naga"/>
<id value="29" vendor="Mikkosoft Productions" tool="MSP Shader Compiler" comment="Contact Mikko Rasa, tdb@tdb.fi"/>
<id value="30" vendor="SpvGenTwo community" tool="SpvGenTwo SPIR-V IR Tools" comment="https://github.com/rAzoR8/SpvGenTwo"/>
<id value="31" vendor="Google" tool="Skia SkSL" comment="Contact Ethan Nicholas, ethannicholas@google.com"/>
<id value="32" vendor="TornadoVM" tool="SPIRV Beehive Toolkit" comment="https://github.com/beehive-lab/spirv-beehive-toolkit"/>
<id value="33" vendor="DragonJoker" tool="ShaderWriter" comment="Contact Sylvain Doremus, https://github.com/DragonJoker/ShaderWriter"/>
<id value="34" vendor="Rayan Hatout" tool="SPIRVSmith" comment="Contact Rayan Hatout rayan.hatout@gmail.com, Repo https://github.com/rayanht/SPIRVSmith"/>
<unused start="35" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
<unused start="31" end="0xFFFF" comment="Tool ID range reservable for future use by vendors"/>
</ids>
<!-- SECTION: SPIR-V Opcodes and Enumerants -->
@ -122,7 +118,7 @@
<!-- Begin reservations of opcode enumerants -->
<ids type="opcode" start="0" end="4095" vendor="Khronos" comment="Reserved opcodes, not available to vendors - see the SPIR-V Specification"/>
<ids type="opcode" start="4096" end="4159" vendor="Mesa" comment="Contact TBD"/>
<ids type="opcode" start="4160" end="4415" vendor="ARM" comment="Contact kevin.petit@arm.com"/>
<ids type="opcode" start="4160" end="4415" vendor="ARM"/>
<ids type="opcode" start="4416" end="4479" vendor="Khronos" comment="SPV_ARB_shader_ballot - contact Neil Henning, neil.henning@amd.com"/>
<ids type="opcode" start="4480" end="4991" vendor="Qualcomm" comment="Contact weifengz@qti.qualcomm.com"/>
<ids type="opcode" start="4992" end="5247" vendor="AMD"/>
@ -137,21 +133,20 @@
<ids type="opcode" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.com"/>
<ids type="opcode" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="opcode" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/>
<ids type="opcode" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/>
<!-- Opcode enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="opcode" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
<ids type="opcode" start="6464" end="65535" comment="Opcode range reservable for future use by vendors"/>
<ids type="opcode" start="6400" end="65535" comment="Opcode range reservable for future use by vendors"/>
<!-- End reservations of opcodes -->
<!-- Begin reservations of non-opcode enumerants -->
<ids type="enumerant" start="0" end="4095" vendor="Khronos" comment="Reserved enumerants, not available to vendors - see the SPIR-V Specification"/>
<ids type="enumerant" start="4096" end="4159" vendor="Mesa" comment="Contact TBD"/>
<ids type="enumerant" start="4160" end="4415" vendor="ARM" comment="Contact kevin.petit@arm.com"/>
<ids type="enumerant" start="4160" end="4415" vendor="ARM"/>
<ids type="enumerant" start="4416" end="4479" vendor="Khronos" comment="SPV_ARB_shader_ballot - contact Neil Henning, neil.henning@amd.com"/>
<ids type="enumerant" start="4480" end="4991" vendor="Qualcomm" comment="Contact weifengz@qti.qualcomm.com"/>
<ids type="enumerant" start="4992" end="5247" vendor="AMD"/>
@ -166,15 +161,13 @@
<ids type="enumerant" start="6080" end="6143" vendor="Intel" comment="Contact mariusz.merecki@intel.com"/>
<ids type="enumerant" start="6144" end="6271" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="enumerant" start="6272" end="6399" vendor="Huawei" comment="Contact wanghuilong2@xunweitech.com"/>
<ids type="enumerant" start="6400" end="6463" vendor="Intel" comment="Contact ben.ashbaugh@intel.com"/>
<ids type="enumerant" start="6464" end="6527" vendor="Mikkosoft Productions" comment="Contact Mikko Rasa, tdb@tdb.fi"/>
<!-- Enumerants to reserve for future use. To get a block, allocate
multiples of 64 starting at the lowest available point in this
block and add a corresponding <ids> tag immediately above. Make
sure to fill in the vendor attribute, and preferably add a contact
person/address in a comment attribute. -->
<!-- Example new block: <ids type="enumerant" start="XXXX" end="XXXX+64n-1" vendor="Add vendor" comment="Contact TBD"/> -->
<ids type="enumerant" start="6528" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<ids type="enumerant" start="6400" end="4294967295" comment="Enumerant range reservable for future use by vendors"/>
<!-- End reservations of enumerants -->
@ -194,8 +187,8 @@
<!-- Reserved loop control bits -->
<ids type="LoopControl" start="0" end="15" vendor="Khronos" comment="Reserved LoopControl bits, not available to vendors - see the SPIR-V Specification"/>
<ids type="LoopControl" start="16" end="25" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="LoopControl" start="26" end="30" comment="Unreserved bits reservable for use by vendors"/>
<ids type="LoopControl" start="16" end="24" vendor="Intel" comment="Contact michael.kinsner@intel.com"/>
<ids type="LoopControl" start="25" end="30" comment="Unreserved bits reservable for use by vendors"/>
<ids type="LoopControl" start="31" end="31" vendor="Khronos" comment="Reserved LoopControl bit, not available to vendors"/>
@ -258,24 +251,4 @@
<ids type="MemoryOperand" start="18" end="30" comment="Unreserved bits reservable for use by vendors"/>
<ids type="MemoryOperand" start="31" end="31" vendor="Khronos" comment="Reserved MemoryOperand bit, not available to vendors"/>
<!-- SECTION: SPIR-V Image Operand Bit Reservations -->
<!-- Reserve ranges of bits in the image operands bitfield.
Each vendor determines the use of values in their own ranges.
Vendors are not required to disclose those uses. If the use of a
value is included in an extension that is adopted by a Khronos
extension or specification, then that value's use may be permanently
fixed as if originally reserved in a Khronos range.
The SPIR Working Group strongly recommends:
- Each value is used for only one purpose.
- All values in a range should be used before allocating a new range.
-->
<!-- Reserved image operand bits -->
<ids type="ImageOperand" start="0" end="15" vendor="Khronos" comment="Reserved ImageOperand bits, not available to vendors - see the SPIR-V Specification"/>
<ids type="ImageOperand" start="16" end="16" vendor="Nvidia" comment="Contact pmistry@nvidia.com"/>
<ids type="ImageOperand" start="17" end="30" comment="Unreserved bits reservable for use by vendors"/>
<ids type="ImageOperand" start="31" end="31" vendor="Khronos" comment="Reserved ImageOperand bit, not available to vendors"/>
</registry>

3
include/spirv/unified1/NonSemanticClspvReflection.h
View File

@ -33,7 +33,7 @@ extern "C" {
#endif
enum {
NonSemanticClspvReflectionRevision = 2,
NonSemanticClspvReflectionRevision = 1,
NonSemanticClspvReflectionRevision_BitWidthPadding = 0x7fffffff
};
@ -62,7 +62,6 @@ enum NonSemanticClspvReflectionInstructions {
NonSemanticClspvReflectionConstantDataUniform = 22,
NonSemanticClspvReflectionLiteralSampler = 23,
NonSemanticClspvReflectionPropertyRequiredWorkgroupSize = 24,
NonSemanticClspvReflectionSpecConstantSubgroupMaxSize = 25,
NonSemanticClspvReflectionInstructionsMax = 0x7fffffff
};

9
include/spirv/unified1/extinst.nonsemantic.clspvreflection.grammar.json
View File

@ -1,5 +1,5 @@
{
"revision" : 2,
"revision" : 1,
"instructions" : [
{
"opname" : "Kernel",
@ -232,13 +232,6 @@
{ "kind" : "IdRef", "name" : "Y" },
{ "kind" : "IdRef", "name" : "Z" }
]
},
{
"opname" : "SpecConstantSubgroupMaxSize",
"opcode" : 25,
"operands" : [
{ "kind" : "IdRef", "name" : "Size" }
]
}
]
}

696
include/spirv/unified1/spirv.core.grammar.json
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80
include/spirv/unified1/spirv.cs
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@ -26,7 +26,7 @@
// the Binary Section of the SPIR-V specification.
// Enumeration tokens for SPIR-V, in various styles:
// C, C++, C++11, JSON, Lua, Python, C#, D, Beef
// C, C++, C++11, JSON, Lua, Python, C#, D
//
// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
// - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -36,8 +36,6 @@
// - C# will use enum classes in the Specification class located in the "Spv" namespace,
// e.g.: Spv.Specification.SourceLanguage.GLSL
// - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
// - Beef will use enum classes in the Specification class located in the "Spv" namespace,
// e.g.: Spv.Specification.SourceLanguage.GLSL
//
// Some tokens act like mask values, which can be OR'd together,
// while others are mutually exclusive. The mask-like ones have
@ -50,8 +48,8 @@ namespace Spv
public static class Specification
{
public const uint MagicNumber = 0x07230203;
public const uint Version = 0x00010600;
public const uint Revision = 1;
public const uint Version = 0x00010500;
public const uint Revision = 4;
public const uint OpCodeMask = 0xffff;
public const uint WordCountShift = 16;
@ -64,7 +62,6 @@ namespace Spv
OpenCL_CPP = 4,
HLSL = 5,
CPP_for_OpenCL = 6,
SYCL = 7,
}
public enum ExecutionModel
@ -157,14 +154,7 @@ namespace Spv
SignedZeroInfNanPreserve = 4461,
RoundingModeRTE = 4462,
RoundingModeRTZ = 4463,
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
StencilRefUnchangedFrontAMD = 5079,
StencilRefGreaterFrontAMD = 5080,
StencilRefLessFrontAMD = 5081,
StencilRefUnchangedBackAMD = 5082,
StencilRefGreaterBackAMD = 5083,
StencilRefLessBackAMD = 5084,
OutputLinesNV = 5269,
OutputPrimitivesNV = 5270,
DerivativeGroupQuadsNV = 5289,
@ -186,7 +176,6 @@ namespace Spv
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
NamedBarrierCountINTEL = 6417,
}
public enum StorageClass
@ -360,8 +349,6 @@ namespace Spv
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
Nontemporal = 14,
Offsets = 16,
}
public enum ImageOperandsMask
@ -385,8 +372,6 @@ namespace Spv
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
Nontemporal = 0x00004000,
Offsets = 0x00010000,
}
public enum FPFastMathModeShift
@ -505,7 +490,6 @@ namespace Spv
PerPrimitiveNV = 5271,
PerViewNV = 5272,
PerTaskNV = 5273,
PerVertexKHR = 5285,
PerVertexNV = 5285,
NonUniform = 5300,
NonUniformEXT = 5300,
@ -513,10 +497,6 @@ namespace Spv
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
BindlessSamplerNV = 5398,
BindlessImageNV = 5399,
BoundSamplerNV = 5400,
BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@ -551,14 +531,11 @@ namespace Spv
PrefetchINTEL = 5902,
StallEnableINTEL = 5905,
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
}
public enum BuiltIn
@ -643,9 +620,7 @@ namespace Spv
LayerPerViewNV = 5279,
MeshViewCountNV = 5280,
MeshViewIndicesNV = 5281,
BaryCoordKHR = 5286,
BaryCoordNV = 5286,
BaryCoordNoPerspKHR = 5287,
BaryCoordNoPerspNV = 5287,
FragSizeEXT = 5292,
FragmentSizeNV = 5292,
@ -684,7 +659,6 @@ namespace Spv
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
CullMaskKHR = 6021,
}
public enum SelectionControlShift
@ -816,8 +790,6 @@ namespace Spv
MakePointerVisibleKHR = 4,
NonPrivatePointer = 5,
NonPrivatePointerKHR = 5,
AliasScopeINTELMask = 16,
NoAliasINTELMask = 17,
}
public enum MemoryAccessMask
@ -832,8 +804,6 @@ namespace Spv
MakePointerVisibleKHR = 0x00000010,
NonPrivatePointer = 0x00000020,
NonPrivatePointerKHR = 0x00000020,
AliasScopeINTELMask = 0x00010000,
NoAliasINTELMask = 0x00020000,
}
public enum Scope
@ -948,7 +918,6 @@ namespace Spv
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
UniformDecoration = 71,
FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
@ -997,7 +966,6 @@ namespace Spv
FragmentFullyCoveredEXT = 5265,
MeshShadingNV = 5266,
ImageFootprintNV = 5282,
FragmentBarycentricKHR = 5284,
FragmentBarycentricNV = 5284,
ComputeDerivativeGroupQuadsNV = 5288,
FragmentDensityEXT = 5291,
@ -1042,9 +1010,7 @@ namespace Spv
FragmentShaderShadingRateInterlockEXT = 5372,
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocation = 5379,
DemoteToHelperInvocationEXT = 5379,
BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1077,32 +1043,23 @@ namespace Spv
FPGAMemoryAccessesINTEL = 5898,
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
IOPipesINTEL = 5943,
BlockingPipesINTEL = 5945,
FPGARegINTEL = 5948,
DotProductInputAll = 6016,
DotProductInputAllKHR = 6016,
DotProductInput4x8Bit = 6017,
DotProductInput4x8BitKHR = 6017,
DotProductInput4x8BitPacked = 6018,
DotProductInput4x8BitPackedKHR = 6018,
DotProduct = 6019,
DotProductKHR = 6019,
RayCullMaskKHR = 6020,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongConstantCompositeINTEL = 6089,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
GroupUniformArithmeticKHR = 6400,
}
public enum RayFlagsShift
@ -1204,7 +1161,6 @@ namespace Spv
public enum PackedVectorFormat
{
PackedVectorFormat4x8Bit = 0,
PackedVectorFormat4x8BitKHR = 0,
}
@ -1560,24 +1516,17 @@ namespace Spv
OpSubgroupAllKHR = 4428,
OpSubgroupAnyKHR = 4429,
OpSubgroupAllEqualKHR = 4430,
OpGroupNonUniformRotateKHR = 4431,
OpSubgroupReadInvocationKHR = 4432,
OpTraceRayKHR = 4445,
OpExecuteCallableKHR = 4446,
OpConvertUToAccelerationStructureKHR = 4447,
OpIgnoreIntersectionKHR = 4448,
OpTerminateRayKHR = 4449,
OpSDot = 4450,
OpSDotKHR = 4450,
OpUDot = 4451,
OpUDotKHR = 4451,
OpSUDot = 4452,
OpSUDotKHR = 4452,
OpSDotAccSat = 4453,
OpSDotAccSatKHR = 4453,
OpUDotAccSat = 4454,
OpUDotAccSatKHR = 4454,
OpSUDotAccSat = 4455,
OpSUDotAccSatKHR = 4455,
OpTypeRayQueryKHR = 4472,
OpRayQueryInitializeKHR = 4473,
@ -1617,16 +1566,8 @@ namespace Spv
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
OpConvertSamplerToUNV = 5394,
OpConvertUToSampledImageNV = 5395,
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -1651,7 +1592,7 @@ namespace Spv
OpUSubSatINTEL = 5596,
OpIMul32x16INTEL = 5597,
OpUMul32x16INTEL = 5598,
OpConstantFunctionPointerINTEL = 5600,
OpConstFunctionPointerINTEL = 5600,
OpFunctionPointerCallINTEL = 5601,
OpAsmTargetINTEL = 5609,
OpAsmINTEL = 5610,
@ -1827,9 +1768,6 @@ namespace Spv
OpArbitraryFloatPowRINTEL = 5881,
OpArbitraryFloatPowNINTEL = 5882,
OpLoopControlINTEL = 5887,
OpAliasDomainDeclINTEL = 5911,
OpAliasScopeDeclINTEL = 5912,
OpAliasScopeListDeclINTEL = 5913,
OpFixedSqrtINTEL = 5923,
OpFixedRecipINTEL = 5924,
OpFixedRsqrtINTEL = 5925,
@ -1868,16 +1806,6 @@ namespace Spv
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
}
}
}

124
include/spirv/unified1/spirv.h
View File

@ -31,7 +31,7 @@
/*
** Enumeration tokens for SPIR-V, in various styles:
** C, C++, C++11, JSON, Lua, Python, C#, D, Beef
** C, C++, C++11, JSON, Lua, Python, C#, D
**
** - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
** - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -41,8 +41,6 @@
** - C# will use enum classes in the Specification class located in the "Spv" namespace,
** e.g.: Spv.Specification.SourceLanguage.GLSL
** - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
** - Beef will use enum classes in the Specification class located in the "Spv" namespace,
** e.g.: Spv.Specification.SourceLanguage.GLSL
**
** Some tokens act like mask values, which can be OR'd together,
** while others are mutually exclusive. The mask-like ones have
@ -55,12 +53,12 @@
typedef unsigned int SpvId;
#define SPV_VERSION 0x10600
#define SPV_REVISION 1
#define SPV_VERSION 0x10500
#define SPV_REVISION 4
static const unsigned int SpvMagicNumber = 0x07230203;
static const unsigned int SpvVersion = 0x00010600;
static const unsigned int SpvRevision = 1;
static const unsigned int SpvVersion = 0x00010500;
static const unsigned int SpvRevision = 4;
static const unsigned int SpvOpCodeMask = 0xffff;
static const unsigned int SpvWordCountShift = 16;
@ -72,7 +70,6 @@ typedef enum SpvSourceLanguage_ {
SpvSourceLanguageOpenCL_CPP = 4,
SpvSourceLanguageHLSL = 5,
SpvSourceLanguageCPP_for_OpenCL = 6,
SpvSourceLanguageSYCL = 7,
SpvSourceLanguageMax = 0x7fffffff,
} SpvSourceLanguage;
@ -165,14 +162,7 @@ typedef enum SpvExecutionMode_ {
SpvExecutionModeSignedZeroInfNanPreserve = 4461,
SpvExecutionModeRoundingModeRTE = 4462,
SpvExecutionModeRoundingModeRTZ = 4463,
SpvExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
SpvExecutionModeStencilRefReplacingEXT = 5027,
SpvExecutionModeStencilRefUnchangedFrontAMD = 5079,
SpvExecutionModeStencilRefGreaterFrontAMD = 5080,
SpvExecutionModeStencilRefLessFrontAMD = 5081,
SpvExecutionModeStencilRefUnchangedBackAMD = 5082,
SpvExecutionModeStencilRefGreaterBackAMD = 5083,
SpvExecutionModeStencilRefLessBackAMD = 5084,
SpvExecutionModeOutputLinesNV = 5269,
SpvExecutionModeOutputPrimitivesNV = 5270,
SpvExecutionModeDerivativeGroupQuadsNV = 5289,
@ -194,7 +184,6 @@ typedef enum SpvExecutionMode_ {
SpvExecutionModeNoGlobalOffsetINTEL = 5895,
SpvExecutionModeNumSIMDWorkitemsINTEL = 5896,
SpvExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
SpvExecutionModeNamedBarrierCountINTEL = 6417,
SpvExecutionModeMax = 0x7fffffff,
} SpvExecutionMode;
@ -368,8 +357,6 @@ typedef enum SpvImageOperandsShift_ {
SpvImageOperandsVolatileTexelKHRShift = 11,
SpvImageOperandsSignExtendShift = 12,
SpvImageOperandsZeroExtendShift = 13,
SpvImageOperandsNontemporalShift = 14,
SpvImageOperandsOffsetsShift = 16,
SpvImageOperandsMax = 0x7fffffff,
} SpvImageOperandsShift;
@ -393,8 +380,6 @@ typedef enum SpvImageOperandsMask_ {
SpvImageOperandsVolatileTexelKHRMask = 0x00000800,
SpvImageOperandsSignExtendMask = 0x00001000,
SpvImageOperandsZeroExtendMask = 0x00002000,
SpvImageOperandsNontemporalMask = 0x00004000,
SpvImageOperandsOffsetsMask = 0x00010000,
} SpvImageOperandsMask;
typedef enum SpvFPFastMathModeShift_ {
@ -511,7 +496,6 @@ typedef enum SpvDecoration_ {
SpvDecorationPerPrimitiveNV = 5271,
SpvDecorationPerViewNV = 5272,
SpvDecorationPerTaskNV = 5273,
SpvDecorationPerVertexKHR = 5285,
SpvDecorationPerVertexNV = 5285,
SpvDecorationNonUniform = 5300,
SpvDecorationNonUniformEXT = 5300,
@ -519,10 +503,6 @@ typedef enum SpvDecoration_ {
SpvDecorationRestrictPointerEXT = 5355,
SpvDecorationAliasedPointer = 5356,
SpvDecorationAliasedPointerEXT = 5356,
SpvDecorationBindlessSamplerNV = 5398,
SpvDecorationBindlessImageNV = 5399,
SpvDecorationBoundSamplerNV = 5400,
SpvDecorationBoundImageNV = 5401,
SpvDecorationSIMTCallINTEL = 5599,
SpvDecorationReferencedIndirectlyINTEL = 5602,
SpvDecorationClobberINTEL = 5607,
@ -557,14 +537,11 @@ typedef enum SpvDecoration_ {
SpvDecorationPrefetchINTEL = 5902,
SpvDecorationStallEnableINTEL = 5905,
SpvDecorationFuseLoopsInFunctionINTEL = 5907,
SpvDecorationAliasScopeINTEL = 5914,
SpvDecorationNoAliasINTEL = 5915,
SpvDecorationBufferLocationINTEL = 5921,
SpvDecorationIOPipeStorageINTEL = 5944,
SpvDecorationFunctionFloatingPointModeINTEL = 6080,
SpvDecorationSingleElementVectorINTEL = 6085,
SpvDecorationVectorComputeCallableFunctionINTEL = 6087,
SpvDecorationMediaBlockIOINTEL = 6140,
SpvDecorationMax = 0x7fffffff,
} SpvDecoration;
@ -649,9 +626,7 @@ typedef enum SpvBuiltIn_ {
SpvBuiltInLayerPerViewNV = 5279,
SpvBuiltInMeshViewCountNV = 5280,
SpvBuiltInMeshViewIndicesNV = 5281,
SpvBuiltInBaryCoordKHR = 5286,
SpvBuiltInBaryCoordNV = 5286,
SpvBuiltInBaryCoordNoPerspKHR = 5287,
SpvBuiltInBaryCoordNoPerspNV = 5287,
SpvBuiltInFragSizeEXT = 5292,
SpvBuiltInFragmentSizeNV = 5292,
@ -690,7 +665,6 @@ typedef enum SpvBuiltIn_ {
SpvBuiltInSMCountNV = 5375,
SpvBuiltInWarpIDNV = 5376,
SpvBuiltInSMIDNV = 5377,
SpvBuiltInCullMaskKHR = 6021,
SpvBuiltInMax = 0x7fffffff,
} SpvBuiltIn;
@ -818,8 +792,6 @@ typedef enum SpvMemoryAccessShift_ {
SpvMemoryAccessMakePointerVisibleKHRShift = 4,
SpvMemoryAccessNonPrivatePointerShift = 5,
SpvMemoryAccessNonPrivatePointerKHRShift = 5,
SpvMemoryAccessAliasScopeINTELMaskShift = 16,
SpvMemoryAccessNoAliasINTELMaskShift = 17,
SpvMemoryAccessMax = 0x7fffffff,
} SpvMemoryAccessShift;
@ -834,8 +806,6 @@ typedef enum SpvMemoryAccessMask_ {
SpvMemoryAccessMakePointerVisibleKHRMask = 0x00000010,
SpvMemoryAccessNonPrivatePointerMask = 0x00000020,
SpvMemoryAccessNonPrivatePointerKHRMask = 0x00000020,
SpvMemoryAccessAliasScopeINTELMaskMask = 0x00010000,
SpvMemoryAccessNoAliasINTELMaskMask = 0x00020000,
} SpvMemoryAccessMask;
typedef enum SpvScope_ {
@ -948,7 +918,6 @@ typedef enum SpvCapability_ {
SpvCapabilityGroupNonUniformQuad = 68,
SpvCapabilityShaderLayer = 69,
SpvCapabilityShaderViewportIndex = 70,
SpvCapabilityUniformDecoration = 71,
SpvCapabilityFragmentShadingRateKHR = 4422,
SpvCapabilitySubgroupBallotKHR = 4423,
SpvCapabilityDrawParameters = 4427,
@ -997,7 +966,6 @@ typedef enum SpvCapability_ {
SpvCapabilityFragmentFullyCoveredEXT = 5265,
SpvCapabilityMeshShadingNV = 5266,
SpvCapabilityImageFootprintNV = 5282,
SpvCapabilityFragmentBarycentricKHR = 5284,
SpvCapabilityFragmentBarycentricNV = 5284,
SpvCapabilityComputeDerivativeGroupQuadsNV = 5288,
SpvCapabilityFragmentDensityEXT = 5291,
@ -1042,9 +1010,7 @@ typedef enum SpvCapability_ {
SpvCapabilityFragmentShaderShadingRateInterlockEXT = 5372,
SpvCapabilityShaderSMBuiltinsNV = 5373,
SpvCapabilityFragmentShaderPixelInterlockEXT = 5378,
SpvCapabilityDemoteToHelperInvocation = 5379,
SpvCapabilityDemoteToHelperInvocationEXT = 5379,
SpvCapabilityBindlessTextureNV = 5390,
SpvCapabilitySubgroupShuffleINTEL = 5568,
SpvCapabilitySubgroupBufferBlockIOINTEL = 5569,
SpvCapabilitySubgroupImageBlockIOINTEL = 5570,
@ -1077,32 +1043,23 @@ typedef enum SpvCapability_ {
SpvCapabilityFPGAMemoryAccessesINTEL = 5898,
SpvCapabilityFPGAClusterAttributesINTEL = 5904,
SpvCapabilityLoopFuseINTEL = 5906,
SpvCapabilityMemoryAccessAliasingINTEL = 5910,
SpvCapabilityFPGABufferLocationINTEL = 5920,
SpvCapabilityArbitraryPrecisionFixedPointINTEL = 5922,
SpvCapabilityUSMStorageClassesINTEL = 5935,
SpvCapabilityIOPipesINTEL = 5943,
SpvCapabilityBlockingPipesINTEL = 5945,
SpvCapabilityFPGARegINTEL = 5948,
SpvCapabilityDotProductInputAll = 6016,
SpvCapabilityDotProductInputAllKHR = 6016,
SpvCapabilityDotProductInput4x8Bit = 6017,
SpvCapabilityDotProductInput4x8BitKHR = 6017,
SpvCapabilityDotProductInput4x8BitPacked = 6018,
SpvCapabilityDotProductInput4x8BitPackedKHR = 6018,
SpvCapabilityDotProduct = 6019,
SpvCapabilityDotProductKHR = 6019,
SpvCapabilityRayCullMaskKHR = 6020,
SpvCapabilityBitInstructions = 6025,
SpvCapabilityGroupNonUniformRotateKHR = 6026,
SpvCapabilityAtomicFloat32AddEXT = 6033,
SpvCapabilityAtomicFloat64AddEXT = 6034,
SpvCapabilityLongConstantCompositeINTEL = 6089,
SpvCapabilityOptNoneINTEL = 6094,
SpvCapabilityAtomicFloat16AddEXT = 6095,
SpvCapabilityDebugInfoModuleINTEL = 6114,
SpvCapabilitySplitBarrierINTEL = 6141,
SpvCapabilityGroupUniformArithmeticKHR = 6400,
SpvCapabilityMax = 0x7fffffff,
} SpvCapability;
@ -1202,7 +1159,6 @@ typedef enum SpvOverflowModes_ {
} SpvOverflowModes;
typedef enum SpvPackedVectorFormat_ {
SpvPackedVectorFormatPackedVectorFormat4x8Bit = 0,
SpvPackedVectorFormatPackedVectorFormat4x8BitKHR = 0,
SpvPackedVectorFormatMax = 0x7fffffff,
} SpvPackedVectorFormat;
@ -1558,24 +1514,17 @@ typedef enum SpvOp_ {
SpvOpSubgroupAllKHR = 4428,
SpvOpSubgroupAnyKHR = 4429,
SpvOpSubgroupAllEqualKHR = 4430,
SpvOpGroupNonUniformRotateKHR = 4431,
SpvOpSubgroupReadInvocationKHR = 4432,
SpvOpTraceRayKHR = 4445,
SpvOpExecuteCallableKHR = 4446,
SpvOpConvertUToAccelerationStructureKHR = 4447,
SpvOpIgnoreIntersectionKHR = 4448,
SpvOpTerminateRayKHR = 4449,
SpvOpSDot = 4450,
SpvOpSDotKHR = 4450,
SpvOpUDot = 4451,
SpvOpUDotKHR = 4451,
SpvOpSUDot = 4452,
SpvOpSUDotKHR = 4452,
SpvOpSDotAccSat = 4453,
SpvOpSDotAccSatKHR = 4453,
SpvOpUDotAccSat = 4454,
SpvOpUDotAccSatKHR = 4454,
SpvOpSUDotAccSat = 4455,
SpvOpSUDotAccSatKHR = 4455,
SpvOpTypeRayQueryKHR = 4472,
SpvOpRayQueryInitializeKHR = 4473,
@ -1615,16 +1564,8 @@ typedef enum SpvOp_ {
SpvOpCooperativeMatrixLengthNV = 5362,
SpvOpBeginInvocationInterlockEXT = 5364,
SpvOpEndInvocationInterlockEXT = 5365,
SpvOpDemoteToHelperInvocation = 5380,
SpvOpDemoteToHelperInvocationEXT = 5380,
SpvOpIsHelperInvocationEXT = 5381,
SpvOpConvertUToImageNV = 5391,
SpvOpConvertUToSamplerNV = 5392,
SpvOpConvertImageToUNV = 5393,
SpvOpConvertSamplerToUNV = 5394,
SpvOpConvertUToSampledImageNV = 5395,
SpvOpConvertSampledImageToUNV = 5396,
SpvOpSamplerImageAddressingModeNV = 5397,
SpvOpSubgroupShuffleINTEL = 5571,
SpvOpSubgroupShuffleDownINTEL = 5572,
SpvOpSubgroupShuffleUpINTEL = 5573,
@ -1649,7 +1590,7 @@ typedef enum SpvOp_ {
SpvOpUSubSatINTEL = 5596,
SpvOpIMul32x16INTEL = 5597,
SpvOpUMul32x16INTEL = 5598,
SpvOpConstantFunctionPointerINTEL = 5600,
SpvOpConstFunctionPointerINTEL = 5600,
SpvOpFunctionPointerCallINTEL = 5601,
SpvOpAsmTargetINTEL = 5609,
SpvOpAsmINTEL = 5610,
@ -1825,9 +1766,6 @@ typedef enum SpvOp_ {
SpvOpArbitraryFloatPowRINTEL = 5881,
SpvOpArbitraryFloatPowNINTEL = 5882,
SpvOpLoopControlINTEL = 5887,
SpvOpAliasDomainDeclINTEL = 5911,
SpvOpAliasScopeDeclINTEL = 5912,
SpvOpAliasScopeListDeclINTEL = 5913,
SpvOpFixedSqrtINTEL = 5923,
SpvOpFixedRecipINTEL = 5924,
SpvOpFixedRsqrtINTEL = 5925,
@ -1866,23 +1804,10 @@ typedef enum SpvOp_ {
SpvOpTypeStructContinuedINTEL = 6090,
SpvOpConstantCompositeContinuedINTEL = 6091,
SpvOpSpecConstantCompositeContinuedINTEL = 6092,
SpvOpControlBarrierArriveINTEL = 6142,
SpvOpControlBarrierWaitINTEL = 6143,
SpvOpGroupIMulKHR = 6401,
SpvOpGroupFMulKHR = 6402,
SpvOpGroupBitwiseAndKHR = 6403,
SpvOpGroupBitwiseOrKHR = 6404,
SpvOpGroupBitwiseXorKHR = 6405,
SpvOpGroupLogicalAndKHR = 6406,
SpvOpGroupLogicalOrKHR = 6407,
SpvOpGroupLogicalXorKHR = 6408,
SpvOpMax = 0x7fffffff,
} SpvOp;
#ifdef SPV_ENABLE_UTILITY_CODE
#ifndef __cplusplus
#include <stdbool.h>
#endif
inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultType) {
*hasResult = *hasResultType = false;
switch (opcode) {
@ -2237,19 +2162,18 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpTraceRayKHR: *hasResult = false; *hasResultType = false; break;
case SpvOpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break;
case SpvOpConvertUToAccelerationStructureKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpIgnoreIntersectionKHR: *hasResult = false; *hasResultType = false; break;
case SpvOpTerminateRayKHR: *hasResult = false; *hasResultType = false; break;
case SpvOpSDot: *hasResult = true; *hasResultType = true; break;
case SpvOpUDot: *hasResult = true; *hasResultType = true; break;
case SpvOpSUDot: *hasResult = true; *hasResultType = true; break;
case SpvOpSDotAccSat: *hasResult = true; *hasResultType = true; break;
case SpvOpUDotAccSat: *hasResult = true; *hasResultType = true; break;
case SpvOpSUDotAccSat: *hasResult = true; *hasResultType = true; break;
case SpvOpSDotKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpUDotKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSUDotKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpUDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpSUDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break;
case SpvOpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break;
case SpvOpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break;
@ -2286,15 +2210,8 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpCooperativeMatrixLengthNV: *hasResult = true; *hasResultType = true; break;
case SpvOpBeginInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpDemoteToHelperInvocation: *hasResult = false; *hasResultType = false; break;
case SpvOpDemoteToHelperInvocationEXT: *hasResult = false; *hasResultType = false; break;
case SpvOpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertSamplerToUNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
case SpvOpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
case SpvOpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case SpvOpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@ -2319,7 +2236,7 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpUSubSatINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpIMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpUMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpConstantFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpConstFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpFunctionPointerCallINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpAsmTargetINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpAsmINTEL: *hasResult = true; *hasResultType = true; break;
@ -2493,9 +2410,6 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break;
case SpvOpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break;
case SpvOpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break;
case SpvOpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
case SpvOpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;
@ -2534,16 +2448,6 @@ inline void SpvHasResultAndType(SpvOp opcode, bool *hasResult, bool *hasResultTy
case SpvOpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
case SpvOpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
case SpvOpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
}
}
#endif /* SPV_ENABLE_UTILITY_CODE */

124
include/spirv/unified1/spirv.hpp
View File

@ -26,7 +26,7 @@
// the Binary Section of the SPIR-V specification.
// Enumeration tokens for SPIR-V, in various styles:
// C, C++, C++11, JSON, Lua, Python, C#, D, Beef
// C, C++, C++11, JSON, Lua, Python, C#, D
//
// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
// - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -36,8 +36,6 @@
// - C# will use enum classes in the Specification class located in the "Spv" namespace,
// e.g.: Spv.Specification.SourceLanguage.GLSL
// - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
// - Beef will use enum classes in the Specification class located in the "Spv" namespace,
// e.g.: Spv.Specification.SourceLanguage.GLSL
//
// Some tokens act like mask values, which can be OR'd together,
// while others are mutually exclusive. The mask-like ones have
@ -51,12 +49,12 @@ namespace spv {
typedef unsigned int Id;
#define SPV_VERSION 0x10600
#define SPV_REVISION 1
#define SPV_VERSION 0x10500
#define SPV_REVISION 4
static const unsigned int MagicNumber = 0x07230203;
static const unsigned int Version = 0x00010600;
static const unsigned int Revision = 1;
static const unsigned int Version = 0x00010500;
static const unsigned int Revision = 4;
static const unsigned int OpCodeMask = 0xffff;
static const unsigned int WordCountShift = 16;
@ -68,7 +66,6 @@ enum SourceLanguage {
SourceLanguageOpenCL_CPP = 4,
SourceLanguageHLSL = 5,
SourceLanguageCPP_for_OpenCL = 6,
SourceLanguageSYCL = 7,
SourceLanguageMax = 0x7fffffff,
};
@ -161,14 +158,7 @@ enum ExecutionMode {
ExecutionModeSignedZeroInfNanPreserve = 4461,
ExecutionModeRoundingModeRTE = 4462,
ExecutionModeRoundingModeRTZ = 4463,
ExecutionModeEarlyAndLateFragmentTestsAMD = 5017,
ExecutionModeStencilRefReplacingEXT = 5027,
ExecutionModeStencilRefUnchangedFrontAMD = 5079,
ExecutionModeStencilRefGreaterFrontAMD = 5080,
ExecutionModeStencilRefLessFrontAMD = 5081,
ExecutionModeStencilRefUnchangedBackAMD = 5082,
ExecutionModeStencilRefGreaterBackAMD = 5083,
ExecutionModeStencilRefLessBackAMD = 5084,
ExecutionModeOutputLinesNV = 5269,
ExecutionModeOutputPrimitivesNV = 5270,
ExecutionModeDerivativeGroupQuadsNV = 5289,
@ -190,7 +180,6 @@ enum ExecutionMode {
ExecutionModeNoGlobalOffsetINTEL = 5895,
ExecutionModeNumSIMDWorkitemsINTEL = 5896,
ExecutionModeSchedulerTargetFmaxMhzINTEL = 5903,
ExecutionModeNamedBarrierCountINTEL = 6417,
ExecutionModeMax = 0x7fffffff,
};
@ -364,8 +353,6 @@ enum ImageOperandsShift {
ImageOperandsVolatileTexelKHRShift = 11,
ImageOperandsSignExtendShift = 12,
ImageOperandsZeroExtendShift = 13,
ImageOperandsNontemporalShift = 14,
ImageOperandsOffsetsShift = 16,
ImageOperandsMax = 0x7fffffff,
};
@ -389,8 +376,6 @@ enum ImageOperandsMask {
ImageOperandsVolatileTexelKHRMask = 0x00000800,
ImageOperandsSignExtendMask = 0x00001000,
ImageOperandsZeroExtendMask = 0x00002000,
ImageOperandsNontemporalMask = 0x00004000,
ImageOperandsOffsetsMask = 0x00010000,
};
enum FPFastMathModeShift {
@ -507,7 +492,6 @@ enum Decoration {
DecorationPerPrimitiveNV = 5271,
DecorationPerViewNV = 5272,
DecorationPerTaskNV = 5273,
DecorationPerVertexKHR = 5285,
DecorationPerVertexNV = 5285,
DecorationNonUniform = 5300,
DecorationNonUniformEXT = 5300,
@ -515,10 +499,6 @@ enum Decoration {
DecorationRestrictPointerEXT = 5355,
DecorationAliasedPointer = 5356,
DecorationAliasedPointerEXT = 5356,
DecorationBindlessSamplerNV = 5398,
DecorationBindlessImageNV = 5399,
DecorationBoundSamplerNV = 5400,
DecorationBoundImageNV = 5401,
DecorationSIMTCallINTEL = 5599,
DecorationReferencedIndirectlyINTEL = 5602,
DecorationClobberINTEL = 5607,
@ -553,14 +533,11 @@ enum Decoration {
DecorationPrefetchINTEL = 5902,
DecorationStallEnableINTEL = 5905,
DecorationFuseLoopsInFunctionINTEL = 5907,
DecorationAliasScopeINTEL = 5914,
DecorationNoAliasINTEL = 5915,
DecorationBufferLocationINTEL = 5921,
DecorationIOPipeStorageINTEL = 5944,
DecorationFunctionFloatingPointModeINTEL = 6080,
DecorationSingleElementVectorINTEL = 6085,
DecorationVectorComputeCallableFunctionINTEL = 6087,
DecorationMediaBlockIOINTEL = 6140,
DecorationMax = 0x7fffffff,
};
@ -645,9 +622,7 @@ enum BuiltIn {
BuiltInLayerPerViewNV = 5279,
BuiltInMeshViewCountNV = 5280,
BuiltInMeshViewIndicesNV = 5281,
BuiltInBaryCoordKHR = 5286,
BuiltInBaryCoordNV = 5286,
BuiltInBaryCoordNoPerspKHR = 5287,
BuiltInBaryCoordNoPerspNV = 5287,
BuiltInFragSizeEXT = 5292,
BuiltInFragmentSizeNV = 5292,
@ -686,7 +661,6 @@ enum BuiltIn {
BuiltInSMCountNV = 5375,
BuiltInWarpIDNV = 5376,
BuiltInSMIDNV = 5377,
BuiltInCullMaskKHR = 6021,
BuiltInMax = 0x7fffffff,
};
@ -814,8 +788,6 @@ enum MemoryAccessShift {
MemoryAccessMakePointerVisibleKHRShift = 4,
MemoryAccessNonPrivatePointerShift = 5,
MemoryAccessNonPrivatePointerKHRShift = 5,
MemoryAccessAliasScopeINTELMaskShift = 16,
MemoryAccessNoAliasINTELMaskShift = 17,
MemoryAccessMax = 0x7fffffff,
};
@ -830,8 +802,6 @@ enum MemoryAccessMask {
MemoryAccessMakePointerVisibleKHRMask = 0x00000010,
MemoryAccessNonPrivatePointerMask = 0x00000020,
MemoryAccessNonPrivatePointerKHRMask = 0x00000020,
MemoryAccessAliasScopeINTELMaskMask = 0x00010000,
MemoryAccessNoAliasINTELMaskMask = 0x00020000,
};
enum Scope {
@ -944,7 +914,6 @@ enum Capability {
CapabilityGroupNonUniformQuad = 68,
CapabilityShaderLayer = 69,
CapabilityShaderViewportIndex = 70,
CapabilityUniformDecoration = 71,
CapabilityFragmentShadingRateKHR = 4422,
CapabilitySubgroupBallotKHR = 4423,
CapabilityDrawParameters = 4427,
@ -993,7 +962,6 @@ enum Capability {
CapabilityFragmentFullyCoveredEXT = 5265,
CapabilityMeshShadingNV = 5266,
CapabilityImageFootprintNV = 5282,
CapabilityFragmentBarycentricKHR = 5284,
CapabilityFragmentBarycentricNV = 5284,
CapabilityComputeDerivativeGroupQuadsNV = 5288,
CapabilityFragmentDensityEXT = 5291,
@ -1038,9 +1006,7 @@ enum Capability {
CapabilityFragmentShaderShadingRateInterlockEXT = 5372,
CapabilityShaderSMBuiltinsNV = 5373,
CapabilityFragmentShaderPixelInterlockEXT = 5378,
CapabilityDemoteToHelperInvocation = 5379,
CapabilityDemoteToHelperInvocationEXT = 5379,
CapabilityBindlessTextureNV = 5390,
CapabilitySubgroupShuffleINTEL = 5568,
CapabilitySubgroupBufferBlockIOINTEL = 5569,
CapabilitySubgroupImageBlockIOINTEL = 5570,
@ -1073,32 +1039,23 @@ enum Capability {
CapabilityFPGAMemoryAccessesINTEL = 5898,
CapabilityFPGAClusterAttributesINTEL = 5904,
CapabilityLoopFuseINTEL = 5906,
CapabilityMemoryAccessAliasingINTEL = 5910,
CapabilityFPGABufferLocationINTEL = 5920,
CapabilityArbitraryPrecisionFixedPointINTEL = 5922,
CapabilityUSMStorageClassesINTEL = 5935,
CapabilityIOPipesINTEL = 5943,
CapabilityBlockingPipesINTEL = 5945,
CapabilityFPGARegINTEL = 5948,
CapabilityDotProductInputAll = 6016,
CapabilityDotProductInputAllKHR = 6016,
CapabilityDotProductInput4x8Bit = 6017,
CapabilityDotProductInput4x8BitKHR = 6017,
CapabilityDotProductInput4x8BitPacked = 6018,
CapabilityDotProductInput4x8BitPackedKHR = 6018,
CapabilityDotProduct = 6019,
CapabilityDotProductKHR = 6019,
CapabilityRayCullMaskKHR = 6020,
CapabilityBitInstructions = 6025,
CapabilityGroupNonUniformRotateKHR = 6026,
CapabilityAtomicFloat32AddEXT = 6033,
CapabilityAtomicFloat64AddEXT = 6034,
CapabilityLongConstantCompositeINTEL = 6089,
CapabilityOptNoneINTEL = 6094,
CapabilityAtomicFloat16AddEXT = 6095,
CapabilityDebugInfoModuleINTEL = 6114,
CapabilitySplitBarrierINTEL = 6141,
CapabilityGroupUniformArithmeticKHR = 6400,
CapabilityMax = 0x7fffffff,
};
@ -1198,7 +1155,6 @@ enum OverflowModes {
};
enum PackedVectorFormat {
PackedVectorFormatPackedVectorFormat4x8Bit = 0,
PackedVectorFormatPackedVectorFormat4x8BitKHR = 0,
PackedVectorFormatMax = 0x7fffffff,
};
@ -1554,24 +1510,17 @@ enum Op {
OpSubgroupAllKHR = 4428,
OpSubgroupAnyKHR = 4429,
OpSubgroupAllEqualKHR = 4430,
OpGroupNonUniformRotateKHR = 4431,
OpSubgroupReadInvocationKHR = 4432,
OpTraceRayKHR = 4445,
OpExecuteCallableKHR = 4446,
OpConvertUToAccelerationStructureKHR = 4447,
OpIgnoreIntersectionKHR = 4448,
OpTerminateRayKHR = 4449,
OpSDot = 4450,
OpSDotKHR = 4450,
OpUDot = 4451,
OpUDotKHR = 4451,
OpSUDot = 4452,
OpSUDotKHR = 4452,
OpSDotAccSat = 4453,
OpSDotAccSatKHR = 4453,
OpUDotAccSat = 4454,
OpUDotAccSatKHR = 4454,
OpSUDotAccSat = 4455,
OpSUDotAccSatKHR = 4455,
OpTypeRayQueryKHR = 4472,
OpRayQueryInitializeKHR = 4473,
@ -1611,16 +1560,8 @@ enum Op {
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
OpConvertSamplerToUNV = 5394,
OpConvertUToSampledImageNV = 5395,
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -1645,7 +1586,7 @@ enum Op {
OpUSubSatINTEL = 5596,
OpIMul32x16INTEL = 5597,
OpUMul32x16INTEL = 5598,
OpConstantFunctionPointerINTEL = 5600,
OpConstFunctionPointerINTEL = 5600,
OpFunctionPointerCallINTEL = 5601,
OpAsmTargetINTEL = 5609,
OpAsmINTEL = 5610,
@ -1821,9 +1762,6 @@ enum Op {
OpArbitraryFloatPowRINTEL = 5881,
OpArbitraryFloatPowNINTEL = 5882,
OpLoopControlINTEL = 5887,
OpAliasDomainDeclINTEL = 5911,
OpAliasScopeDeclINTEL = 5912,
OpAliasScopeListDeclINTEL = 5913,
OpFixedSqrtINTEL = 5923,
OpFixedRecipINTEL = 5924,
OpFixedRsqrtINTEL = 5925,
@ -1862,23 +1800,10 @@ enum Op {
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
OpMax = 0x7fffffff,
};
#ifdef SPV_ENABLE_UTILITY_CODE
#ifndef __cplusplus
#include <stdbool.h>
#endif
inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
*hasResult = *hasResultType = false;
switch (opcode) {
@ -2233,19 +2158,18 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break;
case OpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break;
case OpTraceRayKHR: *hasResult = false; *hasResultType = false; break;
case OpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break;
case OpConvertUToAccelerationStructureKHR: *hasResult = true; *hasResultType = true; break;
case OpIgnoreIntersectionKHR: *hasResult = false; *hasResultType = false; break;
case OpTerminateRayKHR: *hasResult = false; *hasResultType = false; break;
case OpSDot: *hasResult = true; *hasResultType = true; break;
case OpUDot: *hasResult = true; *hasResultType = true; break;
case OpSUDot: *hasResult = true; *hasResultType = true; break;
case OpSDotAccSat: *hasResult = true; *hasResultType = true; break;
case OpUDotAccSat: *hasResult = true; *hasResultType = true; break;
case OpSUDotAccSat: *hasResult = true; *hasResultType = true; break;
case OpSDotKHR: *hasResult = true; *hasResultType = true; break;
case OpUDotKHR: *hasResult = true; *hasResultType = true; break;
case OpSUDotKHR: *hasResult = true; *hasResultType = true; break;
case OpSDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case OpUDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case OpSUDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case OpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break;
case OpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break;
case OpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break;
@ -2282,15 +2206,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpCooperativeMatrixLengthNV: *hasResult = true; *hasResultType = true; break;
case OpBeginInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case OpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case OpDemoteToHelperInvocation: *hasResult = false; *hasResultType = false; break;
case OpDemoteToHelperInvocationEXT: *hasResult = false; *hasResultType = false; break;
case OpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
case OpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
case OpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
case OpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
case OpConvertSamplerToUNV: *hasResult = true; *hasResultType = true; break;
case OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
case OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
case OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@ -2315,7 +2232,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpUSubSatINTEL: *hasResult = true; *hasResultType = true; break;
case OpIMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case OpUMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case OpConstantFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case OpConstFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case OpFunctionPointerCallINTEL: *hasResult = true; *hasResultType = true; break;
case OpAsmTargetINTEL: *hasResult = true; *hasResultType = true; break;
case OpAsmINTEL: *hasResult = true; *hasResultType = true; break;
@ -2489,9 +2406,6 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
case OpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
case OpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
case OpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break;
case OpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break;
case OpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break;
case OpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
case OpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
case OpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;
@ -2530,16 +2444,6 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
case OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
case OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
case OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
}
}
#endif /* SPV_ENABLE_UTILITY_CODE */

124
include/spirv/unified1/spirv.hpp11
View File

@ -26,7 +26,7 @@
// the Binary Section of the SPIR-V specification.
// Enumeration tokens for SPIR-V, in various styles:
// C, C++, C++11, JSON, Lua, Python, C#, D, Beef
// C, C++, C++11, JSON, Lua, Python, C#, D
//
// - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
// - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -36,8 +36,6 @@
// - C# will use enum classes in the Specification class located in the "Spv" namespace,
// e.g.: Spv.Specification.SourceLanguage.GLSL
// - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
// - Beef will use enum classes in the Specification class located in the "Spv" namespace,
// e.g.: Spv.Specification.SourceLanguage.GLSL
//
// Some tokens act like mask values, which can be OR'd together,
// while others are mutually exclusive. The mask-like ones have
@ -51,12 +49,12 @@ namespace spv {
typedef unsigned int Id;
#define SPV_VERSION 0x10600
#define SPV_REVISION 1
#define SPV_VERSION 0x10500
#define SPV_REVISION 4
static const unsigned int MagicNumber = 0x07230203;
static const unsigned int Version = 0x00010600;
static const unsigned int Revision = 1;
static const unsigned int Version = 0x00010500;
static const unsigned int Revision = 4;
static const unsigned int OpCodeMask = 0xffff;
static const unsigned int WordCountShift = 16;
@ -68,7 +66,6 @@ enum class SourceLanguage : unsigned {
OpenCL_CPP = 4,
HLSL = 5,
CPP_for_OpenCL = 6,
SYCL = 7,
Max = 0x7fffffff,
};
@ -161,14 +158,7 @@ enum class ExecutionMode : unsigned {
SignedZeroInfNanPreserve = 4461,
RoundingModeRTE = 4462,
RoundingModeRTZ = 4463,
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
StencilRefUnchangedFrontAMD = 5079,
StencilRefGreaterFrontAMD = 5080,
StencilRefLessFrontAMD = 5081,
StencilRefUnchangedBackAMD = 5082,
StencilRefGreaterBackAMD = 5083,
StencilRefLessBackAMD = 5084,
OutputLinesNV = 5269,
OutputPrimitivesNV = 5270,
DerivativeGroupQuadsNV = 5289,
@ -190,7 +180,6 @@ enum class ExecutionMode : unsigned {
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
NamedBarrierCountINTEL = 6417,
Max = 0x7fffffff,
};
@ -364,8 +353,6 @@ enum class ImageOperandsShift : unsigned {
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
Nontemporal = 14,
Offsets = 16,
Max = 0x7fffffff,
};
@ -389,8 +376,6 @@ enum class ImageOperandsMask : unsigned {
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
Nontemporal = 0x00004000,
Offsets = 0x00010000,
};
enum class FPFastMathModeShift : unsigned {
@ -507,7 +492,6 @@ enum class Decoration : unsigned {
PerPrimitiveNV = 5271,
PerViewNV = 5272,
PerTaskNV = 5273,
PerVertexKHR = 5285,
PerVertexNV = 5285,
NonUniform = 5300,
NonUniformEXT = 5300,
@ -515,10 +499,6 @@ enum class Decoration : unsigned {
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
BindlessSamplerNV = 5398,
BindlessImageNV = 5399,
BoundSamplerNV = 5400,
BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@ -553,14 +533,11 @@ enum class Decoration : unsigned {
PrefetchINTEL = 5902,
StallEnableINTEL = 5905,
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
Max = 0x7fffffff,
};
@ -645,9 +622,7 @@ enum class BuiltIn : unsigned {
LayerPerViewNV = 5279,
MeshViewCountNV = 5280,
MeshViewIndicesNV = 5281,
BaryCoordKHR = 5286,
BaryCoordNV = 5286,
BaryCoordNoPerspKHR = 5287,
BaryCoordNoPerspNV = 5287,
FragSizeEXT = 5292,
FragmentSizeNV = 5292,
@ -686,7 +661,6 @@ enum class BuiltIn : unsigned {
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
CullMaskKHR = 6021,
Max = 0x7fffffff,
};
@ -814,8 +788,6 @@ enum class MemoryAccessShift : unsigned {
MakePointerVisibleKHR = 4,
NonPrivatePointer = 5,
NonPrivatePointerKHR = 5,
AliasScopeINTELMask = 16,
NoAliasINTELMask = 17,
Max = 0x7fffffff,
};
@ -830,8 +802,6 @@ enum class MemoryAccessMask : unsigned {
MakePointerVisibleKHR = 0x00000010,
NonPrivatePointer = 0x00000020,
NonPrivatePointerKHR = 0x00000020,
AliasScopeINTELMask = 0x00010000,
NoAliasINTELMask = 0x00020000,
};
enum class Scope : unsigned {
@ -944,7 +914,6 @@ enum class Capability : unsigned {
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
UniformDecoration = 71,
FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
@ -993,7 +962,6 @@ enum class Capability : unsigned {
FragmentFullyCoveredEXT = 5265,
MeshShadingNV = 5266,
ImageFootprintNV = 5282,
FragmentBarycentricKHR = 5284,
FragmentBarycentricNV = 5284,
ComputeDerivativeGroupQuadsNV = 5288,
FragmentDensityEXT = 5291,
@ -1038,9 +1006,7 @@ enum class Capability : unsigned {
FragmentShaderShadingRateInterlockEXT = 5372,
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocation = 5379,
DemoteToHelperInvocationEXT = 5379,
BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1073,32 +1039,23 @@ enum class Capability : unsigned {
FPGAMemoryAccessesINTEL = 5898,
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
IOPipesINTEL = 5943,
BlockingPipesINTEL = 5945,
FPGARegINTEL = 5948,
DotProductInputAll = 6016,
DotProductInputAllKHR = 6016,
DotProductInput4x8Bit = 6017,
DotProductInput4x8BitKHR = 6017,
DotProductInput4x8BitPacked = 6018,
DotProductInput4x8BitPackedKHR = 6018,
DotProduct = 6019,
DotProductKHR = 6019,
RayCullMaskKHR = 6020,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongConstantCompositeINTEL = 6089,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
GroupUniformArithmeticKHR = 6400,
Max = 0x7fffffff,
};
@ -1198,7 +1155,6 @@ enum class OverflowModes : unsigned {
};
enum class PackedVectorFormat : unsigned {
PackedVectorFormat4x8Bit = 0,
PackedVectorFormat4x8BitKHR = 0,
Max = 0x7fffffff,
};
@ -1554,24 +1510,17 @@ enum class Op : unsigned {
OpSubgroupAllKHR = 4428,
OpSubgroupAnyKHR = 4429,
OpSubgroupAllEqualKHR = 4430,
OpGroupNonUniformRotateKHR = 4431,
OpSubgroupReadInvocationKHR = 4432,
OpTraceRayKHR = 4445,
OpExecuteCallableKHR = 4446,
OpConvertUToAccelerationStructureKHR = 4447,
OpIgnoreIntersectionKHR = 4448,
OpTerminateRayKHR = 4449,
OpSDot = 4450,
OpSDotKHR = 4450,
OpUDot = 4451,
OpUDotKHR = 4451,
OpSUDot = 4452,
OpSUDotKHR = 4452,
OpSDotAccSat = 4453,
OpSDotAccSatKHR = 4453,
OpUDotAccSat = 4454,
OpUDotAccSatKHR = 4454,
OpSUDotAccSat = 4455,
OpSUDotAccSatKHR = 4455,
OpTypeRayQueryKHR = 4472,
OpRayQueryInitializeKHR = 4473,
@ -1611,16 +1560,8 @@ enum class Op : unsigned {
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
OpConvertSamplerToUNV = 5394,
OpConvertUToSampledImageNV = 5395,
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -1645,7 +1586,7 @@ enum class Op : unsigned {
OpUSubSatINTEL = 5596,
OpIMul32x16INTEL = 5597,
OpUMul32x16INTEL = 5598,
OpConstantFunctionPointerINTEL = 5600,
OpConstFunctionPointerINTEL = 5600,
OpFunctionPointerCallINTEL = 5601,
OpAsmTargetINTEL = 5609,
OpAsmINTEL = 5610,
@ -1821,9 +1762,6 @@ enum class Op : unsigned {
OpArbitraryFloatPowRINTEL = 5881,
OpArbitraryFloatPowNINTEL = 5882,
OpLoopControlINTEL = 5887,
OpAliasDomainDeclINTEL = 5911,
OpAliasScopeDeclINTEL = 5912,
OpAliasScopeListDeclINTEL = 5913,
OpFixedSqrtINTEL = 5923,
OpFixedRecipINTEL = 5924,
OpFixedRsqrtINTEL = 5925,
@ -1862,23 +1800,10 @@ enum class Op : unsigned {
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
Max = 0x7fffffff,
};
#ifdef SPV_ENABLE_UTILITY_CODE
#ifndef __cplusplus
#include <stdbool.h>
#endif
inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
*hasResult = *hasResultType = false;
switch (opcode) {
@ -2233,19 +2158,18 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpSubgroupAllKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAnyKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupAllEqualKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupNonUniformRotateKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupReadInvocationKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpTraceRayKHR: *hasResult = false; *hasResultType = false; break;
case Op::OpExecuteCallableKHR: *hasResult = false; *hasResultType = false; break;
case Op::OpConvertUToAccelerationStructureKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpIgnoreIntersectionKHR: *hasResult = false; *hasResultType = false; break;
case Op::OpTerminateRayKHR: *hasResult = false; *hasResultType = false; break;
case Op::OpSDot: *hasResult = true; *hasResultType = true; break;
case Op::OpUDot: *hasResult = true; *hasResultType = true; break;
case Op::OpSUDot: *hasResult = true; *hasResultType = true; break;
case Op::OpSDotAccSat: *hasResult = true; *hasResultType = true; break;
case Op::OpUDotAccSat: *hasResult = true; *hasResultType = true; break;
case Op::OpSUDotAccSat: *hasResult = true; *hasResultType = true; break;
case Op::OpSDotKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpUDotKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSUDotKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpUDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpSUDotAccSatKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpTypeRayQueryKHR: *hasResult = true; *hasResultType = false; break;
case Op::OpRayQueryInitializeKHR: *hasResult = false; *hasResultType = false; break;
case Op::OpRayQueryTerminateKHR: *hasResult = false; *hasResultType = false; break;
@ -2282,15 +2206,8 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpCooperativeMatrixLengthNV: *hasResult = true; *hasResultType = true; break;
case Op::OpBeginInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case Op::OpEndInvocationInterlockEXT: *hasResult = false; *hasResultType = false; break;
case Op::OpDemoteToHelperInvocation: *hasResult = false; *hasResultType = false; break;
case Op::OpDemoteToHelperInvocationEXT: *hasResult = false; *hasResultType = false; break;
case Op::OpIsHelperInvocationEXT: *hasResult = true; *hasResultType = true; break;
case Op::OpConvertUToImageNV: *hasResult = true; *hasResultType = true; break;
case Op::OpConvertUToSamplerNV: *hasResult = true; *hasResultType = true; break;
case Op::OpConvertImageToUNV: *hasResult = true; *hasResultType = true; break;
case Op::OpConvertSamplerToUNV: *hasResult = true; *hasResultType = true; break;
case Op::OpConvertUToSampledImageNV: *hasResult = true; *hasResultType = true; break;
case Op::OpConvertSampledImageToUNV: *hasResult = true; *hasResultType = true; break;
case Op::OpSamplerImageAddressingModeNV: *hasResult = false; *hasResultType = false; break;
case Op::OpSubgroupShuffleINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupShuffleDownINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpSubgroupShuffleUpINTEL: *hasResult = true; *hasResultType = true; break;
@ -2315,7 +2232,7 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpUSubSatINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpIMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpUMul32x16INTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpConstantFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpConstFunctionPointerINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpFunctionPointerCallINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpAsmTargetINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpAsmINTEL: *hasResult = true; *hasResultType = true; break;
@ -2489,9 +2406,6 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpArbitraryFloatPowRINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpArbitraryFloatPowNINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpLoopControlINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpAliasDomainDeclINTEL: *hasResult = true; *hasResultType = false; break;
case Op::OpAliasScopeDeclINTEL: *hasResult = true; *hasResultType = false; break;
case Op::OpAliasScopeListDeclINTEL: *hasResult = true; *hasResultType = false; break;
case Op::OpFixedSqrtINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpFixedRecipINTEL: *hasResult = true; *hasResultType = true; break;
case Op::OpFixedRsqrtINTEL: *hasResult = true; *hasResultType = true; break;
@ -2530,16 +2444,6 @@ inline void HasResultAndType(Op opcode, bool *hasResult, bool *hasResultType) {
case Op::OpTypeStructContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpSpecConstantCompositeContinuedINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpControlBarrierArriveINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpControlBarrierWaitINTEL: *hasResult = false; *hasResultType = false; break;
case Op::OpGroupIMulKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupFMulKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseAndKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseOrKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupBitwiseXorKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupLogicalAndKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupLogicalOrKHR: *hasResult = true; *hasResultType = true; break;
case Op::OpGroupLogicalXorKHR: *hasResult = true; *hasResultType = true; break;
}
}
#endif /* SPV_ENABLE_UTILITY_CODE */

92
include/spirv/unified1/spirv.json
View File

@ -36,7 +36,7 @@
],
[
"Enumeration tokens for SPIR-V, in various styles:",
" C, C++, C++11, JSON, Lua, Python, C#, D, Beef",
" C, C++, C++11, JSON, Lua, Python, C#, D",
"",
"- C will have tokens with a \"Spv\" prefix, e.g.: SpvSourceLanguageGLSL",
"- C++ will have tokens in the \"spv\" name space, e.g.: spv::SourceLanguageGLSL",
@ -46,8 +46,6 @@
"- C# will use enum classes in the Specification class located in the \"Spv\" namespace,",
" e.g.: Spv.Specification.SourceLanguage.GLSL",
"- D will have tokens under the \"spv\" module, e.g: spv.SourceLanguage.GLSL",
"- Beef will use enum classes in the Specification class located in the \"Spv\" namespace,",
" e.g.: Spv.Specification.SourceLanguage.GLSL",
"",
"Some tokens act like mask values, which can be OR'd together,",
"while others are mutually exclusive. The mask-like ones have",
@ -56,8 +54,8 @@
]
],
"MagicNumber": 119734787,
"Version": 67072,
"Revision": 1,
"Version": 66816,
"Revision": 4,
"OpCodeMask": 65535,
"WordCountShift": 16
},
@ -74,8 +72,7 @@
"OpenCL_C": 3,
"OpenCL_CPP": 4,
"HLSL": 5,
"CPP_for_OpenCL": 6,
"SYCL": 7
"CPP_for_OpenCL": 6
}
},
{
@ -180,14 +177,7 @@
"SignedZeroInfNanPreserve": 4461,
"RoundingModeRTE": 4462,
"RoundingModeRTZ": 4463,
"EarlyAndLateFragmentTestsAMD": 5017,
"StencilRefReplacingEXT": 5027,
"StencilRefUnchangedFrontAMD": 5079,
"StencilRefGreaterFrontAMD": 5080,
"StencilRefLessFrontAMD": 5081,
"StencilRefUnchangedBackAMD": 5082,
"StencilRefGreaterBackAMD": 5083,
"StencilRefLessBackAMD": 5084,
"OutputLinesNV": 5269,
"OutputPrimitivesNV": 5270,
"DerivativeGroupQuadsNV": 5289,
@ -208,8 +198,7 @@
"MaxWorkDimINTEL": 5894,
"NoGlobalOffsetINTEL": 5895,
"NumSIMDWorkitemsINTEL": 5896,
"SchedulerTargetFmaxMhzINTEL": 5903,
"NamedBarrierCountINTEL": 6417
"SchedulerTargetFmaxMhzINTEL": 5903
}
},
{
@ -406,9 +395,7 @@
"VolatileTexel": 11,
"VolatileTexelKHR": 11,
"SignExtend": 12,
"ZeroExtend": 13,
"Nontemporal": 14,
"Offsets": 16
"ZeroExtend": 13
}
},
{
@ -533,7 +520,6 @@
"PerPrimitiveNV": 5271,
"PerViewNV": 5272,
"PerTaskNV": 5273,
"PerVertexKHR": 5285,
"PerVertexNV": 5285,
"NonUniform": 5300,
"NonUniformEXT": 5300,
@ -541,10 +527,6 @@
"RestrictPointerEXT": 5355,
"AliasedPointer": 5356,
"AliasedPointerEXT": 5356,
"BindlessSamplerNV": 5398,
"BindlessImageNV": 5399,
"BoundSamplerNV": 5400,
"BoundImageNV": 5401,
"SIMTCallINTEL": 5599,
"ReferencedIndirectlyINTEL": 5602,
"ClobberINTEL": 5607,
@ -579,14 +561,11 @@
"PrefetchINTEL": 5902,
"StallEnableINTEL": 5905,
"FuseLoopsInFunctionINTEL": 5907,
"AliasScopeINTEL": 5914,
"NoAliasINTEL": 5915,
"BufferLocationINTEL": 5921,
"IOPipeStorageINTEL": 5944,
"FunctionFloatingPointModeINTEL": 6080,
"SingleElementVectorINTEL": 6085,
"VectorComputeCallableFunctionINTEL": 6087,
"MediaBlockIOINTEL": 6140
"VectorComputeCallableFunctionINTEL": 6087
}
},
{
@ -674,9 +653,7 @@
"LayerPerViewNV": 5279,
"MeshViewCountNV": 5280,
"MeshViewIndicesNV": 5281,
"BaryCoordKHR": 5286,
"BaryCoordNV": 5286,
"BaryCoordNoPerspKHR": 5287,
"BaryCoordNoPerspNV": 5287,
"FragSizeEXT": 5292,
"FragmentSizeNV": 5292,
@ -714,8 +691,7 @@
"WarpsPerSMNV": 5374,
"SMCountNV": 5375,
"WarpIDNV": 5376,
"SMIDNV": 5377,
"CullMaskKHR": 6021
"SMIDNV": 5377
}
},
{
@ -800,9 +776,7 @@
"MakePointerVisible": 4,
"MakePointerVisibleKHR": 4,
"NonPrivatePointer": 5,
"NonPrivatePointerKHR": 5,
"AliasScopeINTELMask": 16,
"NoAliasINTELMask": 17
"NonPrivatePointerKHR": 5
}
},
{
@ -926,7 +900,6 @@
"GroupNonUniformQuad": 68,
"ShaderLayer": 69,
"ShaderViewportIndex": 70,
"UniformDecoration": 71,
"FragmentShadingRateKHR": 4422,
"SubgroupBallotKHR": 4423,
"DrawParameters": 4427,
@ -975,7 +948,6 @@
"FragmentFullyCoveredEXT": 5265,
"MeshShadingNV": 5266,
"ImageFootprintNV": 5282,
"FragmentBarycentricKHR": 5284,
"FragmentBarycentricNV": 5284,
"ComputeDerivativeGroupQuadsNV": 5288,
"FragmentDensityEXT": 5291,
@ -1020,9 +992,7 @@
"FragmentShaderShadingRateInterlockEXT": 5372,
"ShaderSMBuiltinsNV": 5373,
"FragmentShaderPixelInterlockEXT": 5378,
"DemoteToHelperInvocation": 5379,
"DemoteToHelperInvocationEXT": 5379,
"BindlessTextureNV": 5390,
"SubgroupShuffleINTEL": 5568,
"SubgroupBufferBlockIOINTEL": 5569,
"SubgroupImageBlockIOINTEL": 5570,
@ -1055,32 +1025,23 @@
"FPGAMemoryAccessesINTEL": 5898,
"FPGAClusterAttributesINTEL": 5904,
"LoopFuseINTEL": 5906,
"MemoryAccessAliasingINTEL": 5910,
"FPGABufferLocationINTEL": 5920,
"ArbitraryPrecisionFixedPointINTEL": 5922,
"USMStorageClassesINTEL": 5935,
"IOPipesINTEL": 5943,
"BlockingPipesINTEL": 5945,
"FPGARegINTEL": 5948,
"DotProductInputAll": 6016,
"DotProductInputAllKHR": 6016,
"DotProductInput4x8Bit": 6017,
"DotProductInput4x8BitKHR": 6017,
"DotProductInput4x8BitPacked": 6018,
"DotProductInput4x8BitPackedKHR": 6018,
"DotProduct": 6019,
"DotProductKHR": 6019,
"RayCullMaskKHR": 6020,
"BitInstructions": 6025,
"GroupNonUniformRotateKHR": 6026,
"AtomicFloat32AddEXT": 6033,
"AtomicFloat64AddEXT": 6034,
"LongConstantCompositeINTEL": 6089,
"OptNoneINTEL": 6094,
"AtomicFloat16AddEXT": 6095,
"DebugInfoModuleINTEL": 6114,
"SplitBarrierINTEL": 6141,
"GroupUniformArithmeticKHR": 6400
"DebugInfoModuleINTEL": 6114
}
},
{
@ -1188,7 +1149,6 @@
"Type": "Value",
"Values":
{
"PackedVectorFormat4x8Bit": 0,
"PackedVectorFormat4x8BitKHR": 0
}
},
@ -1547,24 +1507,17 @@
"OpSubgroupAllKHR": 4428,
"OpSubgroupAnyKHR": 4429,
"OpSubgroupAllEqualKHR": 4430,
"OpGroupNonUniformRotateKHR": 4431,
"OpSubgroupReadInvocationKHR": 4432,
"OpTraceRayKHR": 4445,
"OpExecuteCallableKHR": 4446,
"OpConvertUToAccelerationStructureKHR": 4447,
"OpIgnoreIntersectionKHR": 4448,
"OpTerminateRayKHR": 4449,
"OpSDot": 4450,
"OpSDotKHR": 4450,
"OpUDot": 4451,
"OpUDotKHR": 4451,
"OpSUDot": 4452,
"OpSUDotKHR": 4452,
"OpSDotAccSat": 4453,
"OpSDotAccSatKHR": 4453,
"OpUDotAccSat": 4454,
"OpUDotAccSatKHR": 4454,
"OpSUDotAccSat": 4455,
"OpSUDotAccSatKHR": 4455,
"OpTypeRayQueryKHR": 4472,
"OpRayQueryInitializeKHR": 4473,
@ -1604,16 +1557,8 @@
"OpCooperativeMatrixLengthNV": 5362,
"OpBeginInvocationInterlockEXT": 5364,
"OpEndInvocationInterlockEXT": 5365,
"OpDemoteToHelperInvocation": 5380,
"OpDemoteToHelperInvocationEXT": 5380,
"OpIsHelperInvocationEXT": 5381,
"OpConvertUToImageNV": 5391,
"OpConvertUToSamplerNV": 5392,
"OpConvertImageToUNV": 5393,
"OpConvertSamplerToUNV": 5394,
"OpConvertUToSampledImageNV": 5395,
"OpConvertSampledImageToUNV": 5396,
"OpSamplerImageAddressingModeNV": 5397,
"OpSubgroupShuffleINTEL": 5571,
"OpSubgroupShuffleDownINTEL": 5572,
"OpSubgroupShuffleUpINTEL": 5573,
@ -1638,7 +1583,7 @@
"OpUSubSatINTEL": 5596,
"OpIMul32x16INTEL": 5597,
"OpUMul32x16INTEL": 5598,
"OpConstantFunctionPointerINTEL": 5600,
"OpConstFunctionPointerINTEL": 5600,
"OpFunctionPointerCallINTEL": 5601,
"OpAsmTargetINTEL": 5609,
"OpAsmINTEL": 5610,
@ -1814,9 +1759,6 @@
"OpArbitraryFloatPowRINTEL": 5881,
"OpArbitraryFloatPowNINTEL": 5882,
"OpLoopControlINTEL": 5887,
"OpAliasDomainDeclINTEL": 5911,
"OpAliasScopeDeclINTEL": 5912,
"OpAliasScopeListDeclINTEL": 5913,
"OpFixedSqrtINTEL": 5923,
"OpFixedRecipINTEL": 5924,
"OpFixedRsqrtINTEL": 5925,
@ -1854,17 +1796,7 @@
"OpTypeBufferSurfaceINTEL": 6086,
"OpTypeStructContinuedINTEL": 6090,
"OpConstantCompositeContinuedINTEL": 6091,
"OpSpecConstantCompositeContinuedINTEL": 6092,
"OpControlBarrierArriveINTEL": 6142,
"OpControlBarrierWaitINTEL": 6143,
"OpGroupIMulKHR": 6401,
"OpGroupFMulKHR": 6402,
"OpGroupBitwiseAndKHR": 6403,
"OpGroupBitwiseOrKHR": 6404,
"OpGroupBitwiseXorKHR": 6405,
"OpGroupLogicalAndKHR": 6406,
"OpGroupLogicalOrKHR": 6407,
"OpGroupLogicalXorKHR": 6408
"OpSpecConstantCompositeContinuedINTEL": 6092
}
}
]

80
include/spirv/unified1/spirv.lua
View File

@ -26,7 +26,7 @@
-- the Binary Section of the SPIR-V specification.
-- Enumeration tokens for SPIR-V, in various styles:
-- C, C++, C++11, JSON, Lua, Python, C#, D, Beef
-- C, C++, C++11, JSON, Lua, Python, C#, D
--
-- - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
-- - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -36,8 +36,6 @@
-- - C# will use enum classes in the Specification class located in the "Spv" namespace,
-- e.g.: Spv.Specification.SourceLanguage.GLSL
-- - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
-- - Beef will use enum classes in the Specification class located in the "Spv" namespace,
-- e.g.: Spv.Specification.SourceLanguage.GLSL
--
-- Some tokens act like mask values, which can be OR'd together,
-- while others are mutually exclusive. The mask-like ones have
@ -46,8 +44,8 @@
spv = {
MagicNumber = 0x07230203,
Version = 0x00010600,
Revision = 1,
Version = 0x00010500,
Revision = 4,
OpCodeMask = 0xffff,
WordCountShift = 16,
@ -59,7 +57,6 @@ spv = {
OpenCL_CPP = 4,
HLSL = 5,
CPP_for_OpenCL = 6,
SYCL = 7,
},
ExecutionModel = {
@ -148,14 +145,7 @@ spv = {
SignedZeroInfNanPreserve = 4461,
RoundingModeRTE = 4462,
RoundingModeRTZ = 4463,
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
StencilRefUnchangedFrontAMD = 5079,
StencilRefGreaterFrontAMD = 5080,
StencilRefLessFrontAMD = 5081,
StencilRefUnchangedBackAMD = 5082,
StencilRefGreaterBackAMD = 5083,
StencilRefLessBackAMD = 5084,
OutputLinesNV = 5269,
OutputPrimitivesNV = 5270,
DerivativeGroupQuadsNV = 5289,
@ -177,7 +167,6 @@ spv = {
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
NamedBarrierCountINTEL = 6417,
},
StorageClass = {
@ -343,8 +332,6 @@ spv = {
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
Nontemporal = 14,
Offsets = 16,
},
ImageOperandsMask = {
@ -367,8 +354,6 @@ spv = {
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
Nontemporal = 0x00004000,
Offsets = 0x00010000,
},
FPFastMathModeShift = {
@ -480,7 +465,6 @@ spv = {
PerPrimitiveNV = 5271,
PerViewNV = 5272,
PerTaskNV = 5273,
PerVertexKHR = 5285,
PerVertexNV = 5285,
NonUniform = 5300,
NonUniformEXT = 5300,
@ -488,10 +472,6 @@ spv = {
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
BindlessSamplerNV = 5398,
BindlessImageNV = 5399,
BoundSamplerNV = 5400,
BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@ -526,14 +506,11 @@ spv = {
PrefetchINTEL = 5902,
StallEnableINTEL = 5905,
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
},
BuiltIn = {
@ -617,9 +594,7 @@ spv = {
LayerPerViewNV = 5279,
MeshViewCountNV = 5280,
MeshViewIndicesNV = 5281,
BaryCoordKHR = 5286,
BaryCoordNV = 5286,
BaryCoordNoPerspKHR = 5287,
BaryCoordNoPerspNV = 5287,
FragSizeEXT = 5292,
FragmentSizeNV = 5292,
@ -658,7 +633,6 @@ spv = {
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
CullMaskKHR = 6021,
},
SelectionControlShift = {
@ -781,8 +755,6 @@ spv = {
MakePointerVisibleKHR = 4,
NonPrivatePointer = 5,
NonPrivatePointerKHR = 5,
AliasScopeINTELMask = 16,
NoAliasINTELMask = 17,
},
MemoryAccessMask = {
@ -796,8 +768,6 @@ spv = {
MakePointerVisibleKHR = 0x00000010,
NonPrivatePointer = 0x00000020,
NonPrivatePointerKHR = 0x00000020,
AliasScopeINTELMask = 0x00010000,
NoAliasINTELMask = 0x00020000,
},
Scope = {
@ -906,7 +876,6 @@ spv = {
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
UniformDecoration = 71,
FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
@ -955,7 +924,6 @@ spv = {
FragmentFullyCoveredEXT = 5265,
MeshShadingNV = 5266,
ImageFootprintNV = 5282,
FragmentBarycentricKHR = 5284,
FragmentBarycentricNV = 5284,
ComputeDerivativeGroupQuadsNV = 5288,
FragmentDensityEXT = 5291,
@ -1000,9 +968,7 @@ spv = {
FragmentShaderShadingRateInterlockEXT = 5372,
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocation = 5379,
DemoteToHelperInvocationEXT = 5379,
BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1035,32 +1001,23 @@ spv = {
FPGAMemoryAccessesINTEL = 5898,
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
IOPipesINTEL = 5943,
BlockingPipesINTEL = 5945,
FPGARegINTEL = 5948,
DotProductInputAll = 6016,
DotProductInputAllKHR = 6016,
DotProductInput4x8Bit = 6017,
DotProductInput4x8BitKHR = 6017,
DotProductInput4x8BitPacked = 6018,
DotProductInput4x8BitPackedKHR = 6018,
DotProduct = 6019,
DotProductKHR = 6019,
RayCullMaskKHR = 6020,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongConstantCompositeINTEL = 6089,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
GroupUniformArithmeticKHR = 6400,
},
RayFlagsShift = {
@ -1150,7 +1107,6 @@ spv = {
},
PackedVectorFormat = {
PackedVectorFormat4x8Bit = 0,
PackedVectorFormat4x8BitKHR = 0,
},
@ -1505,24 +1461,17 @@ spv = {
OpSubgroupAllKHR = 4428,
OpSubgroupAnyKHR = 4429,
OpSubgroupAllEqualKHR = 4430,
OpGroupNonUniformRotateKHR = 4431,
OpSubgroupReadInvocationKHR = 4432,
OpTraceRayKHR = 4445,
OpExecuteCallableKHR = 4446,
OpConvertUToAccelerationStructureKHR = 4447,
OpIgnoreIntersectionKHR = 4448,
OpTerminateRayKHR = 4449,
OpSDot = 4450,
OpSDotKHR = 4450,
OpUDot = 4451,
OpUDotKHR = 4451,
OpSUDot = 4452,
OpSUDotKHR = 4452,
OpSDotAccSat = 4453,
OpSDotAccSatKHR = 4453,
OpUDotAccSat = 4454,
OpUDotAccSatKHR = 4454,
OpSUDotAccSat = 4455,
OpSUDotAccSatKHR = 4455,
OpTypeRayQueryKHR = 4472,
OpRayQueryInitializeKHR = 4473,
@ -1562,16 +1511,8 @@ spv = {
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
OpConvertSamplerToUNV = 5394,
OpConvertUToSampledImageNV = 5395,
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -1596,7 +1537,7 @@ spv = {
OpUSubSatINTEL = 5596,
OpIMul32x16INTEL = 5597,
OpUMul32x16INTEL = 5598,
OpConstantFunctionPointerINTEL = 5600,
OpConstFunctionPointerINTEL = 5600,
OpFunctionPointerCallINTEL = 5601,
OpAsmTargetINTEL = 5609,
OpAsmINTEL = 5610,
@ -1772,9 +1713,6 @@ spv = {
OpArbitraryFloatPowRINTEL = 5881,
OpArbitraryFloatPowNINTEL = 5882,
OpLoopControlINTEL = 5887,
OpAliasDomainDeclINTEL = 5911,
OpAliasScopeDeclINTEL = 5912,
OpAliasScopeListDeclINTEL = 5913,
OpFixedSqrtINTEL = 5923,
OpFixedRecipINTEL = 5924,
OpFixedRsqrtINTEL = 5925,
@ -1813,16 +1751,6 @@ spv = {
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
},
}

80
include/spirv/unified1/spirv.py
View File

@ -26,7 +26,7 @@
# the Binary Section of the SPIR-V specification.
# Enumeration tokens for SPIR-V, in various styles:
# C, C++, C++11, JSON, Lua, Python, C#, D, Beef
# C, C++, C++11, JSON, Lua, Python, C#, D
#
# - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
# - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -36,8 +36,6 @@
# - C# will use enum classes in the Specification class located in the "Spv" namespace,
# e.g.: Spv.Specification.SourceLanguage.GLSL
# - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
# - Beef will use enum classes in the Specification class located in the "Spv" namespace,
# e.g.: Spv.Specification.SourceLanguage.GLSL
#
# Some tokens act like mask values, which can be OR'd together,
# while others are mutually exclusive. The mask-like ones have
@ -46,8 +44,8 @@
spv = {
'MagicNumber' : 0x07230203,
'Version' : 0x00010600,
'Revision' : 1,
'Version' : 0x00010500,
'Revision' : 4,
'OpCodeMask' : 0xffff,
'WordCountShift' : 16,
@ -59,7 +57,6 @@ spv = {
'OpenCL_CPP' : 4,
'HLSL' : 5,
'CPP_for_OpenCL' : 6,
'SYCL' : 7,
},
'ExecutionModel' : {
@ -148,14 +145,7 @@ spv = {
'SignedZeroInfNanPreserve' : 4461,
'RoundingModeRTE' : 4462,
'RoundingModeRTZ' : 4463,
'EarlyAndLateFragmentTestsAMD' : 5017,
'StencilRefReplacingEXT' : 5027,
'StencilRefUnchangedFrontAMD' : 5079,
'StencilRefGreaterFrontAMD' : 5080,
'StencilRefLessFrontAMD' : 5081,
'StencilRefUnchangedBackAMD' : 5082,
'StencilRefGreaterBackAMD' : 5083,
'StencilRefLessBackAMD' : 5084,
'OutputLinesNV' : 5269,
'OutputPrimitivesNV' : 5270,
'DerivativeGroupQuadsNV' : 5289,
@ -177,7 +167,6 @@ spv = {
'NoGlobalOffsetINTEL' : 5895,
'NumSIMDWorkitemsINTEL' : 5896,
'SchedulerTargetFmaxMhzINTEL' : 5903,
'NamedBarrierCountINTEL' : 6417,
},
'StorageClass' : {
@ -343,8 +332,6 @@ spv = {
'VolatileTexelKHR' : 11,
'SignExtend' : 12,
'ZeroExtend' : 13,
'Nontemporal' : 14,
'Offsets' : 16,
},
'ImageOperandsMask' : {
@ -367,8 +354,6 @@ spv = {
'VolatileTexelKHR' : 0x00000800,
'SignExtend' : 0x00001000,
'ZeroExtend' : 0x00002000,
'Nontemporal' : 0x00004000,
'Offsets' : 0x00010000,
},
'FPFastMathModeShift' : {
@ -480,7 +465,6 @@ spv = {
'PerPrimitiveNV' : 5271,
'PerViewNV' : 5272,
'PerTaskNV' : 5273,
'PerVertexKHR' : 5285,
'PerVertexNV' : 5285,
'NonUniform' : 5300,
'NonUniformEXT' : 5300,
@ -488,10 +472,6 @@ spv = {
'RestrictPointerEXT' : 5355,
'AliasedPointer' : 5356,
'AliasedPointerEXT' : 5356,
'BindlessSamplerNV' : 5398,
'BindlessImageNV' : 5399,
'BoundSamplerNV' : 5400,
'BoundImageNV' : 5401,
'SIMTCallINTEL' : 5599,
'ReferencedIndirectlyINTEL' : 5602,
'ClobberINTEL' : 5607,
@ -526,14 +506,11 @@ spv = {
'PrefetchINTEL' : 5902,
'StallEnableINTEL' : 5905,
'FuseLoopsInFunctionINTEL' : 5907,
'AliasScopeINTEL' : 5914,
'NoAliasINTEL' : 5915,
'BufferLocationINTEL' : 5921,
'IOPipeStorageINTEL' : 5944,
'FunctionFloatingPointModeINTEL' : 6080,
'SingleElementVectorINTEL' : 6085,
'VectorComputeCallableFunctionINTEL' : 6087,
'MediaBlockIOINTEL' : 6140,
},
'BuiltIn' : {
@ -617,9 +594,7 @@ spv = {
'LayerPerViewNV' : 5279,
'MeshViewCountNV' : 5280,
'MeshViewIndicesNV' : 5281,
'BaryCoordKHR' : 5286,
'BaryCoordNV' : 5286,
'BaryCoordNoPerspKHR' : 5287,
'BaryCoordNoPerspNV' : 5287,
'FragSizeEXT' : 5292,
'FragmentSizeNV' : 5292,
@ -658,7 +633,6 @@ spv = {
'SMCountNV' : 5375,
'WarpIDNV' : 5376,
'SMIDNV' : 5377,
'CullMaskKHR' : 6021,
},
'SelectionControlShift' : {
@ -781,8 +755,6 @@ spv = {
'MakePointerVisibleKHR' : 4,
'NonPrivatePointer' : 5,
'NonPrivatePointerKHR' : 5,
'AliasScopeINTELMask' : 16,
'NoAliasINTELMask' : 17,
},
'MemoryAccessMask' : {
@ -796,8 +768,6 @@ spv = {
'MakePointerVisibleKHR' : 0x00000010,
'NonPrivatePointer' : 0x00000020,
'NonPrivatePointerKHR' : 0x00000020,
'AliasScopeINTELMask' : 0x00010000,
'NoAliasINTELMask' : 0x00020000,
},
'Scope' : {
@ -906,7 +876,6 @@ spv = {
'GroupNonUniformQuad' : 68,
'ShaderLayer' : 69,
'ShaderViewportIndex' : 70,
'UniformDecoration' : 71,
'FragmentShadingRateKHR' : 4422,
'SubgroupBallotKHR' : 4423,
'DrawParameters' : 4427,
@ -955,7 +924,6 @@ spv = {
'FragmentFullyCoveredEXT' : 5265,
'MeshShadingNV' : 5266,
'ImageFootprintNV' : 5282,
'FragmentBarycentricKHR' : 5284,
'FragmentBarycentricNV' : 5284,
'ComputeDerivativeGroupQuadsNV' : 5288,
'FragmentDensityEXT' : 5291,
@ -1000,9 +968,7 @@ spv = {
'FragmentShaderShadingRateInterlockEXT' : 5372,
'ShaderSMBuiltinsNV' : 5373,
'FragmentShaderPixelInterlockEXT' : 5378,
'DemoteToHelperInvocation' : 5379,
'DemoteToHelperInvocationEXT' : 5379,
'BindlessTextureNV' : 5390,
'SubgroupShuffleINTEL' : 5568,
'SubgroupBufferBlockIOINTEL' : 5569,
'SubgroupImageBlockIOINTEL' : 5570,
@ -1035,32 +1001,23 @@ spv = {
'FPGAMemoryAccessesINTEL' : 5898,
'FPGAClusterAttributesINTEL' : 5904,
'LoopFuseINTEL' : 5906,
'MemoryAccessAliasingINTEL' : 5910,
'FPGABufferLocationINTEL' : 5920,
'ArbitraryPrecisionFixedPointINTEL' : 5922,
'USMStorageClassesINTEL' : 5935,
'IOPipesINTEL' : 5943,
'BlockingPipesINTEL' : 5945,
'FPGARegINTEL' : 5948,
'DotProductInputAll' : 6016,
'DotProductInputAllKHR' : 6016,
'DotProductInput4x8Bit' : 6017,
'DotProductInput4x8BitKHR' : 6017,
'DotProductInput4x8BitPacked' : 6018,
'DotProductInput4x8BitPackedKHR' : 6018,
'DotProduct' : 6019,
'DotProductKHR' : 6019,
'RayCullMaskKHR' : 6020,
'BitInstructions' : 6025,
'GroupNonUniformRotateKHR' : 6026,
'AtomicFloat32AddEXT' : 6033,
'AtomicFloat64AddEXT' : 6034,
'LongConstantCompositeINTEL' : 6089,
'OptNoneINTEL' : 6094,
'AtomicFloat16AddEXT' : 6095,
'DebugInfoModuleINTEL' : 6114,
'SplitBarrierINTEL' : 6141,
'GroupUniformArithmeticKHR' : 6400,
},
'RayFlagsShift' : {
@ -1150,7 +1107,6 @@ spv = {
},
'PackedVectorFormat' : {
'PackedVectorFormat4x8Bit' : 0,
'PackedVectorFormat4x8BitKHR' : 0,
},
@ -1505,24 +1461,17 @@ spv = {
'OpSubgroupAllKHR' : 4428,
'OpSubgroupAnyKHR' : 4429,
'OpSubgroupAllEqualKHR' : 4430,
'OpGroupNonUniformRotateKHR' : 4431,
'OpSubgroupReadInvocationKHR' : 4432,
'OpTraceRayKHR' : 4445,
'OpExecuteCallableKHR' : 4446,
'OpConvertUToAccelerationStructureKHR' : 4447,
'OpIgnoreIntersectionKHR' : 4448,
'OpTerminateRayKHR' : 4449,
'OpSDot' : 4450,
'OpSDotKHR' : 4450,
'OpUDot' : 4451,
'OpUDotKHR' : 4451,
'OpSUDot' : 4452,
'OpSUDotKHR' : 4452,
'OpSDotAccSat' : 4453,
'OpSDotAccSatKHR' : 4453,
'OpUDotAccSat' : 4454,
'OpUDotAccSatKHR' : 4454,
'OpSUDotAccSat' : 4455,
'OpSUDotAccSatKHR' : 4455,
'OpTypeRayQueryKHR' : 4472,
'OpRayQueryInitializeKHR' : 4473,
@ -1562,16 +1511,8 @@ spv = {
'OpCooperativeMatrixLengthNV' : 5362,
'OpBeginInvocationInterlockEXT' : 5364,
'OpEndInvocationInterlockEXT' : 5365,
'OpDemoteToHelperInvocation' : 5380,
'OpDemoteToHelperInvocationEXT' : 5380,
'OpIsHelperInvocationEXT' : 5381,
'OpConvertUToImageNV' : 5391,
'OpConvertUToSamplerNV' : 5392,
'OpConvertImageToUNV' : 5393,
'OpConvertSamplerToUNV' : 5394,
'OpConvertUToSampledImageNV' : 5395,
'OpConvertSampledImageToUNV' : 5396,
'OpSamplerImageAddressingModeNV' : 5397,
'OpSubgroupShuffleINTEL' : 5571,
'OpSubgroupShuffleDownINTEL' : 5572,
'OpSubgroupShuffleUpINTEL' : 5573,
@ -1596,7 +1537,7 @@ spv = {
'OpUSubSatINTEL' : 5596,
'OpIMul32x16INTEL' : 5597,
'OpUMul32x16INTEL' : 5598,
'OpConstantFunctionPointerINTEL' : 5600,
'OpConstFunctionPointerINTEL' : 5600,
'OpFunctionPointerCallINTEL' : 5601,
'OpAsmTargetINTEL' : 5609,
'OpAsmINTEL' : 5610,
@ -1772,9 +1713,6 @@ spv = {
'OpArbitraryFloatPowRINTEL' : 5881,
'OpArbitraryFloatPowNINTEL' : 5882,
'OpLoopControlINTEL' : 5887,
'OpAliasDomainDeclINTEL' : 5911,
'OpAliasScopeDeclINTEL' : 5912,
'OpAliasScopeListDeclINTEL' : 5913,
'OpFixedSqrtINTEL' : 5923,
'OpFixedRecipINTEL' : 5924,
'OpFixedRsqrtINTEL' : 5925,
@ -1813,16 +1751,6 @@ spv = {
'OpTypeStructContinuedINTEL' : 6090,
'OpConstantCompositeContinuedINTEL' : 6091,
'OpSpecConstantCompositeContinuedINTEL' : 6092,
'OpControlBarrierArriveINTEL' : 6142,
'OpControlBarrierWaitINTEL' : 6143,
'OpGroupIMulKHR' : 6401,
'OpGroupFMulKHR' : 6402,
'OpGroupBitwiseAndKHR' : 6403,
'OpGroupBitwiseOrKHR' : 6404,
'OpGroupBitwiseXorKHR' : 6405,
'OpGroupLogicalAndKHR' : 6406,
'OpGroupLogicalOrKHR' : 6407,
'OpGroupLogicalXorKHR' : 6408,
},
}

80
include/spirv/unified1/spv.d
View File

@ -31,7 +31,7 @@
/+
+ Enumeration tokens for SPIR-V, in various styles:
+ C, C++, C++11, JSON, Lua, Python, C#, D, Beef
+ C, C++, C++11, JSON, Lua, Python, C#, D
+
+ - C will have tokens with a "Spv" prefix, e.g.: SpvSourceLanguageGLSL
+ - C++ will have tokens in the "spv" name space, e.g.: spv::SourceLanguageGLSL
@ -41,8 +41,6 @@
+ - C# will use enum classes in the Specification class located in the "Spv" namespace,
+ e.g.: Spv.Specification.SourceLanguage.GLSL
+ - D will have tokens under the "spv" module, e.g: spv.SourceLanguage.GLSL
+ - Beef will use enum classes in the Specification class located in the "Spv" namespace,
+ e.g.: Spv.Specification.SourceLanguage.GLSL
+
+ Some tokens act like mask values, which can be OR'd together,
+ while others are mutually exclusive. The mask-like ones have
@ -53,8 +51,8 @@
module spv;
enum uint MagicNumber = 0x07230203;
enum uint Version = 0x00010600;
enum uint Revision = 1;
enum uint Version = 0x00010500;
enum uint Revision = 4;
enum uint OpCodeMask = 0xffff;
enum uint WordCountShift = 16;
@ -67,7 +65,6 @@ enum SourceLanguage : uint
OpenCL_CPP = 4,
HLSL = 5,
CPP_for_OpenCL = 6,
SYCL = 7,
}
enum ExecutionModel : uint
@ -160,14 +157,7 @@ enum ExecutionMode : uint
SignedZeroInfNanPreserve = 4461,
RoundingModeRTE = 4462,
RoundingModeRTZ = 4463,
EarlyAndLateFragmentTestsAMD = 5017,
StencilRefReplacingEXT = 5027,
StencilRefUnchangedFrontAMD = 5079,
StencilRefGreaterFrontAMD = 5080,
StencilRefLessFrontAMD = 5081,
StencilRefUnchangedBackAMD = 5082,
StencilRefGreaterBackAMD = 5083,
StencilRefLessBackAMD = 5084,
OutputLinesNV = 5269,
OutputPrimitivesNV = 5270,
DerivativeGroupQuadsNV = 5289,
@ -189,7 +179,6 @@ enum ExecutionMode : uint
NoGlobalOffsetINTEL = 5895,
NumSIMDWorkitemsINTEL = 5896,
SchedulerTargetFmaxMhzINTEL = 5903,
NamedBarrierCountINTEL = 6417,
}
enum StorageClass : uint
@ -363,8 +352,6 @@ enum ImageOperandsShift : uint
VolatileTexelKHR = 11,
SignExtend = 12,
ZeroExtend = 13,
Nontemporal = 14,
Offsets = 16,
}
enum ImageOperandsMask : uint
@ -388,8 +375,6 @@ enum ImageOperandsMask : uint
VolatileTexelKHR = 0x00000800,
SignExtend = 0x00001000,
ZeroExtend = 0x00002000,
Nontemporal = 0x00004000,
Offsets = 0x00010000,
}
enum FPFastMathModeShift : uint
@ -508,7 +493,6 @@ enum Decoration : uint
PerPrimitiveNV = 5271,
PerViewNV = 5272,
PerTaskNV = 5273,
PerVertexKHR = 5285,
PerVertexNV = 5285,
NonUniform = 5300,
NonUniformEXT = 5300,
@ -516,10 +500,6 @@ enum Decoration : uint
RestrictPointerEXT = 5355,
AliasedPointer = 5356,
AliasedPointerEXT = 5356,
BindlessSamplerNV = 5398,
BindlessImageNV = 5399,
BoundSamplerNV = 5400,
BoundImageNV = 5401,
SIMTCallINTEL = 5599,
ReferencedIndirectlyINTEL = 5602,
ClobberINTEL = 5607,
@ -554,14 +534,11 @@ enum Decoration : uint
PrefetchINTEL = 5902,
StallEnableINTEL = 5905,
FuseLoopsInFunctionINTEL = 5907,
AliasScopeINTEL = 5914,
NoAliasINTEL = 5915,
BufferLocationINTEL = 5921,
IOPipeStorageINTEL = 5944,
FunctionFloatingPointModeINTEL = 6080,
SingleElementVectorINTEL = 6085,
VectorComputeCallableFunctionINTEL = 6087,
MediaBlockIOINTEL = 6140,
}
enum BuiltIn : uint
@ -646,9 +623,7 @@ enum BuiltIn : uint
LayerPerViewNV = 5279,
MeshViewCountNV = 5280,
MeshViewIndicesNV = 5281,
BaryCoordKHR = 5286,
BaryCoordNV = 5286,
BaryCoordNoPerspKHR = 5287,
BaryCoordNoPerspNV = 5287,
FragSizeEXT = 5292,
FragmentSizeNV = 5292,
@ -687,7 +662,6 @@ enum BuiltIn : uint
SMCountNV = 5375,
WarpIDNV = 5376,
SMIDNV = 5377,
CullMaskKHR = 6021,
}
enum SelectionControlShift : uint
@ -819,8 +793,6 @@ enum MemoryAccessShift : uint
MakePointerVisibleKHR = 4,
NonPrivatePointer = 5,
NonPrivatePointerKHR = 5,
AliasScopeINTELMask = 16,
NoAliasINTELMask = 17,
}
enum MemoryAccessMask : uint
@ -835,8 +807,6 @@ enum MemoryAccessMask : uint
MakePointerVisibleKHR = 0x00000010,
NonPrivatePointer = 0x00000020,
NonPrivatePointerKHR = 0x00000020,
AliasScopeINTELMask = 0x00010000,
NoAliasINTELMask = 0x00020000,
}
enum Scope : uint
@ -951,7 +921,6 @@ enum Capability : uint
GroupNonUniformQuad = 68,
ShaderLayer = 69,
ShaderViewportIndex = 70,
UniformDecoration = 71,
FragmentShadingRateKHR = 4422,
SubgroupBallotKHR = 4423,
DrawParameters = 4427,
@ -1000,7 +969,6 @@ enum Capability : uint
FragmentFullyCoveredEXT = 5265,
MeshShadingNV = 5266,
ImageFootprintNV = 5282,
FragmentBarycentricKHR = 5284,
FragmentBarycentricNV = 5284,
ComputeDerivativeGroupQuadsNV = 5288,
FragmentDensityEXT = 5291,
@ -1045,9 +1013,7 @@ enum Capability : uint
FragmentShaderShadingRateInterlockEXT = 5372,
ShaderSMBuiltinsNV = 5373,
FragmentShaderPixelInterlockEXT = 5378,
DemoteToHelperInvocation = 5379,
DemoteToHelperInvocationEXT = 5379,
BindlessTextureNV = 5390,
SubgroupShuffleINTEL = 5568,
SubgroupBufferBlockIOINTEL = 5569,
SubgroupImageBlockIOINTEL = 5570,
@ -1080,32 +1046,23 @@ enum Capability : uint
FPGAMemoryAccessesINTEL = 5898,
FPGAClusterAttributesINTEL = 5904,
LoopFuseINTEL = 5906,
MemoryAccessAliasingINTEL = 5910,
FPGABufferLocationINTEL = 5920,
ArbitraryPrecisionFixedPointINTEL = 5922,
USMStorageClassesINTEL = 5935,
IOPipesINTEL = 5943,
BlockingPipesINTEL = 5945,
FPGARegINTEL = 5948,
DotProductInputAll = 6016,
DotProductInputAllKHR = 6016,
DotProductInput4x8Bit = 6017,
DotProductInput4x8BitKHR = 6017,
DotProductInput4x8BitPacked = 6018,
DotProductInput4x8BitPackedKHR = 6018,
DotProduct = 6019,
DotProductKHR = 6019,
RayCullMaskKHR = 6020,
BitInstructions = 6025,
GroupNonUniformRotateKHR = 6026,
AtomicFloat32AddEXT = 6033,
AtomicFloat64AddEXT = 6034,
LongConstantCompositeINTEL = 6089,
OptNoneINTEL = 6094,
AtomicFloat16AddEXT = 6095,
DebugInfoModuleINTEL = 6114,
SplitBarrierINTEL = 6141,
GroupUniformArithmeticKHR = 6400,
}
enum RayFlagsShift : uint
@ -1207,7 +1164,6 @@ enum OverflowModes : uint
enum PackedVectorFormat : uint
{
PackedVectorFormat4x8Bit = 0,
PackedVectorFormat4x8BitKHR = 0,
}
@ -1563,24 +1519,17 @@ enum Op : uint
OpSubgroupAllKHR = 4428,
OpSubgroupAnyKHR = 4429,
OpSubgroupAllEqualKHR = 4430,
OpGroupNonUniformRotateKHR = 4431,
OpSubgroupReadInvocationKHR = 4432,
OpTraceRayKHR = 4445,
OpExecuteCallableKHR = 4446,
OpConvertUToAccelerationStructureKHR = 4447,
OpIgnoreIntersectionKHR = 4448,
OpTerminateRayKHR = 4449,
OpSDot = 4450,
OpSDotKHR = 4450,
OpUDot = 4451,
OpUDotKHR = 4451,
OpSUDot = 4452,
OpSUDotKHR = 4452,
OpSDotAccSat = 4453,
OpSDotAccSatKHR = 4453,
OpUDotAccSat = 4454,
OpUDotAccSatKHR = 4454,
OpSUDotAccSat = 4455,
OpSUDotAccSatKHR = 4455,
OpTypeRayQueryKHR = 4472,
OpRayQueryInitializeKHR = 4473,
@ -1620,16 +1569,8 @@ enum Op : uint
OpCooperativeMatrixLengthNV = 5362,
OpBeginInvocationInterlockEXT = 5364,
OpEndInvocationInterlockEXT = 5365,
OpDemoteToHelperInvocation = 5380,
OpDemoteToHelperInvocationEXT = 5380,
OpIsHelperInvocationEXT = 5381,
OpConvertUToImageNV = 5391,
OpConvertUToSamplerNV = 5392,
OpConvertImageToUNV = 5393,
OpConvertSamplerToUNV = 5394,
OpConvertUToSampledImageNV = 5395,
OpConvertSampledImageToUNV = 5396,
OpSamplerImageAddressingModeNV = 5397,
OpSubgroupShuffleINTEL = 5571,
OpSubgroupShuffleDownINTEL = 5572,
OpSubgroupShuffleUpINTEL = 5573,
@ -1654,7 +1595,7 @@ enum Op : uint
OpUSubSatINTEL = 5596,
OpIMul32x16INTEL = 5597,
OpUMul32x16INTEL = 5598,
OpConstantFunctionPointerINTEL = 5600,
OpConstFunctionPointerINTEL = 5600,
OpFunctionPointerCallINTEL = 5601,
OpAsmTargetINTEL = 5609,
OpAsmINTEL = 5610,
@ -1830,9 +1771,6 @@ enum Op : uint
OpArbitraryFloatPowRINTEL = 5881,
OpArbitraryFloatPowNINTEL = 5882,
OpLoopControlINTEL = 5887,
OpAliasDomainDeclINTEL = 5911,
OpAliasScopeDeclINTEL = 5912,
OpAliasScopeListDeclINTEL = 5913,
OpFixedSqrtINTEL = 5923,
OpFixedRecipINTEL = 5924,
OpFixedRsqrtINTEL = 5925,
@ -1871,16 +1809,6 @@ enum Op : uint
OpTypeStructContinuedINTEL = 6090,
OpConstantCompositeContinuedINTEL = 6091,
OpSpecConstantCompositeContinuedINTEL = 6092,
OpControlBarrierArriveINTEL = 6142,
OpControlBarrierWaitINTEL = 6143,
OpGroupIMulKHR = 6401,
OpGroupFMulKHR = 6402,
OpGroupBitwiseAndKHR = 6403,
OpGroupBitwiseOrKHR = 6404,
OpGroupBitwiseXorKHR = 6405,
OpGroupLogicalAndKHR = 6406,
OpGroupLogicalOrKHR = 6407,
OpGroupLogicalXorKHR = 6408,
}

52
tools/buildHeaders/header.cpp
View File

@ -69,9 +69,9 @@ namespace {
TPrinter();
static const int DocMagicNumber = 0x07230203;
static const int DocVersion = 0x00010600;
static const int DocRevision = 1;
#define DocRevisionString "1"
static const int DocVersion = 0x00010500;
static const int DocRevision = 4;
#define DocRevisionString "4"
static const std::string DocCopyright;
static const std::string DocComment1;
static const std::string DocComment2;
@ -199,7 +199,7 @@ namespace {
const std::string TPrinter::DocComment2 =
"Enumeration tokens for SPIR-V, in various styles:\n"
" C, C++, C++11, JSON, Lua, Python, C#, D, Beef\n"
" C, C++, C++11, JSON, Lua, Python, C#, D\n"
"\n"
"- C will have tokens with a \"Spv\" prefix, e.g.: SpvSourceLanguageGLSL\n"
"- C++ will have tokens in the \"spv\" name space, e.g.: spv::SourceLanguageGLSL\n"
@ -209,8 +209,6 @@ namespace {
"- C# will use enum classes in the Specification class located in the \"Spv\" namespace,\n"
" e.g.: Spv.Specification.SourceLanguage.GLSL\n"
"- D will have tokens under the \"spv\" module, e.g: spv.SourceLanguage.GLSL\n"
"- Beef will use enum classes in the Specification class located in the \"Spv\" namespace,\n"
" e.g.: Spv.Specification.SourceLanguage.GLSL\n"
"\n"
"Some tokens act like mask values, which can be OR'd together,\n"
"while others are mutually exclusive. The mask-like ones have\n"
@ -515,9 +513,6 @@ namespace {
}
out << "#ifdef SPV_ENABLE_UTILITY_CODE" << std::endl;
out << "#ifndef __cplusplus" << std::endl;
out << "#include <stdbool.h>" << std::endl;
out << "#endif" << std::endl;
out << "inline void " << pre() << "HasResultAndType(" << pre() << opName << " opcode, bool *hasResult, bool *hasResultType) {" << std::endl;
out << " *hasResult = *hasResultType = false;" << std::endl;
out << " switch (opcode) {" << std::endl;
@ -781,43 +776,6 @@ namespace {
}
};
// Beef printer
class TPrinterBeef final : public TPrinter {
private:
std::string commentBOL() const override { return "// "; }
void printPrologue(std::ostream& out) const override {
out << "namespace Spv\n{\n";
out << indent() << "using System;\n\n";
out << indent() << "public static class Specification\n";
out << indent() << "{\n";
}
void printEpilogue(std::ostream& out) const override {
out << indent() << "}\n";
out << "}\n";
}
std::string enumBeg(const std::string& s, enumStyle_t style) const override {
return indent(2) + "[AllowDuplicates, CRepr] public enum " + s + styleStr(style) + "\n" + indent(2) + "{\n";
}
std::string enumEnd(const std::string& s, enumStyle_t style, bool isLast) const override {
return indent(2) + "}" + +(isLast ? "\n" : "\n\n");
}
std::string enumFmt(const std::string& s, const valpair_t& v,
enumStyle_t style, bool isLast) const override {
return indent(3) + prependIfDigit(s, v.second) + " = " + fmtStyleVal(v.first, style) + ",\n";
}
std::string fmtConstInt(unsigned val, const std::string& name,
const char* fmt, bool isLast) const override {
return indent(2) + std::string("public const uint32 ") + name +
" = " + fmtNum(fmt, val) + (isLast ? ";\n\n" : ";\n");
}
};
} // namespace
namespace spv {
@ -834,7 +792,6 @@ namespace spv {
langInfo.push_back(std::make_pair(ELangPython, "spirv.py"));
langInfo.push_back(std::make_pair(ELangCSharp, "spirv.cs"));
langInfo.push_back(std::make_pair(ELangD, "spv.d"));
langInfo.push_back(std::make_pair(ELangBeef, "spirv.bf"));
for (const auto& lang : langInfo) {
std::ofstream out(lang.second, std::ios::out);
@ -862,7 +819,6 @@ namespace spv {
case ELangPython: p = TPrinterPtr(new TPrinterPython); break;
case ELangCSharp: p = TPrinterPtr(new TPrinterCSharp); break;
case ELangD: p = TPrinterPtr(new TPrinterD); break;
case ELangBeef: p = TPrinterPtr(new TPrinterBeef); break;
case ELangAll: PrintAllHeaders(); break;
default:
std::cerr << "Unknown language." << std::endl;

1
tools/buildHeaders/header.h
View File

@ -43,7 +43,6 @@ namespace spv {
ELangPython, // Python
ELangCSharp, // CSharp
ELangD, // D
ELangBeef, // Beef
ELangAll, // print headers in all languages to files
};

3
tools/buildHeaders/main.cpp
View File

@ -52,7 +52,6 @@ void Usage()
" Python - Python module (also accepts Py)\n"
" C# - C# module (also accepts CSharp)\n"
" D - D module\n"
" Beef - Beef module\n"
" -H print header in all supported languages to files in current directory\n"
);
}
@ -97,8 +96,6 @@ bool ProcessArguments(int argc, char* argv[])
Language = spv::ELangCSharp;
} else if (language == "d") {
Language = spv::ELangD;
} else if (language == "beef") {
Language = spv::ELangBeef;
} else
return false;