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<instructionsection id="fmlal_za_zzw" title="FMLAL (multiple vectors)" type="instruction">
  <docvars>
    <docvar key="instr-class" value="mortlach2" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="FMLAL" />
  </docvars>
  <heading>FMLAL (multiple vectors)</heading>
  <desc>
    <brief>Multi-vector floating-point multiply-add long</brief>
    <description>
      <para>The instruction operates on two or four ZA double-vector groups.</para>
      <para>This half-precision floating-point multiply-add long instruction widens all 16-bit half-precision elements in the two or four first and second source vectors to single-precision format, then multiplies the corresponding elements and destructively adds these values without intermediate rounding to the overlapping 32-bit single-precision elements of the two or four ZA double-vector groups. The lowest of the two consecutive vector numbers forming the double-vector group within each half or each quarter of the ZA array are selected by the sum of the vector select register and immediate offset, modulo half or quarter the number of ZA array vectors.</para>
      <para>The <arm-defined-word>vector group</arm-defined-word> symbol, <syntax>VGx2</syntax> or <syntax>VGx4</syntax>, indicates that the ZA operand consists of two or four ZA double-vector groups respectively. The <arm-defined-word>vector group</arm-defined-word> symbol is preferred for disassembly, but optional in assembler source code.</para>
      <para>This instruction follows SME ZA-targeting floating-point behaviors.</para>
      <para>This instruction is unpredicated.</para>
    </description>
    <status>Green</status>
    <predicated>False</predicated>
    <sm_policy>SM_1_only</sm_policy>
  </desc>
  <alias_list howmany="0"></alias_list>
  <classes>
    <classesintro count="2">
      <txt>It has encodings from 2 classes:</txt>
      <a href="#iclass_sme_vgx2_double">Two ZA double-vectors</a>
      <txt> and </txt>
      <a href="#iclass_sme_vgx4_double">Four ZA double-vectors</a>
    </classesintro>
    <iclass name="Two ZA double-vectors" oneof="2" id="iclass_sme_vgx2_double" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="mortlach2" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="FMLAL" />
        <docvar key="sme-multireg" value="sme-vgx2-double" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <arch_variants>
        <arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
      </arch_variants>
      <regdiagram form="32" psname="FMLAL-ZA.ZZW-2x2" tworows="1">
        <box hibit="31" width="11" settings="11">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="20" width="4" name="Zm" usename="1">
          <c colspan="4"></c>
        </box>
        <box hibit="16" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="14" width="2" name="Rv" usename="1">
          <c colspan="2"></c>
        </box>
        <box hibit="12" width="3" settings="3">
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="9" width="4" name="Zn" usename="1">
          <c colspan="4"></c>
        </box>
        <box hibit="5" settings="1">
          <c>0</c>
        </box>
        <box hibit="4" name="op" settings="1">
          <c>0</c>
        </box>
        <box hibit="3" name="S" usename="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="2" settings="1">
          <c>0</c>
        </box>
        <box hibit="1" width="2" name="off2" usename="1">
          <c colspan="2"></c>
        </box>
      </regdiagram>
      <encoding name="fmlal_za_zzw_2x2" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="instr-class" value="mortlach2" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="FMLAL" />
          <docvar key="sme-multireg" value="sme-vgx2-double" />
        </docvars>
        <asmtemplate><text>FMLAL   ZA.S[</text><a link="sa_wv" hover="32-bit vector select register W8-W11 (field &quot;Rv&quot;)">&lt;Wv&gt;</a><text>, </text><a link="sa_offsf" hover="Vector select offset, pointing to first of two consecutive vectors, encoded as &quot;off2&quot; field times 2 (field off2)">&lt;offsf&gt;</a><text>:</text><a link="sa_offsl" hover="Vector select offset, pointing to last of two consecutive vectors, encoded as &quot;off2&quot; field times 2 plus 1 (field off2)">&lt;offsl&gt;</a><a>{, VGx2}</a><text>], </text><text>{</text><text> </text><a link="sa_zn1" hover="First scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn1&gt;</a><text>.H-</text><a link="sa_zn2" hover="Second scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn2&gt;</a><text>.H </text><text>}</text><text>, </text><text>{</text><text> </text><a link="sa_zm1" hover="First scalable vector register of a multi-vector sequence (field Zm)">&lt;Zm1&gt;</a><text>.H-</text><a link="sa_zm2" hover="Second scalable vector register of a multi-vector sequence (field Zm)">&lt;Zm2&gt;</a><text>.H </text><text>}</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="FMLAL-ZA.ZZW-2x2" mylink="FMLAL-ZA.ZZW-2x2" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('010':Rv);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'0');
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm:'0');
integer offset = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(off2:'0');
boolean sub_op = FALSE;
constant integer nreg = 2;</pstext>
        </ps>
      </ps_section>
    </iclass>
    <iclass name="Four ZA double-vectors" oneof="2" id="iclass_sme_vgx4_double" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="mortlach2" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="FMLAL" />
        <docvar key="sme-multireg" value="sme-vgx4-double" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <arch_variants>
        <arch_variant name="FEAT_SME2" feature="FEAT_SME2" />
      </arch_variants>
      <regdiagram form="32" psname="FMLAL-ZA.ZZW-4x4" tworows="1">
        <box hibit="31" width="11" settings="11">
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="20" width="3" name="Zm" usename="1">
          <c colspan="3"></c>
        </box>
        <box hibit="17" width="3" settings="3">
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="14" width="2" name="Rv" usename="1">
          <c colspan="2"></c>
        </box>
        <box hibit="12" width="3" settings="3">
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="9" width="3" name="Zn" usename="1">
          <c colspan="3"></c>
        </box>
        <box hibit="6" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="4" name="op" settings="1">
          <c>0</c>
        </box>
        <box hibit="3" name="S" usename="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="2" settings="1">
          <c>0</c>
        </box>
        <box hibit="1" width="2" name="off2" usename="1">
          <c colspan="2"></c>
        </box>
      </regdiagram>
      <encoding name="fmlal_za_zzw_4x4" oneofinclass="1" oneof="2" label="">
        <docvars>
          <docvar key="instr-class" value="mortlach2" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="FMLAL" />
          <docvar key="sme-multireg" value="sme-vgx4-double" />
        </docvars>
        <asmtemplate><text>FMLAL   ZA.S[</text><a link="sa_wv" hover="32-bit vector select register W8-W11 (field &quot;Rv&quot;)">&lt;Wv&gt;</a><text>, </text><a link="sa_offsf" hover="Vector select offset, pointing to first of two consecutive vectors, encoded as &quot;off2&quot; field times 2 (field off2)">&lt;offsf&gt;</a><text>:</text><a link="sa_offsl" hover="Vector select offset, pointing to last of two consecutive vectors, encoded as &quot;off2&quot; field times 2 plus 1 (field off2)">&lt;offsl&gt;</a><a>{, VGx4}</a><text>], </text><text>{</text><text> </text><a link="sa_zn1_1" hover="First scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn1&gt;</a><text>.H-</text><a link="sa_zn4" hover="Fourth scalable vector register of a multi-vector sequence (field Zn)">&lt;Zn4&gt;</a><text>.H </text><text>}</text><text>, </text><text>{</text><text> </text><a link="sa_zm1_1" hover="First scalable vector register of a multi-vector sequence (field Zm)">&lt;Zm1&gt;</a><text>.H-</text><a link="sa_zm4" hover="Fourth scalable vector register of a multi-vector sequence (field Zm)">&lt;Zm4&gt;</a><text>.H </text><text>}</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="FMLAL-ZA.ZZW-4x4" mylink="FMLAL-ZA.ZZW-4x4" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() then UNDEFINED;
integer v = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('010':Rv);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn:'00');
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm:'00');
integer offset = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(off2:'0');
boolean sub_op = FALSE;
constant integer nreg = 4;</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="fmlal_za_zzw_2x2, fmlal_za_zzw_4x4" symboldefcount="1">
      <symbol link="sa_wv">&lt;Wv&gt;</symbol>
      <account encodedin="Rv">
        <intro>
          <para>Is the 32-bit name of the vector select register W8-W11, encoded in the "Rv" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_2x2, fmlal_za_zzw_4x4" symboldefcount="1">
      <symbol link="sa_offsf">&lt;offsf&gt;</symbol>
      <account encodedin="off2">
        <intro>
          <para>Is the vector select offset, pointing to first of two consecutive vectors, encoded as "off2" field times 2.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_2x2, fmlal_za_zzw_4x4" symboldefcount="1">
      <symbol link="sa_offsl">&lt;offsl&gt;</symbol>
      <account encodedin="off2">
        <intro>
          <para>Is the vector select offset, pointing to last of two consecutive vectors, encoded as "off2" field times 2 plus 1.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_2x2" symboldefcount="1">
      <symbol link="sa_zn1">&lt;Zn1&gt;</symbol>
      <account encodedin="Zn">
        <docvars>
          <docvar key="sme-multireg" value="sme-vgx2-double" />
        </docvars>
        <intro>
          <para>For the two ZA double-vectors variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 2.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_4x4" symboldefcount="2">
      <symbol link="sa_zn1_1">&lt;Zn1&gt;</symbol>
      <account encodedin="Zn">
        <docvars>
          <docvar key="sme-multireg" value="sme-vgx4-double" />
        </docvars>
        <intro>
          <para>For the four ZA double-vectors variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zn" times 4.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_4x4" symboldefcount="1">
      <symbol link="sa_zn4">&lt;Zn4&gt;</symbol>
      <account encodedin="Zn">
        <intro>
          <para>Is the name of the fourth scalable vector register of a multi-vector sequence, encoded as "Zn" times 4 plus 3.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_2x2" symboldefcount="1">
      <symbol link="sa_zn2">&lt;Zn2&gt;</symbol>
      <account encodedin="Zn">
        <intro>
          <para>Is the name of the second scalable vector register of a multi-vector sequence, encoded as "Zn" times 2 plus 1.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_2x2" symboldefcount="1">
      <symbol link="sa_zm1">&lt;Zm1&gt;</symbol>
      <account encodedin="Zm">
        <docvars>
          <docvar key="sme-multireg" value="sme-vgx2-double" />
        </docvars>
        <intro>
          <para>For the two ZA double-vectors variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zm" times 2.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_4x4" symboldefcount="2">
      <symbol link="sa_zm1_1">&lt;Zm1&gt;</symbol>
      <account encodedin="Zm">
        <docvars>
          <docvar key="sme-multireg" value="sme-vgx4-double" />
        </docvars>
        <intro>
          <para>For the four ZA double-vectors variant: is the name of the first scalable vector register of a multi-vector sequence, encoded as "Zm" times 4.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_4x4" symboldefcount="1">
      <symbol link="sa_zm4">&lt;Zm4&gt;</symbol>
      <account encodedin="Zm">
        <intro>
          <para>Is the name of the fourth scalable vector register of a multi-vector sequence, encoded as "Zm" times 4 plus 3.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="fmlal_za_zzw_2x2" symboldefcount="1">
      <symbol link="sa_zm2">&lt;Zm2&gt;</symbol>
      <account encodedin="Zm">
        <intro>
          <para>Is the name of the second scalable vector register of a multi-vector sequence, encoded as "Zm" times 2 plus 1.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="FMLAL-ZA.ZZW-2x2" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckStreamingSVEAndZAEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEAndZAEnabled()">CheckStreamingSVEAndZAEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer elements = VL DIV 32;
integer vectors = VL DIV 8;
integer vstride = vectors DIV nreg;
bits(32) vbase = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[v, 32];
integer vec = (<a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(vbase) + offset) MOD vstride;
bits(VL) result;
vec = vec - (vec MOD 2);

for r = 0 to nreg-1
    bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n+r, VL];
    bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m+r, VL];
    for i = 0 to 1
        bits(VL) operand3 = <a link="impl-aarch64.ZAvector.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) ZAvector[integer index, integer width]">ZAvector</a>[vec + i, VL];
        for e = 0 to elements-1
            bits(16) element1 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, 2 * e + i, 16];
            bits(16) element2 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, 2 * e + i, 16];
            bits(32) element3 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand3, e, 32];
            if sub_op then element1 = <a link="impl-shared.FPNeg.1" file="shared_pseudocode.xml" hover="function: bits(N) FPNeg(bits(N) op)">FPNeg</a>(element1);
            <a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, 32] = <a link="impl-shared.FPMulAddH_ZA.4" file="shared_pseudocode.xml" hover="function: bits(N) FPMulAddH_ZA(bits(N) addend, bits(N DIV 2) op1, bits(N DIV 2) op2, FPCRType fpcr_in)">FPMulAddH_ZA</a>(element3, element1, element2, FPCR[]);
        <a link="impl-aarch64.ZAvector.write.2" file="shared_pseudocode.xml" hover="accessor: ZAvector[integer index, integer width] = bits(width) value">ZAvector</a>[vec + i, VL] = result;
    vec = vec + vstride;</pstext>
    </ps>
  </ps_section>
</instructionsection>
