<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->

<instructionsection id="whilegt_pn_rr" title="WHILEGT (predicate as counter)" type="instruction">
  <docvars>
    <docvar key="instr-class" value="sve2" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="WHILEGT" />
    <docvar key="sve-elem-type" value="8-64-elem" />
  </docvars>
  <heading>WHILEGT (predicate as counter)</heading>
  <desc>
    <brief>While decrementing signed scalar greater than scalar (predicate-as-counter)</brief>
    <description>
      <para>Generate a predicate for a group of two or four vectors that starting from the highest numbered element of the group is true while the decrementing value of the first, signed scalar operand is greater than the second scalar operand and false thereafter down to the lowest numbered element of the group.</para>
      <para />
      <para>The full width of the scalar operands is significant for the purposes of comparison, and the full width first operand is decremented by one for each destination predicate element, irrespective of the predicate result element size.</para>
      <para>The predicate result is placed in the predicate destination register using the predicate-as-counter encoding. Sets the <arm-defined-word>First</arm-defined-word> (N), <arm-defined-word>None</arm-defined-word> (Z), <arm-defined-word>!Last</arm-defined-word> (C) condition flags based on the predicate result, and the V flag to zero.</para>
    </description>
    <status>Green</status>
    <predicated>False</predicated>
    <uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
  </desc>
  <alias_list howmany="0"></alias_list>
  <classes>
    <iclass name="SVE2" oneof="1" id="iclass_sve2" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve2" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="WHILEGT" />
        <docvar key="sve-elem-type" value="8-64-elem" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <arch_variants>
        <arch_variant name="FEAT_SVE2p1" feature="FEAT_SVE2p1" />
      </arch_variants>
      <regdiagram form="32" psname="WHILEGT-PN.RR-_" tworows="1">
        <box hibit="31" width="8" settings="8">
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="23" width="2" name="size" usename="1">
          <c colspan="2"></c>
        </box>
        <box hibit="21" settings="1">
          <c>1</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="15" width="2" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="13" name="vl" usename="1">
          <c></c>
        </box>
        <box hibit="12" settings="1">
          <c>0</c>
        </box>
        <box hibit="11" name="U" usename="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="10" name="lt" usename="1" settings="1">
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="4" settings="1">
          <c>1</c>
        </box>
        <box hibit="3" name="eq" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="2" width="3" name="PNd" usename="1">
          <c colspan="3"></c>
        </box>
      </regdiagram>
      <encoding name="whilegt_pn_rr_" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="sve2" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="WHILEGT" />
          <docvar key="sve-elem-type" value="8-64-elem" />
        </docvars>
        <asmtemplate><text>WHILEGT </text><a link="sa_pnd" hover="Destination scalable predicate register PN8-PN15 (field &quot;PNd&quot;)">&lt;PNd&gt;</a><text>.</text><a link="sa_t" hover="Size specifier (field &quot;size&quot;) [B,D,H,S]">&lt;T&gt;</a><text>, </text><a link="sa_xn" hover="First 64-bit source general-purpose register (field &quot;Rn&quot;)">&lt;Xn&gt;</a><text>, </text><a link="sa_xm" hover="Second 64-bit source general-purpose register (field &quot;Rm&quot;)">&lt;Xm&gt;</a><text>, </text><a link="sa_vl" hover="Vl specifier (field &quot;vl&quot;) [VLx2,VLx4]">&lt;vl&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="WHILEGT-PN.RR-_" mylink="WHILEGT-PN.RR-_" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSME2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME2()">HaveSME2</a>() &amp;&amp; !<a link="impl-aarch64.HaveSVE2p1.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2p1()">HaveSVE2p1</a>() then UNDEFINED;
constant integer esize = 8 &lt;&lt; <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
constant integer rsize = 64;
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>('1':PNd);
boolean unsigned = FALSE;
boolean invert = TRUE;
<a link="SVECmp" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">SVECmp</a> op = <a link="Cmp_GT" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_GT</a>;
integer width = 2 &lt;&lt; <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(vl);</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="whilegt_pn_rr_" symboldefcount="1">
      <symbol link="sa_pnd">&lt;PNd&gt;</symbol>
      <account encodedin="PNd">
        <intro>
          <para>Is the name of the destination scalable predicate register PN8-PN15, with predicate-as-counter encoding, encoded in the "PNd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="whilegt_pn_rr_" symboldefcount="1">
      <symbol link="sa_t">&lt;T&gt;</symbol>
      <definition encodedin="size">
        <intro>Is the size specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">size</entry>
                <entry class="symbol">&lt;T&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">00</entry>
                <entry class="symbol">B</entry>
              </row>
              <row>
                <entry class="bitfield">01</entry>
                <entry class="symbol">H</entry>
              </row>
              <row>
                <entry class="bitfield">10</entry>
                <entry class="symbol">S</entry>
              </row>
              <row>
                <entry class="bitfield">11</entry>
                <entry class="symbol">D</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="whilegt_pn_rr_" symboldefcount="1">
      <symbol link="sa_xn">&lt;Xn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the first source general-purpose register, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="whilegt_pn_rr_" symboldefcount="1">
      <symbol link="sa_xm">&lt;Xm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the 64-bit name of the second source general-purpose register, encoded in the "Rm" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="whilegt_pn_rr_" symboldefcount="1">
      <symbol link="sa_vl">&lt;vl&gt;</symbol>
      <definition encodedin="vl">
        <intro>Is the vl specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">vl</entry>
                <entry class="symbol">&lt;vl&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">0</entry>
                <entry class="symbol">VLx2</entry>
              </row>
              <row>
                <entry class="bitfield">1</entry>
                <entry class="symbol">VLx4</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="WHILEGT-PN.RR-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">if <a link="impl-aarch64.HaveSVE2p1.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2p1()">HaveSVE2p1</a>() then <a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>(); else <a link="impl-aarch64.CheckStreamingSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckStreamingSVEEnabled()">CheckStreamingSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
constant integer elements = width * (VL DIV esize);
bits(rsize) operand1 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, rsize];
bits(rsize) operand2 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, rsize];
bits(PL) result;
boolean last = TRUE;
integer count = 0;

for e = elements-1 downto 0
    boolean cond;
    case op of
        when <a link="Cmp_GT" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_GT</a> cond = (<a link="impl-shared.Int.2" file="shared_pseudocode.xml" hover="function: integer Int(bits(N) x, boolean unsigned)">Int</a>(operand1, unsigned) &gt;  <a link="impl-shared.Int.2" file="shared_pseudocode.xml" hover="function: integer Int(bits(N) x, boolean unsigned)">Int</a>(operand2, unsigned));
        when <a link="Cmp_GE" file="shared_pseudocode.xml" hover="enumeration SVECmp { Cmp_EQ, Cmp_NE, Cmp_GE, Cmp_GT, Cmp_LT, Cmp_LE, Cmp_UN }">Cmp_GE</a> cond = (<a link="impl-shared.Int.2" file="shared_pseudocode.xml" hover="function: integer Int(bits(N) x, boolean unsigned)">Int</a>(operand1, unsigned) &gt;= <a link="impl-shared.Int.2" file="shared_pseudocode.xml" hover="function: integer Int(bits(N) x, boolean unsigned)">Int</a>(operand2, unsigned));

    last = last &amp;&amp; cond;
    if last then count = count + 1;
    operand1 = operand1 - 1;

result = <a link="impl-aarch64.EncodePredCount.5" file="shared_pseudocode.xml" hover="function: bits(width) EncodePredCount(integer esize, integer elements, integer count_in, boolean invert_in, integer width)">EncodePredCount</a>(esize, elements, count, invert, PL);
PSTATE.&lt;N,Z,C,V&gt; = <a link="impl-aarch64.PredCountTest.3" file="shared_pseudocode.xml" hover="function: bits(4) PredCountTest(integer elements, integer count, boolean invert)">PredCountTest</a>(elements, count, invert);
<a link="impl-aarch64.P.write.2" file="shared_pseudocode.xml" hover="accessor: P[integer n, integer width] = bits(width) value">P</a>[d, PL] = result;</pstext>
    </ps>
  </ps_section>
</instructionsection>
