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<instructionsection id="prfd_i_p_br" title="PRFD (scalar plus scalar)" type="instruction">
  <docvars>
    <docvar key="instr-class" value="sve" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="PRFD" />
    <docvar key="sve-esize" value="esize-doubleword" />
  </docvars>
  <heading>PRFD (scalar plus scalar)</heading>
  <desc>
    <brief>Contiguous prefetch doublewords (scalar index)</brief>
    <description>
      <para>Contiguous prefetch of doubleword elements from the memory address generated by a 64-bit scalar base and scalar index which is multiplied by 8 and added to the base address. After each element prefetch the index value is incremented, but the index register is not updated.</para>
      <para>The predicate may be used to suppress prefetches from unwanted addresses.</para>
    </description>
    <status>Green</status>
    <predicated>True</predicated>
  </desc>
  <alias_list howmany="0"></alias_list>
  <classes>
    <iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="PRFD" />
        <docvar key="sve-esize" value="esize-doubleword" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="PRFD-I.P.BR-S" tworows="1">
        <box hibit="31" width="7" settings="7">
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="24" name="msz&lt;1&gt;" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="23" name="msz&lt;0&gt;" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="22" width="2" settings="2">
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="20" width="5" name="Rm" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="15" width="3" settings="3">
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="12" width="3" name="Pg" usename="1">
          <c colspan="3"></c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="4" settings="1">
          <c>0</c>
        </box>
        <box hibit="3" width="4" name="prfop" usename="1">
          <c colspan="4"></c>
        </box>
      </regdiagram>
      <encoding name="prfd_i_p_br_s" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="sve" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="PRFD" />
          <docvar key="sve-esize" value="esize-doubleword" />
        </docvars>
        <asmtemplate><text>PRFD    </text><a link="sa_prfop" hover="Prefetch operation specifier (field &quot;prfop&quot;) [#uimm4,PLDL1KEEP,PLDL1STRM,PLDL2KEEP,PLDL2STRM,PLDL3KEEP,PLDL3STRM,PSTL1KEEP,PSTL1STRM,PSTL2KEEP,PSTL2STRM,PSTL3KEEP,PSTL3STRM]">&lt;prfop&gt;</a><text>, </text><a link="sa_pg" hover="Governing scalable predicate register P0-P7 (field &quot;Pg&quot;)">&lt;Pg&gt;</a><text>, [</text><a link="sa_xn_sp" hover="64-bit general-purpose base register or SP (field &quot;Rn&quot;)">&lt;Xn|SP&gt;</a><text>, </text><a link="sa_xm" hover="64-bit general-purpose offset register (field &quot;Rm&quot;)">&lt;Xm&gt;</a><text>, LSL #3]</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="PRFD-I.P.BR-S" mylink="PRFD-I.P.BR-S" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() &amp;&amp; !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
if Rm == '11111' then UNDEFINED;
constant integer esize = 64;
integer g = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pg);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rn);
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rm);
integer level = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(prfop&lt;2:1&gt;);
boolean stream = (prfop&lt;0&gt; == '1');
pref_hint = if prfop&lt;3&gt; == '0' then <a link="Prefetch_READ" file="shared_pseudocode.xml" hover="enumeration PrefetchHint {Prefetch_READ, Prefetch_WRITE, Prefetch_EXEC}">Prefetch_READ</a> else <a link="Prefetch_WRITE" file="shared_pseudocode.xml" hover="enumeration PrefetchHint {Prefetch_READ, Prefetch_WRITE, Prefetch_EXEC}">Prefetch_WRITE</a>;
integer scale = 3;</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="prfd_i_p_br_s" symboldefcount="1">
      <symbol link="sa_prfop">&lt;prfop&gt;</symbol>
      <definition encodedin="prfop">
        <intro>Is the prefetch operation specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">prfop</entry>
                <entry class="symbol">&lt;prfop&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">0000</entry>
                <entry class="symbol">PLDL1KEEP</entry>
              </row>
              <row>
                <entry class="bitfield">0001</entry>
                <entry class="symbol">PLDL1STRM</entry>
              </row>
              <row>
                <entry class="bitfield">0010</entry>
                <entry class="symbol">PLDL2KEEP</entry>
              </row>
              <row>
                <entry class="bitfield">0011</entry>
                <entry class="symbol">PLDL2STRM</entry>
              </row>
              <row>
                <entry class="bitfield">0100</entry>
                <entry class="symbol">PLDL3KEEP</entry>
              </row>
              <row>
                <entry class="bitfield">0101</entry>
                <entry class="symbol">PLDL3STRM</entry>
              </row>
              <row>
                <entry class="bitfield">x11x</entry>
                <entry class="symbol">#uimm4</entry>
              </row>
              <row>
                <entry class="bitfield">1000</entry>
                <entry class="symbol">PSTL1KEEP</entry>
              </row>
              <row>
                <entry class="bitfield">1001</entry>
                <entry class="symbol">PSTL1STRM</entry>
              </row>
              <row>
                <entry class="bitfield">1010</entry>
                <entry class="symbol">PSTL2KEEP</entry>
              </row>
              <row>
                <entry class="bitfield">1011</entry>
                <entry class="symbol">PSTL2STRM</entry>
              </row>
              <row>
                <entry class="bitfield">1100</entry>
                <entry class="symbol">PSTL3KEEP</entry>
              </row>
              <row>
                <entry class="bitfield">1101</entry>
                <entry class="symbol">PSTL3STRM</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="prfd_i_p_br_s" symboldefcount="1">
      <symbol link="sa_pg">&lt;Pg&gt;</symbol>
      <account encodedin="Pg">
        <intro>
          <para>Is the name of the governing scalable predicate register P0-P7, encoded in the "Pg" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="prfd_i_p_br_s" symboldefcount="1">
      <symbol link="sa_xn_sp">&lt;Xn|SP&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="prfd_i_p_br_s" symboldefcount="1">
      <symbol link="sa_xm">&lt;Xm&gt;</symbol>
      <account encodedin="Rm">
        <intro>
          <para>Is the 64-bit name of the general-purpose offset register, encoded in the "Rm" field.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="PRFD-I.P.BR-S" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[g, PL];
bits(64) base;
bits(64) offset;

if <a link="impl-aarch64.AnyActiveElement.2" file="shared_pseudocode.xml" hover="function: boolean AnyActiveElement(bits(N) mask, integer esize)">AnyActiveElement</a>(mask, esize) then
    base = if n == 31 then <a link="impl-aarch64.SP.read.0" file="shared_pseudocode.xml" hover="accessor: bits(64) SP[]">SP</a>[] else <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[n, 64];
    offset = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[m, 64];

for e = 0 to elements-1
    if <a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(mask, e, esize) then
        integer eoff = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(offset) + e;
        bits(64) addr = base + (eoff &lt;&lt; scale);
        <a link="impl-shared.Hint_Prefetch.4" file="shared_pseudocode.xml" hover="function: Hint_Prefetch(bits(64) address, PrefetchHint hint, integer target, boolean stream)">Hint_Prefetch</a>(addr, pref_hint, level, stream);</pstext>
    </ps>
  </ps_section>
</instructionsection>
