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<instructionsection id="sri_z_zzi" title="SRI" type="instruction">
  <docvars>
    <docvar key="instr-class" value="sve2" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="SRI" />
  </docvars>
  <heading>SRI</heading>
  <desc>
    <brief>Shift right and insert (immediate)</brief>
    <description>
      <para>Shift each source vector element right by an immediate value, and insert the result into the corresponding vector element in the destination vector register, merging the shifted bits from each source element with existing bits in each destination vector element. The immediate shift amount is an unsigned value in the range 1 to number of bits per element. This instruction is unpredicated.</para>
    </description>
    <status>Green</status>
    <predicated>False</predicated>
    <uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
  </desc>
  <alias_list howmany="0"></alias_list>
  <classes>
    <iclass name="SVE2" oneof="1" id="iclass_sve2" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve2" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="SRI" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="SRI-Z.ZZI-_">
        <box hibit="31" width="8" settings="8">
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="23" width="2" name="tszh" usename="1">
          <c colspan="2"></c>
        </box>
        <box hibit="21" settings="1">
          <c>0</c>
        </box>
        <box hibit="20" width="2" name="tszl" usename="1">
          <c colspan="2"></c>
        </box>
        <box hibit="18" width="3" name="imm3" usename="1">
          <c colspan="3"></c>
        </box>
        <box hibit="15" width="5" settings="5">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="10" name="op" settings="1">
          <c>0</c>
        </box>
        <box hibit="9" width="5" name="Zn" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="4" width="5" name="Zd" usename="1">
          <c colspan="5"></c>
        </box>
      </regdiagram>
      <encoding name="sri_z_zzi_" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="sve2" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="SRI" />
        </docvars>
        <asmtemplate><text>SRI     </text><a link="sa_zd" hover="Destination scalable vector register (field &quot;Zd&quot;)">&lt;Zd&gt;</a><text>.</text><a link="sa_t" hover="Size specifier (field &quot;tszh:tszl&quot;) [B,D,H,S]">&lt;T&gt;</a><text>, </text><a link="sa_zn" hover="First source scalable vector register (field &quot;Zn&quot;)">&lt;Zn&gt;</a><text>.</text><a link="sa_t" hover="Size specifier (field &quot;tszh:tszl&quot;) [B,D,H,S]">&lt;T&gt;</a><text>, #</text><a link="sa_const" hover="Immediate shift amount [1-number of bits per element] (field &quot;tszh:tszl:imm3&quot;)">&lt;const&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="SRI-Z.ZZI-_" mylink="SRI-Z.ZZI-_" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE2.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE2()">HaveSVE2</a>() &amp;&amp; !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
bits(4) tsize = tszh:tszl;
integer esize;
case tsize of
    when '0000' UNDEFINED;
    when '0001' esize = 8;
    when '001x' esize = 16;
    when '01xx' esize = 32;
    when '1xxx' esize = 64;
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);
constant integer shift = (2 * esize) - <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(tsize:imm3);</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="sri_z_zzi_" symboldefcount="1">
      <symbol link="sa_zd">&lt;Zd&gt;</symbol>
      <account encodedin="Zd">
        <intro>
          <para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="sri_z_zzi_" symboldefcount="1">
      <symbol link="sa_t">&lt;T&gt;</symbol>
      <definition encodedin="tszh:tszl">
        <intro>Is the size specifier, </intro>
        <table class="valuetable">
          <tgroup cols="3">
            <thead>
              <row>
                <entry class="bitfield">tszh</entry>
                <entry class="bitfield">tszl</entry>
                <entry class="symbol">&lt;T&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">00</entry>
                <entry class="bitfield">00</entry>
                <entry class="symbol">RESERVED</entry>
              </row>
              <row>
                <entry class="bitfield">00</entry>
                <entry class="bitfield">01</entry>
                <entry class="symbol">B</entry>
              </row>
              <row>
                <entry class="bitfield">00</entry>
                <entry class="bitfield">1x</entry>
                <entry class="symbol">H</entry>
              </row>
              <row>
                <entry class="bitfield">01</entry>
                <entry class="bitfield">xx</entry>
                <entry class="symbol">S</entry>
              </row>
              <row>
                <entry class="bitfield">1x</entry>
                <entry class="bitfield">xx</entry>
                <entry class="symbol">D</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="sri_z_zzi_" symboldefcount="1">
      <symbol link="sa_zn">&lt;Zn&gt;</symbol>
      <account encodedin="Zn">
        <intro>
          <para>Is the name of the first source scalable vector register, encoded in the "Zn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="sri_z_zzi_" symboldefcount="1">
      <symbol link="sa_const">&lt;const&gt;</symbol>
      <account encodedin="imm3:tszh:tszl">
        <intro>
          <para>Is the immediate shift amount, in the range 1 to number of bits per element, encoded in "tszh:tszl:imm3".</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="SRI-Z.ZZI-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(VL) operand = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
bits(VL) result = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[d, VL];

for e = 0 to elements-1
    bits(esize) element1 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[result, e, esize];
    bits(esize) element2 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand, e, esize];
    bits(esize) mask = <a link="impl-shared.LSR.2" file="shared_pseudocode.xml" hover="function: bits(N) LSR(bits(N) x, integer shift)">LSR</a>(<a link="impl-shared.Ones.1" file="shared_pseudocode.xml" hover="function: bits(N) Ones(integer N)">Ones</a>(esize), shift);
    bits(esize) shiftedval = <a link="impl-shared.LSR.2" file="shared_pseudocode.xml" hover="function: bits(N) LSR(bits(N) x, integer shift)">LSR</a>(element2, shift);
    <a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = (element1 AND (NOT mask)) OR shiftedval;

<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
    </ps>
  </ps_section>
</instructionsection>
