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<instructionsection id="MOV_DUP_advsimd_elt" title="MOV (scalar) -- A64" type="alias">
  <docvars>
    <docvar key="alias_mnemonic" value="MOV" />
    <docvar key="instr-class" value="advsimd" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="DUP" />
    <docvar key="vector-xfer-type" value="scalar-from-element" />
  </docvars>
  <heading>MOV (scalar)</heading>
  <desc>
    <brief>
      <para>Move vector element to scalar</para>
    </brief>
    <authored>
      <para>Move vector element to scalar. This instruction duplicates the specified vector element in the SIMD&amp;FP source register into a scalar, and writes the result to the SIMD&amp;FP destination register.</para>
      <para>Depending on the settings in the <xref linkend="AArch64.cpacr_el1">CPACR_EL1</xref>, <xref linkend="AArch64.cptr_el2">CPTR_EL2</xref>, and <xref linkend="AArch64.cptr_el3">CPTR_EL3</xref> registers, and the current Security state and Exception level, an attempt to execute the instruction might be trapped.</para>
    </authored>
  </desc>
  <operationalnotes>
    <para>If PSTATE.DIT is 1:</para>
    <list type="unordered">
      <listitem><content>The execution time of this instruction is independent of:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
      <listitem><content>The response of this instruction to asynchronous exceptions does not vary based on:<list type="unordered"><listitem><content>The values of the data supplied in any of its registers.</content></listitem><listitem><content>The values of the NZCV flags.</content></listitem></list></content></listitem>
    </list>
  </operationalnotes>
  <aliasto refiform="dup_advsimd_elt.xml" iformid="DUP_advsimd_elt">DUP (element)</aliasto>
  <classes>
    <iclass name="Scalar" oneof="1" id="iclass_scalar_from_element" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="advsimd" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="DUP" />
        <docvar key="vector-xfer-type" value="scalar-from-element" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="aarch64/instrs/vector/transfer/vector/cpy-dup/sisd">
        <box hibit="31" width="2" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="29" name="op" settings="1">
          <c>0</c>
        </box>
        <box hibit="28" width="8" settings="8">
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="20" width="5" name="imm5" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="15" settings="1">
          <c>0</c>
        </box>
        <box hibit="14" width="4" name="imm4" settings="4">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
        </box>
        <box hibit="10" settings="1">
          <c>1</c>
        </box>
        <box hibit="9" width="5" name="Rn" usename="1">
          <c colspan="5"></c>
        </box>
        <box hibit="4" width="5" name="Rd" usename="1">
          <c colspan="5"></c>
        </box>
      </regdiagram>
      <encoding name="MOV_DUP_asisdone_only" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="alias_mnemonic" value="MOV" />
          <docvar key="instr-class" value="advsimd" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="DUP" />
          <docvar key="vector-xfer-type" value="scalar-from-element" />
        </docvars>
        <asmtemplate><text>MOV  </text><a link="sa_v" hover="Destination width specifier (field &quot;imm5&quot;) [B,D,H,S]">&lt;V&gt;</a><a link="sa_d" hover="SIMD&amp;FP destination register number (field &quot;Rd&quot;)">&lt;d&gt;</a><text>, </text><a link="sa_vn" hover="SIMD&amp;FP source register (field &quot;Rn&quot;)">&lt;Vn&gt;</a><text>.</text><a link="sa_t_1" hover="Element width specifier (field &quot;imm5&quot;) [B,D,H,S]">&lt;T&gt;</a><text>[</text><a link="sa_index" hover="Element index (field &quot;imm5&quot;)">&lt;index&gt;</a><text>]</text></asmtemplate>
        <equivalent_to>
          <asmtemplate><a href="dup_advsimd_elt.xml#DUP_asisdone_only">DUP</a><text>  </text><a link="sa_v" hover="Destination width specifier (field &quot;imm5&quot;) [B,D,H,S]">&lt;V&gt;</a><a link="sa_d" hover="SIMD&amp;FP destination register number (field &quot;Rd&quot;)">&lt;d&gt;</a><text>, </text><a link="sa_vn" hover="SIMD&amp;FP source register (field &quot;Rn&quot;)">&lt;Vn&gt;</a><text>.</text><a link="sa_t_1" hover="Element width specifier (field &quot;imm5&quot;) [B,D,H,S]">&lt;T&gt;</a><text>[</text><a link="sa_index" hover="Element index (field &quot;imm5&quot;)">&lt;index&gt;</a><text>]</text></asmtemplate>
          <aliascond>Unconditionally</aliascond>
        </equivalent_to>
      </encoding>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="MOV_DUP_asisdone_only" symboldefcount="1">
      <symbol link="sa_v">&lt;V&gt;</symbol>
      <definition encodedin="imm5">
        <intro>Is the destination width specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">imm5</entry>
                <entry class="symbol">&lt;V&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">x0000</entry>
                <entry class="symbol">RESERVED</entry>
              </row>
              <row>
                <entry class="bitfield">xxxx1</entry>
                <entry class="symbol">B</entry>
              </row>
              <row>
                <entry class="bitfield">xxx10</entry>
                <entry class="symbol">H</entry>
              </row>
              <row>
                <entry class="bitfield">xx100</entry>
                <entry class="symbol">S</entry>
              </row>
              <row>
                <entry class="bitfield">x1000</entry>
                <entry class="symbol">D</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="MOV_DUP_asisdone_only" symboldefcount="1">
      <symbol link="sa_d">&lt;d&gt;</symbol>
      <account encodedin="Rd">
        <intro>
          <para>Is the number of the SIMD&amp;FP destination register, encoded in the "Rd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MOV_DUP_asisdone_only" symboldefcount="1">
      <symbol link="sa_vn">&lt;Vn&gt;</symbol>
      <account encodedin="Rn">
        <intro>
          <para>Is the name of the SIMD&amp;FP source register, encoded in the "Rn" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="MOV_DUP_asisdone_only" symboldefcount="1">
      <symbol link="sa_t_1">&lt;T&gt;</symbol>
      <definition encodedin="imm5">
        <intro>Is the element width specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">imm5</entry>
                <entry class="symbol">&lt;T&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">x0000</entry>
                <entry class="symbol">RESERVED</entry>
              </row>
              <row>
                <entry class="bitfield">xxxx1</entry>
                <entry class="symbol">B</entry>
              </row>
              <row>
                <entry class="bitfield">xxx10</entry>
                <entry class="symbol">H</entry>
              </row>
              <row>
                <entry class="bitfield">xx100</entry>
                <entry class="symbol">S</entry>
              </row>
              <row>
                <entry class="bitfield">x1000</entry>
                <entry class="symbol">D</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="MOV_DUP_asisdone_only" symboldefcount="1">
      <symbol link="sa_index">&lt;index&gt;</symbol>
      <definition encodedin="imm5">
        <intro>Is the element index </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">imm5</entry>
                <entry class="symbol">&lt;index&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">x0000</entry>
                <entry class="symbol">RESERVED</entry>
              </row>
              <row>
                <entry class="bitfield">xxxx1</entry>
                <entry class="symbol">imm5&lt;4:1&gt;</entry>
              </row>
              <row>
                <entry class="bitfield">xxx10</entry>
                <entry class="symbol">imm5&lt;4:2&gt;</entry>
              </row>
              <row>
                <entry class="bitfield">xx100</entry>
                <entry class="symbol">imm5&lt;4:3&gt;</entry>
              </row>
              <row>
                <entry class="bitfield">x1000</entry>
                <entry class="symbol">imm5&lt;4&gt;</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
  </explanations>
</instructionsection>
