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<instructionsection id="CBZ" title="CBZ -- A64" type="instruction">
  <docvars>
    <docvar key="branch-offset" value="br19" />
    <docvar key="compare-with" value="cmp-zero" />
    <docvar key="instr-class" value="general" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="CBZ" />
  </docvars>
  <heading>CBZ</heading>
  <desc>
    <brief>
      <para>Compare and Branch on Zero</para>
    </brief>
    <authored>
      <para>Compare and Branch on Zero compares the value in a register with zero, and conditionally branches to a label at a PC-relative offset if the comparison is equal. It provides a hint that this is not a subroutine call or return. This instruction does not affect condition flags.</para>
    </authored>
  </desc>
  <alias_list howmany="0"></alias_list>
  <classes>
    <iclass name="19-bit signed PC-relative branch offset" oneof="1" id="iclass_br19" no_encodings="2" isa="A64">
      <docvars>
        <docvar key="branch-offset" value="br19" />
        <docvar key="compare-with" value="cmp-zero" />
        <docvar key="instr-class" value="general" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="CBZ" />
      </docvars>
      <iclassintro count="2"></iclassintro>
      <regdiagram form="32" psname="aarch64/instrs/branch/conditional/compare" tworows="1">
        <box hibit="31" name="sf" usename="1">
          <c></c>
        </box>
        <box hibit="30" width="6" settings="6">
          <c>0</c>
          <c>1</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
        </box>
        <box hibit="24" name="op" usename="1" settings="1" psbits="x">
          <c>0</c>
        </box>
        <box hibit="23" width="19" name="imm19" usename="1">
          <c colspan="19"></c>
        </box>
        <box hibit="4" width="5" name="Rt" usename="1">
          <c colspan="5"></c>
        </box>
      </regdiagram>
      <encoding name="CBZ_32_compbranch" oneofinclass="2" oneof="2" label="32-bit" bitdiffs="sf == 0">
        <docvars>
          <docvar key="branch-offset" value="br19" />
          <docvar key="compare-with" value="cmp-zero" />
          <docvar key="datatype" value="32" />
          <docvar key="instr-class" value="general" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="CBZ" />
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>0</c>
        </box>
        <asmtemplate><text>CBZ  </text><a link="sa_wt" hover="32-bit general-purpose register to be tested (field &quot;Rt&quot;)">&lt;Wt&gt;</a><text>, </text><a link="sa_label" hover="Label to be conditionally branched to (field imm19)">&lt;label&gt;</a></asmtemplate>
      </encoding>
      <encoding name="CBZ_64_compbranch" oneofinclass="2" oneof="2" label="64-bit" bitdiffs="sf == 1">
        <docvars>
          <docvar key="branch-offset" value="br19" />
          <docvar key="compare-with" value="cmp-zero" />
          <docvar key="datatype" value="64" />
          <docvar key="instr-class" value="general" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="CBZ" />
        </docvars>
        <box hibit="31" width="1" name="sf">
          <c>1</c>
        </box>
        <asmtemplate><text>CBZ  </text><a link="sa_xt" hover="64-bit general-purpose register to be tested (field &quot;Rt&quot;)">&lt;Xt&gt;</a><text>, </text><a link="sa_label" hover="Label to be conditionally branched to (field imm19)">&lt;label&gt;</a></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="aarch64/instrs/branch/conditional/compare" mylink="aarch64.instrs.branch.conditional.compare" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">integer t = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Rt);
integer datasize = if sf == '1' then 64 else 32;
boolean iszero = (op == '0');
bits(64) offset = <a link="impl-shared.SignExtend.2" file="shared_pseudocode.xml" hover="function: bits(N) SignExtend(bits(M) x, integer N)">SignExtend</a>(imm19:'00', 64);</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="CBZ_32_compbranch" symboldefcount="1">
      <symbol link="sa_wt">&lt;Wt&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 32-bit name of the general-purpose register to be tested, encoded in the "Rt" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CBZ_64_compbranch" symboldefcount="1">
      <symbol link="sa_xt">&lt;Xt&gt;</symbol>
      <account encodedin="Rt">
        <intro>
          <para>Is the 64-bit name of the general-purpose register to be tested, encoded in the "Rt" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="CBZ_32_compbranch, CBZ_64_compbranch" symboldefcount="1">
      <symbol link="sa_label">&lt;label&gt;</symbol>
      <account encodedin="imm19">
        <intro>
          <para>Is the program label to be conditionally branched to. Its offset from the address of this instruction, in the range +/-1MB, is encoded as "imm19" times 4.</para>
        </intro>
      </account>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="aarch64/instrs/branch/conditional/compare" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute">bits(datasize) operand1 = <a link="impl-aarch64.X.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) X[integer n, integer width]">X</a>[t, datasize];
boolean branch_conditional = TRUE;
if <a link="impl-shared.IsZero.1" file="shared_pseudocode.xml" hover="function: boolean IsZero(bits(N) x)">IsZero</a>(operand1) == iszero then
    <a link="impl-shared.BranchTo.3" file="shared_pseudocode.xml" hover="function: BranchTo(bits(N) target, BranchType branch_type, boolean branch_conditional)">BranchTo</a>(<a link="impl-aarch64.PC.read.0" file="shared_pseudocode.xml" hover="accessor: bits(64) PC[]">PC</a>[] + offset, <a link="BranchType_DIR" file="shared_pseudocode.xml" hover="enumeration BranchType { BranchType_DIRCALL, BranchType_INDCALL, BranchType_ERET, BranchType_DBGEXIT, BranchType_RET, BranchType_DIR, BranchType_INDIR, BranchType_EXCEPTION, BranchType_TMFAIL, BranchType_RESET, BranchType_UNKNOWN}">BranchType_DIR</a>, branch_conditional);
else
    <a link="impl-shared.BranchNotTaken.2" file="shared_pseudocode.xml" hover="function: BranchNotTaken(BranchType branchtype, boolean branch_conditional)">BranchNotTaken</a>(<a link="BranchType_DIR" file="shared_pseudocode.xml" hover="enumeration BranchType { BranchType_DIRCALL, BranchType_INDCALL, BranchType_ERET, BranchType_DBGEXIT, BranchType_RET, BranchType_DIR, BranchType_INDIR, BranchType_EXCEPTION, BranchType_TMFAIL, BranchType_RESET, BranchType_UNKNOWN}">BranchType_DIR</a>, branch_conditional);</pstext>
    </ps>
  </ps_section>
</instructionsection>
