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<instructionsection id="cpy_z_p_i" title="CPY (immediate, merging)" type="instruction">
  <docvars>
    <docvar key="instr-class" value="sve" />
    <docvar key="isa" value="A64" />
    <docvar key="mnemonic" value="CPY" />
  </docvars>
  <heading>CPY (immediate, merging)</heading>
  <desc>
    <brief>Copy signed integer immediate to vector elements (merging)</brief>
    <description>
      <para>Copy a signed integer immediate to each active element in the destination vector. Inactive elements in the destination vector register remain unmodified.</para>
      <para>The immediate operand is a signed value in the range -128 to +127, and for element widths of 16 bits or higher it may also be a signed multiple of 256 in the range -32768 to +32512 (excluding 0).</para>
      <para>The immediate is encoded in 8 bits with an optional left shift by 8. The preferred disassembly when the shift option is specified is "<syntax>#&lt;simm8&gt;, LSL #8</syntax>". However an assembler and disassembler may also allow use of the shifted 16-bit value unless the immediate is 0 and the shift amount is 8, which must be unambiguously described as "<syntax>#0, LSL #8</syntax>".</para>
    </description>
    <status>Green</status>
    <predicated>True</predicated>
    <uses_dit condition="FEAT_SVE2 is implemented or FEAT_SME is implemented">True</uses_dit>
    <takes_movprfx>True</takes_movprfx>
    <takes_pred_movprfx>True</takes_pred_movprfx>
  </desc>
  <alias_list howmany="2">
    <alias_list_intro>This instruction is used by the aliases </alias_list_intro>
    <aliasref aliaspageid="FMOV_cpy_z_p_i" aliasfile="fmov_cpy_z_p_i.xml" hover="Move floating-point +0" punct=" and ">
      <text>FMOV (zero, predicated)</text>
      <aliaspref>Never</aliaspref>
    </aliasref>
    <aliasref aliaspageid="MOV_cpy_z_p_i" aliasfile="mov_cpy_z_p_i.xml" hover="Move signed integer immediate to vector elements (merging)" punct=".">
      <text>MOV (immediate, predicated, merging)</text>
      <aliaspref>Unconditionally</aliaspref>
    </aliasref>
    <alias_list_outro></alias_list_outro>
  </alias_list>
  <classes>
    <iclass name="SVE" oneof="1" id="iclass_sve" no_encodings="1" isa="A64">
      <docvars>
        <docvar key="instr-class" value="sve" />
        <docvar key="isa" value="A64" />
        <docvar key="mnemonic" value="CPY" />
      </docvars>
      <iclassintro count="1"></iclassintro>
      <regdiagram form="32" psname="CPY-Z.P.I-_" tworows="1">
        <box hibit="31" width="8" settings="8">
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>0</c>
          <c>1</c>
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="23" width="2" name="size" usename="1">
          <c colspan="2"></c>
        </box>
        <box hibit="21" width="2" settings="2">
          <c>0</c>
          <c>1</c>
        </box>
        <box hibit="19" width="4" name="Pg" usename="1">
          <c colspan="4"></c>
        </box>
        <box hibit="15" settings="1">
          <c>0</c>
        </box>
        <box hibit="14" name="M" usename="1" settings="1">
          <c>1</c>
        </box>
        <box hibit="13" name="sh" usename="1">
          <c></c>
        </box>
        <box hibit="12" width="8" name="imm8" usename="1">
          <c colspan="8"></c>
        </box>
        <box hibit="4" width="5" name="Zd" usename="1">
          <c colspan="5"></c>
        </box>
      </regdiagram>
      <encoding name="cpy_z_p_i_" oneofinclass="1" oneof="1" label="">
        <docvars>
          <docvar key="instr-class" value="sve" />
          <docvar key="isa" value="A64" />
          <docvar key="mnemonic" value="CPY" />
        </docvars>
        <asmtemplate><text>CPY     </text><a link="sa_zd" hover="Destination scalable vector register (field &quot;Zd&quot;)">&lt;Zd&gt;</a><text>.</text><a link="sa_t" hover="Size specifier (field &quot;size&quot;) [B,D,H,S]">&lt;T&gt;</a><text>, </text><a link="sa_pg" hover="Governing scalable predicate register (field &quot;Pg&quot;)">&lt;Pg&gt;</a><text>/M, #</text><a link="sa_imm" hover="Signed immediate [-128-127] (field &quot;imm8&quot;)">&lt;imm&gt;</a><text>{</text><text>, </text><a link="sa_shift" hover="Optional left shift to apply to the immediate, default LSL #0 (field &quot;sh&quot;) [LSL #0,LSL #8]">&lt;shift&gt;</a><text>}</text></asmtemplate>
      </encoding>
      <ps_section howmany="1">
        <ps name="CPY-Z.P.I-_" mylink="CPY-Z.P.I-_" enclabels="" sections="1" secttype="noheading">
          <pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVE.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVE()">HaveSVE</a>() &amp;&amp; !<a link="impl-aarch64.HaveSME.0" file="shared_pseudocode.xml" hover="function: boolean HaveSME()">HaveSME</a>() then UNDEFINED;
if size:sh == '001' then UNDEFINED;
constant integer esize = 8 &lt;&lt; <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(size);
integer g = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Pg);
integer d = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zd);
boolean merging = TRUE;
integer imm = <a link="impl-shared.SInt.1" file="shared_pseudocode.xml" hover="function: integer SInt(bits(N) x)">SInt</a>(imm8);
if sh == '1' then imm = imm &lt;&lt; 8;</pstext>
        </ps>
      </ps_section>
    </iclass>
  </classes>
  <explanations scope="all">
    <explanation enclist="cpy_z_p_i_" symboldefcount="1">
      <symbol link="sa_zd">&lt;Zd&gt;</symbol>
      <account encodedin="Zd">
        <intro>
          <para>Is the name of the destination scalable vector register, encoded in the "Zd" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="cpy_z_p_i_" symboldefcount="1">
      <symbol link="sa_t">&lt;T&gt;</symbol>
      <definition encodedin="size">
        <intro>Is the size specifier, </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">size</entry>
                <entry class="symbol">&lt;T&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">00</entry>
                <entry class="symbol">B</entry>
              </row>
              <row>
                <entry class="bitfield">01</entry>
                <entry class="symbol">H</entry>
              </row>
              <row>
                <entry class="bitfield">10</entry>
                <entry class="symbol">S</entry>
              </row>
              <row>
                <entry class="bitfield">11</entry>
                <entry class="symbol">D</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
    <explanation enclist="cpy_z_p_i_" symboldefcount="1">
      <symbol link="sa_pg">&lt;Pg&gt;</symbol>
      <account encodedin="Pg">
        <intro>
          <para>Is the name of the governing scalable predicate register, encoded in the "Pg" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="cpy_z_p_i_" symboldefcount="1">
      <symbol link="sa_imm">&lt;imm&gt;</symbol>
      <account encodedin="imm8">
        <intro>
          <para>Is a signed immediate in the range -128 to 127, encoded in the "imm8" field.</para>
        </intro>
      </account>
    </explanation>
    <explanation enclist="cpy_z_p_i_" symboldefcount="1">
      <symbol link="sa_shift">&lt;shift&gt;</symbol>
      <definition encodedin="sh">
        <intro>Is the optional left shift to apply to the immediate, defaulting to LSL #0 and </intro>
        <table class="valuetable">
          <tgroup cols="2">
            <thead>
              <row>
                <entry class="bitfield">sh</entry>
                <entry class="symbol">&lt;shift&gt;</entry>
              </row>
            </thead>
            <tbody>
              <row>
                <entry class="bitfield">0</entry>
                <entry class="symbol">LSL #0</entry>
              </row>
              <row>
                <entry class="bitfield">1</entry>
                <entry class="symbol">LSL #8</entry>
              </row>
            </tbody>
          </tgroup>
        </table>
      </definition>
    </explanation>
  </explanations>
  <ps_section howmany="1">
    <ps name="CPY-Z.P.I-_" mylink="execute" enclabels="" sections="1" secttype="Operation">
      <pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV esize;
bits(PL) mask = <a link="impl-aarch64.P.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) P[integer n, integer width]">P</a>[g, PL];
bits(VL) dest = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[d, VL];
bits(VL) result;

for e = 0 to elements-1
    if <a link="impl-aarch64.ActivePredicateElement.3" file="shared_pseudocode.xml" hover="function: boolean ActivePredicateElement(bits(N) pred, integer e, integer esize)">ActivePredicateElement</a>(mask, e, esize) then
        <a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = imm&lt;esize-1:0&gt;;
    elsif merging then
        <a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[dest, e, esize];
    else
        <a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, esize] = <a link="impl-shared.Zeros.1" file="shared_pseudocode.xml" hover="function: bits(N) Zeros(integer N)">Zeros</a>(esize);

<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[d, VL] = result;</pstext>
    </ps>
  </ps_section>
</instructionsection>
