LDEOR, LDEORA, LDEORAL, LDEORL Atomic Exclusive-OR on word or doubleword in memory Atomic Exclusive-OR on word or doubleword in memory atomically loads a 32-bit word or 64-bit doubleword from memory, performs an exclusive-OR with the value held in a register on it, and stores the result back to memory. The value initially loaded from memory is returned in the destination register. If the destination register is not one of WZR or XZR, LDEORA and LDEORAL load from memory with acquire semantics. LDEORL and LDEORAL store to memory with release semantics. LDEOR has neither acquire nor release semantics. For more information about memory ordering semantics see Load-Acquire, Store-Release. For information about memory accesses see Load/Store addressing modes. If PSTATE.DIT is 1, the timing of this instruction is insensitive to the value of the data being loaded or stored. This instruction is used by the alias STEOR, STEORL A == '0' && Rt == '11111' See below for details of when the alias is preferred. 1 x 1 1 1 0 0 0 1 0 0 1 0 0 0 0 0 0 LDEOR <Ws>, <Wt>, [<Xn|SP>] 0 1 0 LDEORA <Ws>, <Wt>, [<Xn|SP>] 0 1 1 LDEORAL <Ws>, <Wt>, [<Xn|SP>] 0 0 1 LDEORL <Ws>, <Wt>, [<Xn|SP>] 1 0 0 LDEOR <Xs>, <Xt>, [<Xn|SP>] 1 1 0 LDEORA <Xs>, <Xt>, [<Xn|SP>] 1 1 1 LDEORAL <Xs>, <Xt>, [<Xn|SP>] 1 0 1 LDEORL <Xs>, <Xt>, [<Xn|SP>] if !HaveAtomicExt() then UNDEFINED; integer t = UInt(Rt); integer n = UInt(Rn); integer s = UInt(Rs); integer datasize = 8 << UInt(size); integer regsize = if datasize == 64 then 64 else 32; boolean acquire = A == '1' && Rt != '11111'; boolean release = R == '1'; MemAtomicOp op; case opc of when '000' op = MemAtomicOp_ADD; when '001' op = MemAtomicOp_BIC; when '010' op = MemAtomicOp_EOR; when '011' op = MemAtomicOp_ORR; when '100' op = MemAtomicOp_SMAX; when '101' op = MemAtomicOp_SMIN; when '110' op = MemAtomicOp_UMAX; when '111' op = MemAtomicOp_UMIN; boolean tagchecked = n != 31; <Ws> Is the 32-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field. <Wt> Is the 32-bit name of the general-purpose register to be loaded, encoded in the "Rt" field. <Xs> Is the 64-bit name of the general-purpose register holding the data value to be operated on with the contents of the memory location, encoded in the "Rs" field. <Xt> Is the 64-bit name of the general-purpose register to be loaded, encoded in the "Rt" field. <Xn|SP> Is the 64-bit name of the general-purpose base register or stack pointer, encoded in the "Rn" field. Alias Conditions bits(64) address; bits(datasize) value; bits(datasize) data; AccessDescriptor accdesc = CreateAccDescAtomicOp(op, acquire, release, tagchecked); value = X[s, datasize]; if n == 31 then CheckSPAlignment(); address = SP[]; else address = X[n, 64]; bits(datasize) comparevalue = bits(datasize) UNKNOWN; // Irrelevant when not executing CAS data = MemAtomic(address, comparevalue, value, accdesc); if t != 31 then X[t, regsize] = ZeroExtend(data, regsize);