MOV (tile to vector, two registers)
Move two ZA tile slices to two vector registers
The instruction operates on two consecutive horizontal or vertical slices within a named ZA tile of the specified element size.
The consecutive slice numbers within the tile are selected starting from the sum of the slice index register and immediate offset, modulo the number of such elements in a vector. The immediate offset is a multiple of 2 in the range 0 to the number of elements in a 128-bit vector segment minus 2.
This instruction is unpredicated.
Green
False
True
SM_1_only
MOVA (tile to vector, two registers)
It has encodings from 4 classes:
8-bit
,
16-bit
,
32-bit
and
64-bit
1
1
0
0
0
0
0
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
MOV { <Zd1>.B-<Zd2>.B }, ZA0<HV>.B[<Ws>, <offsf>:<offsl>]
MOVA { <Zd1>.B-<Zd2>.B }, ZA0<HV>.B[<Ws>, <offsf>:<offsl>]
Unconditionally
1
1
0
0
0
0
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
0
MOV { <Zd1>.H-<Zd2>.H }, <ZAn><HV>.H[<Ws>, <offsf>:<offsl>]
MOVA { <Zd1>.H-<Zd2>.H }, <ZAn><HV>.H[<Ws>, <offsf>:<offsl>]
Unconditionally
1
1
0
0
0
0
0
0
1
0
0
0
0
1
1
0
0
0
0
0
0
0
MOV { <Zd1>.S-<Zd2>.S }, <ZAn><HV>.S[<Ws>, <offsf>:<offsl>]
MOVA { <Zd1>.S-<Zd2>.S }, <ZAn><HV>.S[<Ws>, <offsf>:<offsl>]
Unconditionally
1
1
0
0
0
0
0
0
1
1
0
0
0
1
1
0
0
0
0
0
0
0
MOV { <Zd1>.D-<Zd2>.D }, <ZAn><HV>.D[<Ws>, <offsf>:<offsl>]
MOVA { <Zd1>.D-<Zd2>.D }, <ZAn><HV>.D[<Ws>, <offsf>:<offsl>]
Unconditionally
<Zd1>
Is the name of the first destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2.
<Zd2>
Is the name of the second destination scalable vector register of a multi-vector sequence, encoded as "Zd" times 2 plus 1.
<ZAn>
For the 16-bit variant: is the name of the ZA tile ZA0-ZA1 to be accessed, encoded in the "ZAn" field.
<ZAn>
For the 32-bit variant: is the name of the ZA tile ZA0-ZA3 to be accessed, encoded in the "ZAn" field.
<ZAn>
For the 64-bit variant: is the name of the ZA tile ZA0-ZA7 to be accessed, encoded in the "ZAn" field.
<HV>
Is the horizontal or vertical slice indicator,
<Ws>
Is the 32-bit name of the slice index register W12-W15, encoded in the "Rs" field.
<offsf>
For the 8-bit variant: is the slice index offset, pointing to first of two consecutive slices, encoded as "off3" field times 2.
<offsf>
For the 16-bit variant: is the slice index offset, pointing to first of two consecutive slices, encoded as "off2" field times 2.
<offsf>
For the 32-bit variant: is the slice index offset, pointing to first of two consecutive slices, encoded as "o1" field times 2.
<offsf>
For the 64-bit variant: is the slice index offset, pointing to first of two consecutive slices, with implicit value 0.
<offsl>
For the 8-bit variant: is the slice index offset, pointing to last of two consecutive slices, encoded as "off3" field times 2 plus 1.
<offsl>
For the 16-bit variant: is the slice index offset, pointing to last of two consecutive slices, encoded as "off2" field times 2 plus 1.
<offsl>
For the 32-bit variant: is the slice index offset, pointing to last of two consecutive slices, encoded as "o1" field times 2 plus 1.
<offsl>
For the 64-bit variant: is the slice index offset, pointing to last of two consecutive slices, with implicit value 1.