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archived-ballistic/spec/arm64_xml/bfmls_z_zzzi.xml
Ronald Caesar 26a677f8b4 decoder: Add ARM specification docs
Signed-off-by: Ronald Caesar <github43132@proton.me>
2025-12-12 18:11:36 -04:00

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XML

<?xml version="1.0" encoding="utf-8"?>
<?xml-stylesheet type="text/xsl" encoding="UTF-8" href="iform.xsl" version="1.0"?>
<!DOCTYPE instructionsection PUBLIC "-//ARM//DTD instructionsection //EN" "iform-p.dtd">
<!-- Copyright (c) 2010-2022 Arm Limited or its affiliates. All rights reserved. -->
<!-- This document is Non-Confidential. This document may only be used and distributed in accordance with the terms of the agreement entered into by Arm and the party that Arm delivered this document to. -->
<instructionsection id="bfmls_z_zzzi" title="BFMLS (indexed)" type="instruction">
<docvars>
<docvar key="instr-class" value="sve2" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="BFMLS" />
</docvars>
<heading>BFMLS (indexed)</heading>
<desc>
<brief>BFloat16 floating-point fused multiply-subtract vectors by indexed elements</brief>
<description>
<para>Multiply all BFloat16 elements within each 128-bit segment of the first source vector by the specified element in the corresponding second source vector segment. The products are then destructively subtracted without intermediate rounding from the corresponding elements of the addend and destination vector.</para>
<para>The elements within the second source vector are specified using an immediate index which selects the same element position within each 128-bit vector segment. The index range is from 0 to 7.</para>
<para>This instruction follows SVE2.1 non-widening BFloat16 numerical behaviors.</para>
<para>This instruction is unpredicated.</para>
<para>ID_AA64ZFR0_EL1.B16B16 indicates whether this instruction is implemented.</para>
</description>
<status>Green</status>
<predicated>False</predicated>
<takes_movprfx>True</takes_movprfx>
</desc>
<alias_list howmany="0"></alias_list>
<classes>
<iclass name="SVE2" oneof="1" id="iclass_sve2" no_encodings="1" isa="A64">
<docvars>
<docvar key="instr-class" value="sve2" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="BFMLS" />
</docvars>
<iclassintro count="1"></iclassintro>
<arch_variants>
<arch_variant name="FEAT_B16B16" feature="FEAT_B16B16" />
</arch_variants>
<regdiagram form="32" psname="BFMLS-Z.ZZZi-H" tworows="1">
<box hibit="31" width="8" settings="8">
<c>0</c>
<c>1</c>
<c>1</c>
<c>0</c>
<c>0</c>
<c>1</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="23" settings="1">
<c>0</c>
</box>
<box hibit="22" name="i3h" usename="1">
<c></c>
</box>
<box hibit="21" settings="1">
<c>1</c>
</box>
<box hibit="20" width="2" name="i3l" usename="1">
<c colspan="2"></c>
</box>
<box hibit="18" width="3" name="Zm" usename="1">
<c colspan="3"></c>
</box>
<box hibit="15" width="4" settings="4">
<c>0</c>
<c>0</c>
<c>0</c>
<c>0</c>
</box>
<box hibit="11" name="o2" settings="1">
<c>1</c>
</box>
<box hibit="10" name="op" usename="1" settings="1">
<c>1</c>
</box>
<box hibit="9" width="5" name="Zn" usename="1">
<c colspan="5"></c>
</box>
<box hibit="4" width="5" name="Zda" usename="1">
<c colspan="5"></c>
</box>
</regdiagram>
<encoding name="bfmls_z_zzzi_h" oneofinclass="1" oneof="1" label="">
<docvars>
<docvar key="instr-class" value="sve2" />
<docvar key="isa" value="A64" />
<docvar key="mnemonic" value="BFMLS" />
</docvars>
<asmtemplate><text>BFMLS </text><a link="sa_zda" hover="Third source and destination scalable vector register (field &quot;Zda&quot;)">&lt;Zda&gt;</a><text>.H, </text><a link="sa_zn" hover="First source scalable vector register (field &quot;Zn&quot;)">&lt;Zn&gt;</a><text>.H, </text><a link="sa_zm" hover="Second source scalable vector register Z0-Z7 (field &quot;Zm&quot;)">&lt;Zm&gt;</a><text>.H[</text><a link="sa_imm" hover="Immediate index [0-7] (field &quot;i3h:i3l&quot;)">&lt;imm&gt;</a><text>]</text></asmtemplate>
</encoding>
<ps_section howmany="1">
<ps name="BFMLS-Z.ZZZi-H" mylink="BFMLS-Z.ZZZi-H" enclabels="" sections="1" secttype="noheading">
<pstext mayhavelinks="1" section="Decode" rep_section="decode">if !<a link="impl-aarch64.HaveSVEB16B16.0" file="shared_pseudocode.xml" hover="function: boolean HaveSVEB16B16()">HaveSVEB16B16</a>() then UNDEFINED;
integer index = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(i3h:i3l);
integer n = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zn);
integer m = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zm);
integer da = <a link="impl-shared.UInt.1" file="shared_pseudocode.xml" hover="function: integer UInt(bits(N) x)">UInt</a>(Zda);
boolean op1_neg = TRUE;
boolean op3_neg = FALSE;</pstext>
</ps>
</ps_section>
</iclass>
</classes>
<explanations scope="all">
<explanation enclist="bfmls_z_zzzi_h" symboldefcount="1">
<symbol link="sa_zda">&lt;Zda&gt;</symbol>
<account encodedin="Zda">
<intro>
<para>Is the name of the third source and destination scalable vector register, encoded in the "Zda" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="bfmls_z_zzzi_h" symboldefcount="1">
<symbol link="sa_zn">&lt;Zn&gt;</symbol>
<account encodedin="Zn">
<intro>
<para>Is the name of the first source scalable vector register, encoded in the "Zn" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="bfmls_z_zzzi_h" symboldefcount="1">
<symbol link="sa_zm">&lt;Zm&gt;</symbol>
<account encodedin="Zm">
<intro>
<para>Is the name of the second source scalable vector register Z0-Z7, encoded in the "Zm" field.</para>
</intro>
</account>
</explanation>
<explanation enclist="bfmls_z_zzzi_h" symboldefcount="1">
<symbol link="sa_imm">&lt;imm&gt;</symbol>
<account encodedin="i3h:i3l">
<intro>
<para>Is the immediate index, in the range 0 to 7, encoded in the "i3h:i3l" fields.</para>
</intro>
</account>
</explanation>
</explanations>
<ps_section howmany="1">
<ps name="BFMLS-Z.ZZZi-H" mylink="execute" enclabels="" sections="1" secttype="Operation">
<pstext mayhavelinks="1" section="Execute" rep_section="execute"><a link="impl-aarch64.CheckSVEEnabled.0" file="shared_pseudocode.xml" hover="function: CheckSVEEnabled()">CheckSVEEnabled</a>();
constant integer VL = <a link="impl-aarch64.CurrentVL.read.none" file="shared_pseudocode.xml" hover="accessor: integer CurrentVL">CurrentVL</a>;
constant integer PL = VL DIV 8;
constant integer elements = VL DIV 16;
constant integer eltspersegment = 128 DIV 16;
bits(VL) operand1 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[n, VL];
bits(VL) operand2 = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[m, VL];
bits(VL) result = <a link="impl-aarch64.Z.read.2" file="shared_pseudocode.xml" hover="accessor: bits(width) Z[integer n, integer width]">Z</a>[da, VL];
for e = 0 to elements-1
integer segmentbase = e - (e MOD eltspersegment);
integer s = segmentbase + index;
bits(16) element1 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand1, e, 16];
bits(16) element2 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[operand2, s, 16];
bits(16) element3 = <a link="impl-shared.Elem.read.3" file="shared_pseudocode.xml" hover="accessor: bits(size) Elem[bits(N) vector, integer e, integer size]">Elem</a>[result, e, 16];
if op1_neg then element1 = <a link="impl-shared.BFNeg.1" file="shared_pseudocode.xml" hover="function: bits(16) BFNeg(bits(16) op)">BFNeg</a>(element1);
if op3_neg then element3 = <a link="impl-shared.BFNeg.1" file="shared_pseudocode.xml" hover="function: bits(16) BFNeg(bits(16) op)">BFNeg</a>(element3);
<a link="impl-shared.Elem.write.3" file="shared_pseudocode.xml" hover="accessor: Elem[bits(N) &amp;vector, integer e, integer size] = bits(size) value">Elem</a>[result, e, 16] = <a link="impl-shared.BFMulAdd.4" file="shared_pseudocode.xml" hover="function: bits(16) BFMulAdd(bits(16) addend, bits(16) op1, bits(16) op2, FPCRType fpcr)">BFMulAdd</a>(element3, element1, element2, FPCR[]);
<a link="impl-aarch64.Z.write.2" file="shared_pseudocode.xml" hover="accessor: Z[integer n, integer width] = bits(width) value">Z</a>[da, VL] = result;</pstext>
</ps>
</ps_section>
</instructionsection>